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公开(公告)号:US10395990B2
公开(公告)日:2019-08-27
申请号:US15718482
申请日:2017-09-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Hyun Lee , Jeong Yun Lee , Seung Ju Park , Geum Jung Seong , Young Mook Oh , Seung Soo Hong
IPC: H01L29/78 , H01L21/8234 , H01L29/423 , H01L29/66 , H01L27/088
Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction. The semiconductor device includes a first gate structure on a substrate, the first gate structure extending lengthwise in a first direction to have two long sides and two short sides, relative to each other, and including a first gate spacer; a second gate structure on the substrate, the second gate structure extending lengthwise in the first direction to have two long sides and two short sides, relative to each other, and including a second gate spacer, wherein a first short side of the second gate structure faces a first short side of the first gate structure; and a gate insulating support disposed between the first short side of the first gate structure and the first short side of the second gate structure and extending lengthwise in a second direction different from the first direction, a length of the gate insulating support in the second direction being greater than a width of each of the first gate structure and the second gate structure in the second direction.
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公开(公告)号:US10032864B2
公开(公告)日:2018-07-24
申请号:US15292515
申请日:2016-10-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyung Seok Min , Mi Gyeong Gwon , Seong Jin Nam , Sug Hyun Sung , Young Hoon Song , Young Mook Oh
IPC: H01L29/78 , H01L29/06 , H01L21/762 , H01L21/8234 , H01L29/66 , H01L29/08 , H01L29/16 , H01L29/161 , H01L21/311 , H01L29/165 , H01J37/32
Abstract: Semiconductor devices are provided. The semiconductor device includes a first fin and a second fin on a substrate and a field insulation layer between the first fin and the second fin. The field insulation layer include a first insulation layer and a second insulation layer on the first insulation layer and connected to the first insulation layer. The second insulation layer is wider than the first insulation layer. A ratio of a top width to a bottom width of each of the first fin and the second fin exceeds 0.5.
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公开(公告)号:US11037829B2
公开(公告)日:2021-06-15
申请号:US16460127
申请日:2019-07-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Hyun Lee , Jeong Yun Lee , Seung Ju Park , Geum Jung Seong , Young Mook Oh , Seung Soo Hong
IPC: H01L29/78 , H01L21/8234 , H01L27/088 , H01L29/417 , H01L21/8238 , H01L29/08 , H01L29/423 , H01L29/66
Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction. The semiconductor device includes a first gate structure on a substrate, the first gate structure extending lengthwise in a first direction to have two long sides and two short sides, relative to each other, and including a first gate spacer; a second gate structure on the substrate, the second gate structure extending lengthwise in the first direction to have two long sides and two short sides, relative to each other, and including a second gate spacer, wherein a first short side of the second gate structure faces a first short side of the first gate structure; and a gate insulating support disposed between the first short side of the first gate structure and the first short side of the second gate structure and extending lengthwise in a second direction different from the first direction, a length of the gate insulating support in the second direction being greater than a width of each of the first gate structure and the second gate structure in the second direction.
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公开(公告)号:US10930749B2
公开(公告)日:2021-02-23
申请号:US16232369
申请日:2018-12-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yong Ho Jeon , Jung Hyun Kim , Sung Woo Myung , Young Mook Oh , Dong Seok Lee
IPC: H01L29/423 , H01L21/763 , H01L21/8234 , H01L27/088 , H01L21/764
Abstract: Semiconductor devices are provided. A semiconductor device includes a channel region that protrudes from a substrate. The semiconductor device includes a gate line on the channel region. Moreover, the semiconductor device includes a gate isolation layer that is between a first portion of the gate line and a second portion of the gate line. The gate isolation layer is in contact with the gate line and includes a gap that is in the gate isolation layer. Related methods of manufacturing a semiconductor device are also provided.
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公开(公告)号:US11984448B2
公开(公告)日:2024-05-14
申请号:US17509265
申请日:2021-10-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Bok Young Lee , Young Mook Oh , Hyung Goo Lee , Hae Geon Jung , Seung Mo Ha
IPC: H01L27/088 , H01L21/762 , H01L21/8238 , H01L27/092
CPC classification number: H01L27/0886 , H01L21/76232 , H01L21/823821 , H01L21/823878 , H01L27/0924
Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a first base fin protruding from the substrate and extending in a first direction, and a first fin type pattern protruding from the first base fin and extending in the first direction. The first base fin includes a first sidewall and a second sidewall, the first and second sidewalls extending in the first direction, the first sidewall opposite to the second sidewall, the first sidewall of the first base fin at least partially defines a first deep trench, the second sidewall of the first base fin at least partially defines a second deep trench, and a depth of the first deep trench is greater than a depth of the second deep trench.
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公开(公告)号:US09899416B2
公开(公告)日:2018-02-20
申请号:US15403307
申请日:2017-01-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Bo Soon Kim , Hyun Ji Kim , Jeong Yun Lee , Gi Gwan Park , Sang Duk Park , Young Mook Oh , Yong Seok Lee
IPC: H01L27/088 , H01L27/12 , H01L29/06 , H01L29/423 , H01L21/84 , H01L29/49 , H01L29/51 , H01L21/8234 , H01L29/78
CPC classification number: H01L27/1203 , H01L21/823456 , H01L21/823462 , H01L21/823468 , H01L21/84 , H01L21/845 , H01L27/1211 , H01L29/0653 , H01L29/0673 , H01L29/42392 , H01L29/4908 , H01L29/4966 , H01L29/4991 , H01L29/517 , H01L29/66439 , H01L29/7853
Abstract: There is provided a semiconductor device capable of enhancing device performance by variably adjusting threshold voltage of a transistor having gate-all-around structure. The semiconductor device includes a substrate including a first region and a second region, a first wire pattern provided on the first region of the substrate and spaced apart from the substrate, a second wire pattern provided on the second region of the substrate and spaced apart from the substrate, a first gate insulating film surrounding a perimeter of the first wire pattern, a second gate insulating film surrounding a perimeter of the second wire pattern, a first gate electrode provided on the first gate insulating film, intersecting with the first wire pattern, and including a first metal oxide film therein, a second gate electrode provided on the second gate insulating film and intersecting with the second wire pattern, a first gate spacer on a sidewall of the first gate electrode, and a second gate spacer on a sidewall of the second gate electrode.
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公开(公告)号:US12125750B2
公开(公告)日:2024-10-22
申请号:US18118505
申请日:2023-03-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Hyun Lee , Jeong Yun Lee , Seung Ju Park , Geum Jung Seong , Young Mook Oh , Seung Soo Hong
IPC: H01L29/78 , H01L21/8234 , H01L21/8238 , H01L27/088 , H01L29/08 , H01L29/417 , H01L29/423 , H01L29/66
CPC classification number: H01L21/823462 , H01L21/823437 , H01L21/823481 , H01L21/823821 , H01L27/088 , H01L29/0847 , H01L29/41791 , H01L29/42364 , H01L29/785 , H01L21/823431 , H01L21/823468 , H01L21/823475 , H01L27/0886 , H01L29/6656
Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction. The semiconductor device includes a first gate structure on a substrate, the first gate structure extending lengthwise in a first direction to have two long sides and two short sides, relative to each other, and including a first gate spacer; a second gate structure on the substrate, the second gate structure extending lengthwise in the first direction to have two long sides and two short sides, relative to each other, and including a second gate spacer, wherein a first short side of the second gate structure faces a first short side of the first gate structure; and a gate insulating support disposed between the first short side of the first gate structure and the first short side of the second gate structure and extending lengthwise in a second direction different from the first direction, a length of the gate insulating support in the second direction being greater than a width of each of the first gate structure and the second gate structure in the second direction.
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公开(公告)号:US11621196B2
公开(公告)日:2023-04-04
申请号:US17328348
申请日:2021-05-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Hyun Lee , Jeong Yun Lee , Seung Ju Park , Geum Jung Seong , Young Mook Oh , Seung Soo Hong
IPC: H01L29/78 , H01L21/8234 , H01L27/088 , H01L29/417 , H01L21/8238 , H01L29/08 , H01L29/423 , H01L29/66
Abstract: A semiconductor device capable of improving operation performance and reliability, may include a gate insulating support to isolate gate electrodes that are adjacent in a length direction. The semiconductor device includes a first gate structure on a substrate, the first gate structure extending lengthwise in a first direction to have two long sides and two short sides, relative to each other, and including a first gate spacer; a second gate structure on the substrate, the second gate structure extending lengthwise in the first direction to have two long sides and two short sides, relative to each other, and including a second gate spacer, wherein a first short side of the second gate structure faces a first short side of the first gate structure; and a gate insulating support disposed between the first short side of the first gate structure and the first short side of the second gate structure and extending lengthwise in a second direction different from the first direction, a length of the gate insulating support in the second direction being greater than a width of each of the first gate structure and the second gate structure in the second direction.
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公开(公告)号:US20190333812A1
公开(公告)日:2019-10-31
申请号:US16212987
申请日:2018-12-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Geum Jung Seong , Seung Soo Hong , Young Mook Oh , Jeong Yun Lee
IPC: H01L21/768 , H01L29/78 , H01L29/49 , H01L23/535 , H01L29/66 , H01L21/28
Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a field insulating layer on the substrate, the field insulating layer wrapping a side wall of the fin type pattern, a gate electrode on the fin type pattern, the gate electrode extending in a second direction intersecting with the first direction, a first spacer on a side wall of a lower part of the gate electrode, and an etching stop layer extending along a side wall and an upper surface of an upper part of the gate electrode, along a side wall of the first spacer, and along an upper surface of the field insulating layer.
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公开(公告)号:US10224343B2
公开(公告)日:2019-03-05
申请号:US15869599
申请日:2018-01-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Bo Soon Kim , Hyun Ji Kim , Jeong Yun Lee , Gi Gwan Park , Sang Duk Park , Young Mook Oh , Yong Seok Lee
IPC: H01L27/088 , H01L27/12 , H01L29/06 , H01L29/423 , H01L21/84 , H01L29/66 , H01L29/49 , H01L29/51 , H01L21/8234 , H01L29/78
Abstract: There is provided a semiconductor device capable of enhancing device performance by variably adjusting threshold voltage of a transistor having gate-all-around structure. The semiconductor device includes a substrate including a first region and a second region, a first wire pattern provided on the first region of the substrate and spaced apart from the substrate, a second wire pattern provided on the second region of the substrate and spaced apart from the substrate, a first gate insulating film surrounding a perimeter of the first wire pattern, a second gate insulating film surrounding a perimeter of the second wire pattern, a first gate electrode provided on the first gate insulating film, intersecting with the first wire pattern, and including a first metal oxide film therein, a second gate electrode provided on the second gate insulating film and intersecting with the second wire pattern, a first gate spacer on a sidewall of the first gate electrode, and a second gate spacer on a sidewall of the second gate electrode.
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