公开(公告)号：US4580254A

公开(公告)日：1986-04-01

申请号：US633861

申请日：1984-07-24

申请人： Shigeru Hojyo ,  Yoshiaki Wada ,  Tsutomu Kojima ,  Toshiyuki Dateyama ,  Yoshitaka Koseki

发明人： Shigeru Hojyo ,  Yoshiaki Wada ,  Tsutomu Kojima ,  Toshiyuki Dateyama ,  Yoshitaka Koseki

IPC分类号： G11B17/30 ,  G11B27/00 ,  G11B17/28

CPC分类号： G11B17/30 ,  G11B27/002

摘要： An automatic disc selection type reproducing apparatus comprises a disc accommodating mechanism having disc accommodating portions for accommodating discs, and a reproducer part provided below and movable along the disc accommodating mechanism. The disc accommodating mechanism is substantially arranged horizontally, and the discs are accommodated within the disc accommodating portions in a vertical state where a disc surface of one disc opposes a disc surface of an adjacent disc. The reproducer part moves and stops at a position opposing a disc which is designated by designating an address of the disc accommodating portion which accommodates this disc. The reproducer part has a disc carrying mechanism for carrying the disc which assumes the vertical state, upwardly and downwardly between the disc accommodating mechanism and the reproducer part, while supporting a lower portion of an outer peripheral edge of the disc. The disc carrying mechanism supplies the disc from the disc accommodating portion to the reproducer part by use of the weight of the disc when playing the disc, and returns the disc into the disc accommodating portion by separating the disc from the reproducer part when the playing of the disc is completed.

摘要翻译： 一种自动盘片选择型重放装置，包括一盘片容纳机构，其具有用于容纳光盘的光盘容纳部分，以及设置在光盘容纳机构下方并可移动的再生器部分。 光盘容纳机构基本上水平布置，并且在一个盘的盘表面相对于相邻光盘的盘表面的垂直状态下，光盘容纳在光盘容纳部分内。 再现器部分在与通过指定容纳该盘的盘容纳部分的地址指定的盘相对的位置移动并停止。 再现器部分具有用于承载盘的盘片传送机构，该盘片在盘容纳机构和再现器部分之间向上和向下呈现垂直状态，同时支撑盘的外周边缘的下部。 盘片运送机构在播放盘片时通过使用碟片的重量将光盘从光盘容纳部分提供给再生器部分，并且当播放光盘时将光盘与再现部分分离，将盘片返回到光盘容纳部分 光盘完成。

公开(公告)号：US07068082B2

公开(公告)日：2006-06-27

申请号：US10683046

申请日：2003-10-14

申请人： Tsutomu Kojima

发明人： Tsutomu Kojima

IPC分类号： H03K3/00

CPC分类号： H03K17/0406 ,  H03K17/168

摘要： A gate driving circuit according to the present invention having, an output circuit which is connected to a first power supply terminal and a ground terminal and, upon receiving an ON/OFF signal, changes a level of a gate output terminal between a power supply voltage and a ground voltage, a shunt switching element which is connected between the gate output terminal and the ground terminal and is ON/OFF-controlled upon receiving a shunt control signal, and an output shunt control circuit which monitors the level of the gate output terminal and outputs the shunt control signal, wherein when the level of the gate output terminal decreases to not more than a first threshold value, the output shunt control circuit turns on the shunt switching element, and while the level is not more than a second threshold value larger than the first threshold value, the output shunt control circuit supplies the shunt control signal to said shunt switching element to maintain an ON state of the shunt switching element.

摘要翻译： 根据本发明的栅极驱动电路具有连接到第一电源端子和接地端子的输出电路，并且在接收到ON / OFF信号时，将栅极输出端子的电平改变为电源电压 接地电压，并联开关元件，其连接在栅极输出端子和接地端子之间，并且在接收到分流控制信号时进行ON / OFF控制;以及输出分流控制电路，其监视栅极输出端子 并输出分流控制信号，其中，当栅极输出端子的电平降低到不超过第一阈值时，输出分流控制电路接通分流开关元件，并且当该电平不大于第二阈值 大于第一阈值时，输出并联控制电路将分流控制信号提供给所述分流开关元件以保持分流开关的导通状态 铰链元件。

公开(公告)号：US06411133B1

公开(公告)日：2002-06-25

申请号：US09606090

申请日：2000-06-29

申请人： Tomoko Matsudai ,  Tsutomu Kojima ,  Akio Nakagawa

发明人： Tomoko Matsudai ,  Tsutomu Kojima ,  Akio Nakagawa

IPC分类号： H03K522

CPC分类号： H03K17/102 ,  H03K5/2481 ,  H03K17/0828 ,  H03K17/145

摘要： The differential amplifier of a comparator circuit includes first and second n-type MOSFETs for receiving an input signal, first and second p-type MOSFETs of a current mirror circuit, and a third n-type MOSFET of a current source circuit. The output stage includes a third p-type MOSFET for transmitting a signal, and a fourth n-type MOSFET of the current source circuit. The differential amplifier further includes fifth and sixth n-type MOSFETs respectively series-connected to the first and second n-type MOSFETs. The output stage further includes a seventh n-type MOSFET series-connected to the fourth n-type MOSFET. The gates of the fifth, sixth, and seventh n-type MOSFETs are connected to voltage bias circuits. The fifth, sixth, and seventh n-type MOSFETs suppress variations in voltage at an output node caused by poor saturation characteristics of the first, second, and fourth main n-type MOSFETs.

摘要翻译： 比较器电路的差分放大器包括用于接收输入信号的第一和第二n型MOSFET，电流镜电路的第一和第二p型MOSFET以及电流源电路的第三n型MOSFET。 输出级包括用于传输信号的第三p型MOSFET和电流源电路的第四n型MOSFET。 差分放大器还包括分别串联连接到第一和第二n型MOSFET的第五和第六n型MOSFET。 输出级还包括与第四n型MOSFET串联连接的第七n型MOSFET。 第五，第六和第七n型MOSFET的栅极连接到电压偏置电路。 第五，第六和第七n型MOSFET抑制由于第一，第二和第四主n型MOSFET的饱和特性不良引起的输出节点的电压变化。

公开(公告)号：US06534658B1

公开(公告)日：2003-03-18

申请号：US09936331

申请日：2001-12-19

申请人： Tsutomu Kojima ,  Katsutoshi Hachiya ,  Kazuyuki Ohmoto

发明人： Tsutomu Kojima ,  Katsutoshi Hachiya ,  Kazuyuki Ohmoto

IPC分类号： C07D27110

CPC分类号： C07D271/10 ,  C07D413/12 ,  C07K5/06139 ,  C07K5/0821 ,  Y02P20/55

摘要： Oxadiazole derivatives represented by formula (I): (wherein R1 represents a hydrogen atom or an amino-protective group; R2, R3, and R4 each independently represents an alkyl group, a cycloalkyl group, a phenyl group which may be substituted, or a 3,4-methylenedioxyphenyl group, or R3 and R4 are taken together to represent a C2-6 alkylene group), a process of producing the same, and a process for producing oxadiazole derivatives represented by formula (II): (wherein all symbols have the same meanings as described above) using the above derivative. According to the invention, the compound represented by formula (II) is produced through fewer steps in a high yield.

摘要翻译： 由式（I）表示的恶二唑衍生物:(其中R1表示氢原子或氨基保护基; R2，R3和R4各自独立地表示烷基，环烷基，可被取代的苯基或 3,4-亚甲二氧基苯基或R 3和R 4一起代表C 2-6亚烷基），其制备方法和由式（II）表示的恶二唑衍生物的制备方法:(其中所有符号均为 与上述相同的含义）。根据本发明，由式（II）表示的化合物通过较少的步骤以高产率生产。

公开(公告)号：US06518791B2

公开(公告)日：2003-02-11

申请号：US09811448

申请日：2001-03-20

申请人： Tsutomu Kojima ,  Hiroshi Takei ,  Morio Takahashi ,  Akira Yamashita

发明人： Tsutomu Kojima ,  Hiroshi Takei ,  Morio Takahashi ,  Akira Yamashita

IPC分类号： H03K300

CPC分类号： H03K5/1534 ,  H03K17/0828 ,  H03K2017/0806

摘要： A gate driver includes an edge detection circuit, an ON pulse generation circuit, first and second OFF pulse generation circuit and a status hold circuit. The first OFF pulse generation circuit generates a first OFF pulse in response to a leading or trailing edge of a control input signal, which is detected by the edge detection circuit. The status hold circuit drives an output element in response to the ON pulse outputted from the ON pulse generation circuit and holds driving status of the output element until a first OFF pulse is outputted from the first OFF pulse generation circuit. The second OFF pulse generation circuit generates a second OFF pulse in response to a protect operation signal and supplies this pulse to the status hold circuit, thereby to stop driving of the output element.

摘要翻译： 栅极驱动器包括边沿检测电路，ON脉冲产生电路，第一和第二OFF脉冲产生电路和状态保持电路。 第一OFF脉冲产生电路响应由边缘检测电路检测到的控制输入信号的前沿或后沿产生第一OFF脉冲。 状态保持电路响应于从ON脉冲发生电路输出的ON脉冲驱动输出元件，并保持输出元件的驱动状态，直到从第一OFF脉冲发生电路输出第一OFF脉冲为止。 第二OFF脉冲产生电路响应于保护操作信号产生第二OFF脉冲，并将该脉冲提供给状态保持电路，从而停止驱动输出元件。

公开(公告)号：US08759971B2

公开(公告)日：2014-06-24

申请号：US13219158

申请日：2011-08-26

申请人： Ryuji Hosokawa ,  Tsutomu Kojima ,  Tatsuo Shiotsuki

发明人： Ryuji Hosokawa ,  Tsutomu Kojima ,  Tatsuo Shiotsuki

IPC分类号： H01L23/498

CPC分类号： H01L21/563 ,  H01L23/24 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/525 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/02331 ,  H01L2224/02333 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05099 ,  H01L2224/05553 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/16145 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/83007 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor apparatus in a preferred embodiment includes: a substrate; a first chip provided on the substrate; a solder bump formed on the first chip; a solder dam arranged in substantially a rectangular and annular manner outside around the solder bump on the first chip by alternately connecting four sides and four quarter or less arcs; an electrode pad placed outside of the solder dam in the first chip; a second chip provided on the first chip in electric connection to the first chip via the solder bump; and an under-fill material filling a clearance between the first chip and the second chip inside of the solder dam. Here, a difference between an inner diameter and an outer diameter of the arc is 60 μm or more whereas the center radius of the arc is greater than 207.5 μm.

摘要翻译： 在优选实施例中的半导体装置包括：基板; 设置在基板上的第一芯片; 形成在第一芯片上的焊料凸块; 通过交替地连接四边和四分之四或四个以下的弧，在大致矩形和环形的方式围绕第一芯片上的焊料凸块布置的焊料坝; 位于第一芯片中的焊料坝外部的电极焊盘; 第二芯片，经由所述焊料凸块与所述第一芯片电连接; 以及填充在所述第一芯片和所述第二芯片之间的间隙的填充材料。 这里，电弧的内径和外径的差为60μm以上，而电弧的中心半径大于207.5μm。

公开(公告)号：US20120104597A1

公开(公告)日：2012-05-03

申请号：US13069563

申请日：2011-03-23

申请人： Tatsuji Ishiduka ,  Junji Yoshikawa ,  Tsutomu Kojima

发明人： Tatsuji Ishiduka ,  Junji Yoshikawa ,  Tsutomu Kojima

IPC分类号： H01L23/485 ,  H01L21/60

CPC分类号： H01L24/73 ,  H01L21/563 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/11845 ,  H01L2224/13082 ,  H01L2224/16145 ,  H01L2224/29082 ,  H01L2224/29188 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/9211 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01028 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00

摘要： According to an embodiment, a chip-on-chip structure includes a first chip, a second chip, the first chip and the second chip being opposite to each other, a first electrode terminal, a second electrode terminal, a bump and a protecting material. The first electrode terminal is provided on the surface of the first chip at the side of the second chip. The second electrode terminal is provided on the surface of the second chip at the side of the first chip. The bump electrically connects the first electrode terminal and the second electrode terminal. The protecting material is formed around the bump between the first chip and the second chip. The protecting material includes a layer made of a material having heat-sensitive adhesive property.

摘要翻译： 根据实施例，片上芯片结构包括第一芯片，第二芯片，第一芯片和第二芯片彼此相对，第一电极端子，第二电极端子，凸块和保护材料 。 第一电极端子设置在第二芯片的一侧的第一芯片的表面上。 第二电极端子设置在第二芯片的第一芯片侧的表面上。 凸块电连接第一电极端子和第二电极端子。 保护材料围绕第一芯片和第二芯片之间的凸块形成。 保护材料包括由具有热敏粘合性的材料制成的层。

公开(公告)号：US20050017787A1

公开(公告)日：2005-01-27

申请号：US10683046

申请日：2003-10-14

申请人： Tsutomu Kojima

发明人： Tsutomu Kojima

IPC分类号： H01L21/8238 ,  H01L27/092 ,  H02M1/08 ,  H02M1/32 ,  H03K17/04 ,  H03K17/08 ,  H03K17/16 ,  H03K17/56 ,  H03B1/00

CPC分类号： H03K17/0406 ,  H03K17/168

摘要： A gate driving circuit according to the present invention having, an output circuit which is connected to a first power supply terminal and a ground terminal and, upon receiving an ON/OFF signal, changes a level of a gate output terminal between a power supply voltage and a ground voltage, a shunt switching element which is connected between the gate output terminal and the ground terminal and is ON/OFF-controlled upon receiving a shunt control signal, and an output shunt control circuit which monitors the level of the gate output terminal and outputs the shunt control signal, wherein when the level of the gate output terminal decreases to not more than a first threshold value, the output shunt control circuit turns on the shunt switching element, and while the level is not more than a second threshold value larger than the first threshold value, the output shunt control circuit supplies the shunt control signal to said shunt switching element to maintain an ON state of the shunt switching element.

摘要翻译： 根据本发明的栅极驱动电路具有连接到第一电源端子和接地端子的输出电路，并且在接收到ON / OFF信号时，将栅极输出端子的电平改变为电源电压 接地电压，并联开关元件，其连接在栅极输出端子和接地端子之间，并且在接收到分流控制信号时进行ON / OFF控制;以及输出分流控制电路，其监视栅极输出端子 并输出分流控制信号，其中，当栅极输出端子的电平降低到不超过第一阈值时，输出分流控制电路接通分流开关元件，并且当该电平不大于第二阈值 大于第一阈值时，输出并联控制电路将分流控制信号提供给所述分流开关元件以保持分流开关的导通状态 铰链元件。

公开(公告)号：US06379558B1

公开(公告)日：2002-04-30

申请号：US09680221

申请日：2000-10-06

申请人： Nobuo Ogawa ,  Tsutomu Kojima ,  Shin Ashizuka ,  Andre Dheur

发明人： Nobuo Ogawa ,  Tsutomu Kojima ,  Shin Ashizuka ,  Andre Dheur

IPC分类号： B01D2100

CPC分类号： G03F7/3092 ,  G03F7/42

摘要： An apparatus performs a process for treating development waste liquor containing photosensitive resin and surface active agent. The process subjects the waste liquor to treatment for diminishing the efficacy of the surface active agent to result in separation of the resin from the waste liquor. The waste liquor is then irradiated with ultraviolet light at 300-400 nm. The apparatus contains a tank, a stirrer, an ultraviolet source and a filter.

摘要翻译： 一种装置进行处理含有感光性树脂和表面活性剂的显影废液的处理。 该方法使废液进行处理以降低表面活性剂的功效，导致树脂与废液分离。 然后用300-400nm的紫外线照射废液。 该装置包含罐，搅拌器，紫外线源和过滤器。

公开(公告)号：US20110254096A1

公开(公告)日：2011-10-20

申请号：US13167058

申请日：2011-06-23

申请人： Takayuki Hiraoka ,  Kuniaki Utsumi ,  Tsutomu Kojima ,  Kenji Honda

发明人： Takayuki Hiraoka ,  Kuniaki Utsumi ,  Tsutomu Kojima ,  Kenji Honda

IPC分类号： H01L29/772

CPC分类号： H01L29/0847 ,  H01L21/823418 ,  H01L27/0266 ,  H01L27/088 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/7835

摘要： A semiconductor device includes first and second MOSFETs corresponding to at least first power source voltage and second power source voltage lower than the first power source voltage, and non-silicide regions formed in drain portions of the first and second MOSFETs and having no silicide formed therein. The first MOSFET includes first diffusion layers formed in source/drain portions, a second diffusion layer formed below a gate portion and formed shallower than the first diffusion layer and a third diffusion layer formed with the same depth as the second diffusion layer in the non-silicide region, and the second MOSFET includes fourth diffusion layers formed in source/drain portions, a fifth diffusion layer formed below a gate portion and formed shallower than the fourth diffusion layer and a sixth diffusion layer formed shallower than the fourth diffusion layer and deeper than the fifth diffusion layer in the non-silicide region.

摘要翻译： 半导体器件包括对应于至少第一电源电压和低于第一电源电压的第二电源电压的第一和第二MOSFET，以及形成在第一和第二MOSFET的漏极部分中并且不形成在其中的硅化物的非硅化物区域 。 第一MOSFET包括形成在源极/漏极部分的第一扩散层，形成在栅极部分下方并形成为比第一扩散层浅的第二扩散层，以及形成在第一扩散层中的与第二扩散层相同深度的第三扩散层， 硅化物区域，第二MOSFET包括形成在源极/漏极部分的第四扩散层，形成在栅极部分下方并形成为比第四扩散层浅的第五扩散层和形成为比第四扩散层浅的第六扩散层， 非硅化物区域中的第五扩散层。