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    PACKAGING SUBSTRATE HAVING CHIP EMBEDDED THEREIN AND MANUFACTURING METHOD THEREOF
    3.
    发明申请
    PACKAGING SUBSTRATE HAVING CHIP EMBEDDED THEREIN AND MANUFACTURING METHOD THEREOF 审中-公开
    具有嵌入芯片的包装基板及其制造方法

    公开(公告)号：US20090032930A1

    公开(公告)日：2009-02-05

    申请号：US11832466

    申请日：2007-08-01

    申请人： Shih-Ping Hsu ,  Chung-Cheng Lien ,  Shang-Wei Chen ,  Kan-Jung Chia

    发明人： Shih-Ping Hsu ,  Chung-Cheng Lien ,  Shang-Wei Chen ,  Kan-Jung Chia

    IPC分类号： H01L21/52 ,  H01L23/18

    CPC分类号： H01L21/52 ,  H01L23/24 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/14 ,  H01L2924/18162 ,  H01L2924/00

    摘要： A packaging substrate having a chip embedded therein, comprises a first aluminum substrate having a first cavity therein; a second aluminum substrate having a second cavity corresponding to the first cavity; a dielectric layer disposed between the first aluminum substrate and the second aluminum substrate; a chip embedded in the first cavity and the second cavity, having an active surface with a plurality of electrode pads thereon; and one built-up structure disposed on the surface of the first aluminum substrate and the active surface of the chip, wherein the built-up structure has a plurality of conductive vias electrically connecting to the electrode pads. The substrate warpage is obviously reduced by the assistance of using aluminum or aluminum alloy as the material of the substrate. Also, a method of manufacturing a packaging substrate having a chip embedded therein is disclosed.

    摘要翻译： 具有嵌入其中的芯片的封装基板包括其中具有第一腔的第一铝基板; 第二铝基板，具有对应于第一空腔的第二腔; 设置在所述第一铝基板和所述第二铝基板之间的电介质层; 嵌入在所述第一腔和所述第二腔中的芯片，具有其上具有多个电极焊盘的活性表面; 以及设置在第一铝基板的表面和芯片的有源表面上的一个堆积结构，其中，所述积层结构具有电连接到电极焊盘的多个导电通孔。 通过使用铝或铝合金作为基材的材料，显着减少了基板翘曲。 另外，公开了一种制造具有嵌入其中的芯片的封装衬底的方法。

    MULTI-CHIP SEMICONDUCTOR PACKAGE STRUCTURE
    9.
    发明申请
    MULTI-CHIP SEMICONDUCTOR PACKAGE STRUCTURE 审中-公开
    多芯片半导体封装结构

    公开(公告)号：US20080237832A1

    公开(公告)日：2008-10-02

    申请号：US12047810

    申请日：2008-03-13

    申请人： Shih-Ping Hsu ,  Chung-Cheng Lien ,  Chia-Wei Chang

    发明人： Shih-Ping Hsu ,  Chung-Cheng Lien ,  Chia-Wei Chang

    IPC分类号： H01L23/49

    CPC分类号： H01L25/0657 ,  H01L24/16 ,  H01L25/03 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

    摘要： A multi-chip semiconductor package structure is disclosed, including a carrier board having a first and an opposing second surfaces and formed with at least an opening penetrating the first and second surfaces, wherein a plurality of electrically connecting pads are formed on the first and second surfaces of the carrier board, respectively; a semiconductor component disposed in the opening, the semiconductor component having a first and a second active surfaces each with a plurality of electrode pads being formed thereon; a third semiconductor chip having an active surface and an inactive surface, the active surface having a plurality of electrode pads formed thereon for electrically connecting with the electrically connecting pads on the first surface of the carrier board and the electrode pads on the first active surface of the semiconductor component; and a fourth semiconductor chip having an active surface and an inactive surface, the active surface having a plurality of electrode pads formed thereon for electrically connecting with the electrically connecting pads on the second surface of the carrier board and the electrode pads on the second active surface of the semiconductor component, thereby providing a modularized structure for electrically connecting with other modules or stack devices and enhancing electrical functionality.

    摘要翻译： 公开了一种多芯片半导体封装结构，其包括具有第一和相对的第二表面的载体板，并形成有至少一个贯穿第一和第二表面的开口，其中多个电连接焊盘形成在第一和第二表面上 分别为载板的表面; 设置在所述开口中的半导体部件，所述半导体部件具有在其上形成有多个电极焊盘的第一和第二有源面; 具有活性表面和非活性表面的第三半导体芯片，所述活性表面具有形成在其上的多个电极焊盘，用于与载体板的第一表面上的电连接焊盘和第一有源表面上的电极焊盘电连接 半导体元件; 以及具有活性表面和非活性表面的第四半导体芯片，所述活性表面具有形成在其上的多个电极焊盘，用于与所述载体板的第二表面上的电连接焊盘和所述第二有源表面上的电极焊盘电连接 从而提供用于与其他模块或堆叠装置电连接并增强电功能性的模块化结构。

    MULTI-CHIP SEMICONDUCTOR PACKAGE STRUCTURE
    10.
    发明申请
    MULTI-CHIP SEMICONDUCTOR PACKAGE STRUCTURE 审中-公开
    多芯片半导体封装结构

    公开(公告)号：US20080237831A1

    公开(公告)日：2008-10-02

    申请号：US12015578

    申请日：2008-01-17

    申请人： Shih-Ping Hsu ,  Chung-Cheng Lien ,  Chia-Wei Chang

    发明人： Shih-Ping Hsu ,  Chung-Cheng Lien ,  Chia-Wei Chang

    IPC分类号： H01L23/538

    CPC分类号： H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A multi-chip semiconductor package structure is disclosed according to the present invention, the package structure includes: a carrier board having a first surface, a second surface, and at least an opening penetrating the first and second surfaces, the first and second surfaces each having electrically connecting pads; a semiconductor component received in the opening, the semiconductor component has a first active surface and a second active surface, and each of the first and second active surfaces has a plurality of electrode pads; a plurality of first conductive elements electrically connected to the electrically connecting pads of the first and second surfaces of the carrier board with the electrode pads of the first and second active surfaces of the semiconductor component; and a molding material formed on a portion of the first surface of the carrier board, the first active surface of the semiconductor component, a portion of the second surface of the carrier board, and the second active surface of the semiconductor component, and adapted to cover the first conductive elements; thereby forming a module structure for electrical connection with other modules or stacked devices, and further enhancing electrical functions.

    摘要翻译： 根据本发明公开了一种多芯片半导体封装结构，封装结构包括：承载板，其具有第一表面，第二表面和至少穿过第一表面和第二表面的开口，第一和第二表面各自 具有电连接垫; 所述半导体元件具有第一有源表面和第二有源表面，并且所述第一和第二有源表面中的每一个具有多个电极焊盘; 多个第一导电元件，电连接到载体板的第一和第二表面的电连接焊盘与半导体部件的第一和第二有源表面的电极焊盘; 以及模制材料，其形成在所述载板的所述第一表面的一部分上，所述半导体部件的所述第一有源表面，所述载体板的第二表面的一部分和所述半导体部件的所述第二有源表面，并且适于 覆盖第一导电元件; 从而形成用于与其他模块或堆叠设备电连接的模块结构，并且进一步增强电功能。