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公开(公告)号：US06291350B1
公开(公告)日：2001-09-18
申请号：US09127819
申请日：1998-08-03
Applicant: Shin Hashimoto , Yuichi Miyoshi
Inventor： Shin Hashimoto , Yuichi Miyoshi
IPC: H01L21302
Abstract: An ultrasonic transmitting unit transmits an ultrasonic wave to a slurry supply pipe. A polishing slurry is conveyed under pressure from a slurry supply tank to a slurry outlet via the slurry supply pipe and supplied from the slurry outlet to a surface of a polishing cloth. A wafer carrier holding a semiconductor wafer presses a surface of the semiconductor wafer against the surface of the polishing cloth coated with the polishing slurry and moves the semiconductor wafer relative to the polishing cloth to polish the surface of the semiconductor wafer. A discharged slurry flown out of the surface of the polishing cloth is discharged via a discharged slurry pipe. The application of the ultrasonic wave allows abrasive particles agglomerated in the polishing slurry in the slurry supply pipe to be re-dispersed into individual forms in the polishing slurry.
Abstract translation: 超声波发送单元向浆料供给管发送超声波。 抛光浆料在压力下通过浆料供给管从浆料供应罐输送到浆料出口，并从浆料出口供给到抛光布的表面。 保持半导体晶片的晶片载体将覆盖有抛光浆料的抛光布的表面压在半导体晶片的表面上，并使半导体晶片相对于抛光布移动以抛光半导体晶片的表面。 从抛光布表面流出的排出的浆料通过排出的浆料管排出。 超声波的应用允许在浆料供给管中的研磨浆中附着的磨料颗粒在抛光浆料中再分散成各种形式。
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公开(公告)号：US20060244191A1
公开(公告)日：2006-11-02
申请号：US11374058
申请日：2006-03-14
Applicant: Kou Sugano , Yuichi Miyoshi , Kazushige Adachi
Inventor： Kou Sugano , Yuichi Miyoshi , Kazushige Adachi
IPC: B23Q3/00
CPC classification number: H01L21/00
Abstract: A chip holder includes: a lower holder plate with a first through hole; and an upper holder plate with a second through hole. An object to be treated is held movably in a holding space formed of the first through hole and the second through hole in assembling the lower holder plate and the upper holder plate.
Abstract translation: 芯片保持器包括：具有第一通孔的下保持器板; 和具有第二通孔的上支架板。 在组装下保持板和上保持板的过程中，待处理物体可移动地保持在由第一通孔和第二通孔形成的保持空间中。
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3.发明授权Molding process and apparatus for transferring plural molds to plural stations 失效用于将多个模具转移到多个站的成型工艺和设备
公开(公告)号：US5075051A
公开(公告)日：1991-12-24
申请号：US385364
申请日：1989-07-27
Applicant: Kazuhiko Ito , Eiichi Yamazaki , Kunio Ohtaki , Fumio Korayashi , Yoshihisa Masuda , Hiroshi Nakanishi , Kiyozo Suzuki , Yuichi Miyoshi
Inventor： Kazuhiko Ito , Eiichi Yamazaki , Kunio Ohtaki , Fumio Korayashi , Yoshihisa Masuda , Hiroshi Nakanishi , Kiyozo Suzuki , Yuichi Miyoshi
CPC classification number: B29D11/00432 , B29C45/0433 , B29C45/76
Abstract: A molding apparatus transfers plural molds in succession through a temperature elevating step, an injection molding step, pressurized cooling step and a molded article removing step. The apparatus is provided with plural cooling presses for the pressurized cooling step and so constructed as to prevent the stagnation in the transfer of the molds according to the molding conditions and the number of molds.
Abstract translation: 成型设备通过升温步骤，注射成型步骤，加压冷却步骤和模制品去除步骤连续地传送多个模具。 该设备设置有用于加压冷却步骤的多个冷却压机，并且被构造成防止根据成型条件和模具数量的模具的传送停滞。
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公开(公告)号：US08166827B2
公开(公告)日：2012-05-01
申请号：US12436374
申请日：2009-05-06
Applicant: Yuichi Miyoshi , Tohru Yamaoka , Hidenori Notake , Yusuke Takeuchi
Inventor： Yuichi Miyoshi , Tohru Yamaoka , Hidenori Notake , Yusuke Takeuchi
IPC: G01L9/06
CPC classification number: B81C1/00158 , B81B2201/0257 , B81C2201/0133 , G01P15/0802 , G01P15/097 , G01P15/123
Abstract: A MEMS device, including: a substrate having a first principal plane and a second principal plane opposite to the first principal plane; a through hole formed in the substrate; and a vibrating film formed over the first principal plane so as to cover the through hole. The first principal plane and the second principal plane are both a (110) crystal face; and the through hole has a substantially rhombic shape on the second principal plane.
Abstract translation: 一种MEMS器件，包括：具有第一主平面和与第一主平面相对的第二主平面的衬底; 形成在基板中的通孔; 以及形成在所述第一主平面上以覆盖所述通孔的振动膜。 第一主平面和第二主平面都是（110）晶面; 并且通孔在第二主平面上具有基本上菱形的形状。
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公开(公告)号：US20110042763A1
公开(公告)日：2011-02-24
申请号：US12938007
申请日：2010-11-02
Applicant: Tohru YAMAOKA , Yuichi Miyoshi
Inventor： Tohru YAMAOKA , Yuichi Miyoshi
IPC: H01L29/84
CPC classification number: H04R19/005 , B81B3/0086 , B81B2201/0257 , H04R19/016 , H04R19/04 , H04R2410/03
Abstract: A MEMS device includes a first insulating film formed on a semiconductor substrate, a vibrating film formed on the first insulating film, and a fixed film above the vibrating film with an air gap being interposed therebetween. The semiconductor substrate has a region containing N-type majority carriers. A concentration of N-type majority carriers in a portion of the semiconductor substrate where the semiconductor substrate contacts the first insulating film, is higher than a concentration of N-type majority carriers in the other portion of the semiconductor substrate.
Abstract translation: MEMS器件包括形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的振动膜和位于振动膜上方的固定膜，其间夹有气隙。 半导体衬底具有包含N型多数载流子的区域。 在半导体衬底与第一绝缘膜接触的半导体衬底的一部分中的N型多数载流子的浓度高于半导体衬底的另一部分中的N型多数载流子的浓度。
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Patent Agency Ranking
公开(公告)号：US07847359B2
公开(公告)日：2010-12-07
申请号：US12622975
申请日：2009-11-20
Applicant: Tohru Yamaoka , Yuichi Miyoshi
Inventor： Tohru Yamaoka , Yuichi Miyoshi
CPC classification number: H04R19/005 , B81B3/0086 , B81B2201/0257 , H04R19/016 , H04R19/04 , H04R2410/03
Abstract: A MEMS device includes a first insulating film formed on a semiconductor substrate, a vibrating film formed on the first insulating film, and a fixed film above the vibrating film with an air gap being interposed therebetween. The semiconductor substrate has a region containing N-type majority carriers. A concentration of N-type majority carriers in a portion of the semiconductor substrate where the semiconductor substrate contacts the first insulating film, is higher than a concentration of N-type majority carriers in the other portion of the semiconductor substrate.
Abstract translation: MEMS器件包括形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的振动膜和位于振动膜上方的固定膜，其间夹有气隙。 半导体衬底具有包含N型多数载流子的区域。 在半导体衬底与第一绝缘膜接触的半导体衬底的一部分中的N型多数载流子的浓度高于半导体衬底的另一部分中的N型多数载流子的浓度。
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公开(公告)号：US20100065932A1
公开(公告)日：2010-03-18
申请号：US12622975
申请日：2009-11-20
Applicant: Tohru Yamaoka , Yuichi Miyoshi
Inventor： Tohru Yamaoka , Yuichi Miyoshi
IPC: H01L29/84
CPC classification number: H04R19/005 , B81B3/0086 , B81B2201/0257 , H04R19/016 , H04R19/04 , H04R2410/03
Abstract: A MEMS device includes a first insulating film formed on a semiconductor substrate, a vibrating film formed on the first insulating film, and a fixed film above the vibrating film with an air gap being interposed therebetween. The semiconductor substrate has a region containing N-type majority carriers. A concentration of N-type majority carriers in a portion of the semiconductor substrate where the semiconductor substrate contacts the first insulating film, is higher than a concentration of N-type majority carriers in the other portion of the semiconductor substrate.
Abstract translation: MEMS器件包括形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的振动膜和位于振动膜上方的固定膜，其间夹有气隙。 半导体衬底具有包含N型多数载流子的区域。 在半导体衬底与第一绝缘膜接触的半导体衬底的一部分中的N型多数载流子的浓度高于半导体衬底的另一部分中的N型多数载流子的浓度。
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公开(公告)号：US20070029894A1
公开(公告)日：2007-02-08
申请号：US10576518
申请日：2004-11-12
Applicant: Tohru Yamaoka , Hiroshi Ogura , Yuichi Miyoshi , Tomoyuki Sasaki
Inventor： Tohru Yamaoka , Hiroshi Ogura , Yuichi Miyoshi , Tomoyuki Sasaki
IPC: H01L41/00
CPC classification number: H01G5/0136 , H01G5/16 , H01G7/025 , H04R19/016 , H04R2499/11
Abstract: A silicon nitride film (103) and a silicon nitride film (106) are formed to cover a charged silicon oxide film (105) serving as an electret.
Abstract translation: 形成氮化硅膜（103）和氮化硅膜（106），以覆盖用作驻极体的带电氧化硅膜（105）。
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9.发明授权Method of removing reaction product due to plasma ashing of a resist pattern 失效由于抗蚀剂图案的等离子体灰化而消除反应产物的方法公开(公告)号：US06451707B2
公开(公告)日：2002-09-17
申请号：US09729202
申请日：2000-12-05
Applicant: Toshihiko Nagai , Yuichi Miyoshi
Inventor： Toshihiko Nagai , Yuichi Miyoshi
IPC: H01L21461
CPC classification number: H01L21/76805 , H01L21/31116 , H01L21/76814
Abstract: After forming a processed film onto the underlying film formed on the substrate, the processed film is dry etched using a mask pattern so as to form an etched pattern. After the reaction product deposited on a wall of the etched pattern is removed by using the first cleaning solution having relatively low power to etch the processed film and the second cleaning solution having relatively high power to etch the processed film in that order, the etched pattern or its vicinity is rinsed with water.
Abstract translation: 在形成在基板上的底层膜上形成加工膜之后，使用掩模图案对经处理的膜进行干蚀刻以形成蚀刻图案。 在沉积在蚀刻图案的壁上的反应产物通过使用具有相对较低功率的第一清洗溶液去除以蚀刻经处理的膜并且具有相对较高功率的第二清洁溶液以该顺序蚀刻经处理的膜之后被去除时， 或其附近用水冲洗。
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10.发明授权Substrate holder, method for polishing substrate, and method for fabricating semiconductor device 失效基板支架，基板抛光方法及半导体装置的制造方法公开(公告)号：US06251000B1
公开(公告)日：2001-06-26
申请号：US09398819
申请日：1999-09-20
Applicant: Tomoyasu Murakami , Katsuyuki Ikenouchi , Yuichi Miyoshi
Inventor： Tomoyasu Murakami , Katsuyuki Ikenouchi , Yuichi Miyoshi
IPC: B24B4106
CPC classification number: B24B37/30
Abstract: A substrate holder for holding a substrate to be polished thereon and pressing the substrate against a polishing pad includes a substrate-holding head for holding the substrate thereon and pressing the substrate against the polishing pad. The substrate-holding head is disposed to be vertically movable toward/away from the polishing pad. A pressing member for pressing a peripheral region of the substrate, except for an outer edge region thereof, against the polishing pad is attached to the substrate-holding head.
Abstract translation: 用于保持要在其上抛光的基板并将基板按压在抛光垫上的基板保持器包括用于在其上保持基板并将基板压靠在抛光垫上的基板保持头。 基板保持头设置成能够朝向/远离抛光垫垂直移动。 将用于将基板的外围区域除外的按压构件压靠在研磨垫上的按压部件安装在基板固定头上。
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