公开(公告)号：US06291350B1

公开(公告)日：2001-09-18

申请号：US09127819

申请日：1998-08-03

Applicant: Shin Hashimoto ,  Yuichi Miyoshi

Inventor： Shin Hashimoto ,  Yuichi Miyoshi

IPC: H01L21302

CPC classification number: B24B37/04 ,  B24B1/04 ,  B24B57/02

Abstract: An ultrasonic transmitting unit transmits an ultrasonic wave to a slurry supply pipe. A polishing slurry is conveyed under pressure from a slurry supply tank to a slurry outlet via the slurry supply pipe and supplied from the slurry outlet to a surface of a polishing cloth. A wafer carrier holding a semiconductor wafer presses a surface of the semiconductor wafer against the surface of the polishing cloth coated with the polishing slurry and moves the semiconductor wafer relative to the polishing cloth to polish the surface of the semiconductor wafer. A discharged slurry flown out of the surface of the polishing cloth is discharged via a discharged slurry pipe. The application of the ultrasonic wave allows abrasive particles agglomerated in the polishing slurry in the slurry supply pipe to be re-dispersed into individual forms in the polishing slurry.

Abstract translation: 超声波发送单元向浆料供给管发送超声波。 抛光浆料在压力下通过浆料供给管从浆料供应罐输送到浆料出口，并从浆料出口供给到抛光布的表面。 保持半导体晶片的晶片载体将覆盖有抛光浆料的抛光布的表面压在半导体晶片的表面上，并使半导体晶片相对于抛光布移动以抛光半导体晶片的表面。 从抛光布表面流出的排出的浆料通过排出的浆料管排出。 超声波的应用允许在浆料供给管中的研磨浆中附着的磨料颗粒在抛光浆料中再分散成各种形式。

公开(公告)号：US08679955B2

公开(公告)日：2014-03-25

申请号：US13202419

申请日：2010-02-10

Applicant: Shin Hashimoto ,  Katsushi Akita ,  Kensaku Motoki ,  Hideaki Nakahata ,  Shinsuke Fujiwara

Inventor： Shin Hashimoto ,  Katsushi Akita ,  Kensaku Motoki ,  Hideaki Nakahata ,  Shinsuke Fujiwara

IPC: H01L21/20

CPC classification number: H01L21/0262 ,  C30B25/02 ,  C30B29/16 ,  C30B29/403 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L33/007

Abstract: A method for forming an epitaxial wafer is provided as one enabling growth of a gallium nitride based semiconductor with good crystal quality on a gallium oxide region. In step S107, an AlN buffer layer 13 is grown. In step S108, at a time t5, a source gas G1 containing hydrogen, trimethylaluminum, and ammonia, in addition to nitrogen, is supplied into a growth reactor 10 to grow the AlN buffer layer 13 on a primary surface 11a. The AlN buffer layer 13 is so called a low-temperature buffer layer. After a start of film formation of the buffer layer 13, in step S109 supply of hydrogen (H2) is started at a time t6. At the time t6, H2, N2, TMA, and NH3 are supplied into the growth reactor 10. A supply amount of hydrogen is increased between times t6 and t7, and at the time t7 the increase of hydrogen is terminated to supply a constant amount of hydrogen. At the time t7, H2, TMA, and NH3 are supplied into the growth reactor 10.

Abstract translation: 提供了一种用于形成外延晶片的方法，其可以在氧化镓区域上使得能够以良好的晶体质量生长氮化镓基半导体。 在步骤S107中，生长AlN缓冲层13。 在步骤S108中，在时刻t5，将除了氮以外的氢，三甲基铝和氨的原料气G1供给到生长反应器10中，以在主面11a上生长AlN缓冲层13。 AlN缓冲层13被称为低温缓冲层。 在开始形成缓冲层13之后，在步骤S109中，在时刻t6开始供给氢（H2）。 在时间t6，H2，N2，TMA和NH3被供应到生长反应器10中。在时间t6和t7之间，氢的供应量增加，而在时间t7，氢的增加被终止以提供恒定的量 的氢。 在时间t7，将H2，TMA和NH3供应到生长反应器10中。

公开(公告)号：US08633514B2

公开(公告)日：2014-01-21

申请号：US13409798

申请日：2012-03-01

Applicant: Shin Hashimoto ,  Tatsuya Tanabe ,  Katsushi Akita ,  Hideaki Nakahata ,  Hiroshi Amano

Inventor： Shin Hashimoto ,  Tatsuya Tanabe ,  Katsushi Akita ,  Hideaki Nakahata ,  Hiroshi Amano

IPC: H01L29/66

CPC classification number: H01L29/7787 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/02661 ,  H01L29/2003 ,  H01L29/66212 ,  H01L29/66462 ,  H01L29/872

Abstract: A group III nitride semiconductor device and a group III nitride semiconductor wafer are provided. The group III nitride semiconductor device has a channel layer comprising group III nitride-based semiconductor containing Al. The group III nitride semiconductor device can enhance the mobility of the two-dimensional electron gas and improve current characteristics. The group III nitride semiconductor wafer is used to make the group III nitride semiconductor device. The group III nitride semiconductor wafer comprises a substrate made of AlXGa1-XN (0

Abstract translation: 提供III族氮化物半导体器件和III族氮化物半导体晶片。 III族氮化物半导体器件具有包含含有Al的III族氮化物基半导体的沟道层。 III族氮化物半导体器件可以增强二维电子气的迁移率并改善电流特性。 III族氮化物半导体晶片用于制造III族氮化物半导体器件。 III族氮化物半导体晶片包括由AlXGa1-XN（0

公开(公告)号：US20120211801A1

公开(公告)日：2012-08-23

申请号：US13392998

申请日：2010-08-23

Applicant: Shin Hashimoto ,  Katsushi Akita ,  Hideaki Nakahata ,  Hiroshi Amano

Inventor： Shin Hashimoto ,  Katsushi Akita ,  Hideaki Nakahata ,  Hiroshi Amano

IPC: H01L29/778 ,  H01L29/205

CPC classification number: H01L29/7785 ,  H01L29/2003

Abstract: There is provided a normally-off group III nitride semiconductor device having a high breakdown field strength and minimal crystal defects, and a group III nitride laminated semiconductor wafer used to make the group III nitride semiconductor device. The group III nitride laminated semiconductor wafer 10 includes a substrate 27 which is made of AlN and has a main surface 27a along the c-axis of the AlN crystal, a first AlX1InY1Ga1-X1-Y1N layer 13 which is made of a group III nitride-based semiconductor containing Al and is provided on the main surface 27a, and a second AlX2InY2Ga1-X2-Y2N layer 15 which is provided on the main surface 27a, is made of a group III nitride-based semiconductor having a larger bandgap than the first AlX1InY1Ga1-X1-Y1N layer 13, and forms a heterojunction with the first AlX1InY1Ga1-X1-Y1N layer 13.

Abstract translation: 提供了具有高击穿场强度和最小晶体缺陷的常规III族氮化物半导体器件，以及用于制造III族氮化物半导体器件的III族氮化物层压半导体晶片。 III族氮化物层叠半导体晶片10包括由AlN制成并具有沿AlN晶体的c轴的主表面27a的基板27，由III族氮化物制成的第一AlX1InY1Ga1-X1-Y1N层13 包含Al并且设置在主表面27a上，并且设置在主表面27a上的第二AlX2InY2Ga1-X2-Y2N层15由具有比第一个更大的带隙的III族氮化物基半导体制成 AlX1InY1Ga1-X1-Y1N层13，与第一AlX1InY1Ga1-X1-Y1N层13形成异质结。

公开(公告)号：US20120070929A1

公开(公告)日：2012-03-22

申请号：US13318039

申请日：2010-03-01

Applicant: Shin Hashimoto ,  Katsushi Akita ,  Kensaku Motoki ,  Shinsuke Fujiwara ,  Hideaki Nakahata

Inventor： Shin Hashimoto ,  Katsushi Akita ,  Kensaku Motoki ,  Shinsuke Fujiwara ,  Hideaki Nakahata

IPC: H01L33/36 ,  H01L21/20

CPC classification number: C23C16/0227 ,  C23C16/0272 ,  C23C16/303 ,  C30B25/183 ,  C30B29/406 ,  H01L33/007

Abstract: Provided is a method for fabricating a wafer product including an active layer grown on a gallium oxide substrate and allowing an improvement in emission intensity. In step S105, a buffer layer 13 comprised of a Group III nitride such as GaN, AlGaN, or AlN is grown at 600 Celsius degrees on a primary surface 11a of a gallium oxide substrate 11. After the growth of the buffer layer 13, while supplying a gas G2, which contains hydrogen and nitrogen, into a growth reactor 10, the gallium oxide substrate 11 and the buffer layer 13 are exposed to an atmosphere in the growth reactor 11 at 1050 Celsius degrees. A Group III nitride semiconductor layer 15 is grown on the modified buffer layer. The modified buffer layer includes, for example, voids. The Group III nitride semiconductor layer 15 can be comprised of GaN and AlGaN. When the Group III nitride semiconductor layer 15 is formed of these materials, excellent crystal quality is obtained on the modified buffer layer 14.

Abstract translation: 本发明提供一种制造晶片产品的方法，该晶片产品包括在氧化镓衬底上生长的有源层并且能够提高发光强度。 在步骤S105中，在氧化镓衬底11的主表面11a上以600摄氏度生长由诸如GaN，AlGaN或AlN的III族氮化物构成的缓冲层13.在缓冲层13生长之后，同时 将含有氢和氮的气体G2供给到生长反应器10中，将氧化镓衬底11和缓冲层13在生长反应器11中的气氛中以1050摄氏度暴露。 在改性缓冲层上生长III族氮化物半导体层15。 改性缓冲层包括例如空隙。 III族氮化物半导体层15可以由GaN和AlGaN构成。 当由这些材料形成III族氮化物半导体层15时，在改性缓冲层14上获得优异的晶体质量。

公开(公告)号：US07943964B2

公开(公告)日：2011-05-17

申请号：US12096986

申请日：2006-10-16

Applicant: Shinsuke Fujiwara ,  Tomoki Uemura ,  Takuji Okahisa ,  Koji Uematsu ,  Manabu Okui ,  Muneyuki Nishioka ,  Shin Hashimoto

Inventor： Shinsuke Fujiwara ,  Tomoki Uemura ,  Takuji Okahisa ,  Koji Uematsu ,  Manabu Okui ,  Muneyuki Nishioka ,  Shin Hashimoto

IPC: H01L33/30

CPC classification number: H01L21/02658 ,  C30B25/02 ,  C30B29/403 ,  H01L21/02389 ,  H01L21/0254

Abstract: An AlxGayIn1-x-yN crystal substrate of the present invention has a main plane having an area of at least 10 cm2. The main plane has an outer region located within 5 mm from an outer periphery of the main plane, and an inner region corresponding to a region other than the outer region. The inner region has a total dislocation density of at least 1×102 cm−2 and at most 1×106 cm−2. It is thereby possible to provide an AlxGayIn1-x-yN crystal substrate having a large size and a suitable dislocation density for serving as a substrate for a semiconductor device, a semiconductor device including the AlxGayIn1-x-yN crystal substrate, and a method of manufacturing the same.

Abstract translation: 本发明的Al x Ga y In 1-x-y N晶体基板具有面积为至少10cm 2的主平面。 主平面具有位于与主平面的外周5mm以内的外部区域和与外部区域以外的区域对应的内部区域。 内部区域的总位错密度为1×102cm 2以上且1×10 6 cm -2以下。 由此，可以提供具有大尺寸和合适的位错密度的Al x Ga y In 1-x-y N晶体基板，用作半导体器件的基板，包括Al x Ga y In 1-x-y N晶体基板的半导体器件，以及 制造相同。

公开(公告)号：US07884393B2

公开(公告)日：2011-02-08

申请号：US12786440

申请日：2010-05-25

Applicant: Shin Hashimoto ,  Makoto Kiyama ,  Takashi Sakurada ,  Tatsuya Tanabe ,  Kouhei Miura ,  Tomihito Miyazaki

Inventor： Shin Hashimoto ,  Makoto Kiyama ,  Takashi Sakurada ,  Tatsuya Tanabe ,  Kouhei Miura ,  Tomihito Miyazaki

IPC: H01L29/778

CPC classification number: H01L29/7787 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/0262 ,  H01L29/2003 ,  H01L29/66462

Abstract: Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor (11) is provided with a supporting substrate (13) composed of gallium nitride, a buffer layer (15) composed of a first gallium nitride semiconductor, a channel layer (17) composed of a second gallium nitride semiconductor, a semiconductor layer (19) composed of a third gallium nitride semiconductor, and electrode structures (a gate electrode (21), a source electrode (23) and a drain electrode (25) for the transistor (11). The band gap of the third gallium nitride semiconductor is broader than that of the second gallium nitride semiconductor. The carbon concentration NC1 of the first gallium nitride semiconductor is 4×1017 cm−3 or more. The carbon concentration NC2 of the second gallium nitride semiconductor is less than 4×1016 cm−3.

Abstract translation: 提供具有高纯度沟道层和高电阻缓冲层的高电子迁移率晶体管。 高电子迁移率晶体管（11）设置有由氮化镓构成的支撑基板（13），由第一氮化镓半导体构成的缓冲层（15），由第二氮化镓半导体构成的沟道层（17） 由第三氮化镓半导体构成的半导体层（19）和用于晶体管（11）的电极结构（栅电极（21），源电极（23）和漏电极（25）），带隙 第三氮化镓半导体的第二氮化镓半导体的碳浓度NC2比第二氮化镓半导体的碳浓度小于4×10 17 cm -3以上， 1016厘米-3。

公开(公告)号：US07749828B2

公开(公告)日：2010-07-06

申请号：US11571156

申请日：2006-03-03

Applicant: Shin Hashimoto ,  Makoto Kiyama ,  Takashi Sakurada ,  Tatsuya Tanabe ,  Kouhei Miura ,  Tomihito Miyazaki

Inventor： Shin Hashimoto ,  Makoto Kiyama ,  Takashi Sakurada ,  Tatsuya Tanabe ,  Kouhei Miura ,  Tomihito Miyazaki

IPC: H01L21/338

CPC classification number: H01L29/7787 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/0262 ,  H01L29/2003 ,  H01L29/66462

Abstract: Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor 11 is provided with a supporting substrate 13 composed of gallium nitride, a buffer layer 15 composed of a first gallium nitride semiconductor, a channel layer 17 composed of a second gallium nitride semiconductor, a semiconductor layer 19 composed of a third gallium nitride semiconductor, and electrode structures (a gate electrode 21, a source electrode 23 and a drain electrode 25) for the transistor 11. The band gap of the third gallium nitride semiconductor is broader than that of the second gallium nitride semiconductor. The carbon concentration NC1 of the first gallium nitride semiconductor is 4×1017 cm−3 or more. The carbon concentration NC2 of the second gallium nitride semiconductor is less than 4×1016 cm−3.

Abstract translation: 提供具有高纯度沟道层和高电阻缓冲层的高电子迁移率晶体管。 高电子迁移率晶体管11设置有由氮化镓构成的支撑基板13，由第一氮化镓半导体构成的缓冲层15，由第二氮化镓半导体构成的沟道层17，由第三氮化镓半导体构成的半导体层19 氮化镓半导体，以及用于晶体管11的电极结构（栅电极21，源电极23和漏电极25）。第三氮化镓半导体的带隙比第二氮化镓半导体的带隙宽。 第一氮化镓半导体的碳浓度NC1为4×1017cm-3以上。 第二氮化镓半导体的碳浓度NC2小于4×1016cm-3。

公开(公告)号：US20060199480A1

公开(公告)日：2006-09-07

申请号：US11406459

申请日：2006-04-19

Applicant: Akihiro Tanoue ,  Yoshiharu Hidaka ,  Shin Hashimoto

Inventor： Akihiro Tanoue ,  Yoshiharu Hidaka ,  Shin Hashimoto

IPC: B24B7/00

CPC classification number: B24B37/04 ,  B24B57/02

Abstract: A slurry feeding apparatus includes closed slurry bottle, piping, wet nitrogen generator, wet nitrogen supply pipe, suction and spray nozzles, temperature regulator, flow rate control valves, slurry delivery pump and controller for controlling the operation and flow rate of the slurry delivery pump. While a wafer is being polished by a CMP polisher, the controller continuously operates the pump. On the other hand, while the polisher is idling, the controller starts and stops the pump intermittently at regular intervals. No stirrer like a propeller is inserted into the slurry bottle, but the slurry is stirred up by spraying the slurry through the spray nozzle.

公开(公告)号：US07052377B2

公开(公告)日：2006-05-30

申请号：US10866040

申请日：2004-06-14

Applicant: Akihiro Tanoue ,  Yoshiharu Hidaka ,  Shin Hashimoto

Inventor： Akihiro Tanoue ,  Yoshiharu Hidaka ,  Shin Hashimoto

IPC: B24C7/00

CPC classification number: B24B37/04 ,  B24B57/02

Abstract: A slurry feeding apparatus includes closed slurry bottle, piping, wet nitrogen generator, wet nitrogen supply pipe, suction and spray nozzles, temperature regulator, flow rate control valves, slurry delivery pump and controller for controlling the operation and flow rate of the slurry delivery pump. While a wafer is being polished by a CMP polisher, the controller continuously operates the pump. On the other hand, while the polisher is idling, the controller starts and stops the pump intermittently at regular intervals. No stirrer like a propeller is inserted into the slurry bottle, but the slurry is stirred up by spraying the slurry through the spray nozzle.