公开(公告)号：US08294155B2

公开(公告)日：2012-10-23

申请号：US13187584

申请日：2011-07-21

申请人： Shunpei Yamazaki ,  Yoshiyuki Kurokawa ,  Yasuhiro Jinbo ,  Satoshi Kobayashi ,  Daisuke Kawae

发明人： Shunpei Yamazaki ,  Yoshiyuki Kurokawa ,  Yasuhiro Jinbo ,  Satoshi Kobayashi ,  Daisuke Kawae

IPC分类号： H01L29/10

CPC分类号： H01L29/4908 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78696

摘要： A thin film transistor with excellent electric characteristics, a display device having the thin film transistor, and a method for manufacturing the thin film transistor and the display device are proposed. The thin film transistor includes a gate insulating film formed over a gate electrode, a microcrystalline semiconductor film formed over the gate insulating film, a buffer layer formed over the microcrystalline semiconductor film, a pair of semiconductor films to which an impurity element imparting one conductivity type is added and which are formed over the buffer layer, and wirings formed over the pair of semiconductor films to which the impurity element imparting one conductivity type is added. A part of the gate insulating film or the entire gate insulating film, and/or a part of the microcrystalline semiconductor or the entire microcrystalline semiconductor includes an impurity element which serves as a donor.

摘要翻译： 提出了具有优异电特性的薄膜晶体管，具有薄膜晶体管的显示装置，以及制造薄膜晶体管和显示装置的方法。 薄膜晶体管包括形成在栅电极上的栅极绝缘膜，形成在栅极绝缘膜上的微晶半导体膜，形成在微晶半导体膜上的缓冲层，一对半导体膜，赋予一种导电型的杂质元素 并且形成在缓冲层之上，并且在添加有赋予一种导电类型的杂质元素的一对半导体膜上形成的布线。 栅极绝缘膜或整个栅极绝缘膜的一部分和/或微晶半导体的一部分或整个微晶半导体包括用作供体的杂质元素。

公开(公告)号：US07989332B2

公开(公告)日：2011-08-02

申请号：US12839669

申请日：2010-07-20

申请人： Shunpei Yamazaki ,  Yoshiyuki Kurokawa ,  Yasuhiro Jinbo ,  Satoshi Kobayashi ,  Daisuke Kawae

发明人： Shunpei Yamazaki ,  Yoshiyuki Kurokawa ,  Yasuhiro Jinbo ,  Satoshi Kobayashi ,  Daisuke Kawae

IPC分类号： H01L21/3205

CPC分类号： H01L29/4908 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78696

摘要： A thin film transistor with excellent electric characteristics, a display device having the thin film transistor, and a method for manufacturing the thin film transistor and the display device are proposed. The thin film transistor includes a gate insulating film formed over a gate electrode, a microcrystalline semiconductor film formed over the gate insulating film, a buffer layer formed over the microcrystalline semiconductor film, a pair of semiconductor films to which an impurity element imparting one conductivity type is added and which are formed over the buffer layer, and wirings formed over the pair of semiconductor films to which the impurity element imparting one conductivity type is added. A part of the gate insulating film or the entire gate insulating film, and/or a part of the microcrystalline semiconductor or the entire microcrystalline semiconductor includes an impurity element which serves as a donor.

摘要翻译： 提出了具有优异电特性的薄膜晶体管，具有薄膜晶体管的显示装置，以及制造薄膜晶体管和显示装置的方法。 薄膜晶体管包括形成在栅电极上的栅极绝缘膜，形成在栅极绝缘膜上的微晶半导体膜，形成在微晶半导体膜上的缓冲层，一对半导体膜，赋予一种导电型的杂质元素 并且形成在缓冲层之上，并且在添加有赋予一种导电类型的杂质元素的一对半导体膜上形成的布线。 栅极绝缘膜或整个栅极绝缘膜的一部分和/或微晶半导体的一部分或整个微晶半导体包括用作供体的杂质元素。

公开(公告)号：US07808000B2

公开(公告)日：2010-10-05

申请号：US12243097

申请日：2008-10-01

申请人： Shunpei Yamazaki ,  Yoshiyuki Kurokawa ,  Yasuhiro Jinbo ,  Satoshi Kobayashi ,  Daisuke Kawae

发明人： Shunpei Yamazaki ,  Yoshiyuki Kurokawa ,  Yasuhiro Jinbo ,  Satoshi Kobayashi ,  Daisuke Kawae

IPC分类号： H01L29/10

CPC分类号： H01L29/4908 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78696

摘要： A thin film transistor with excellent electric characteristics, a display device having the thin film transistor, and a method for manufacturing the thin film transistor and the display device are proposed. The thin film transistor includes a gate insulating film formed over a gate electrode, a microcrystalline semiconductor film formed over the gate insulating film, a buffer layer formed over the microcrystalline semiconductor film, a pair of semiconductor films to which an impurity element imparting one conductivity type is added and which are formed over the buffer layer, and wirings formed over the pair of semiconductor films to which the impurity element imparting one conductivity type is added. A part of the gate insulating film or the entire gate insulating film, and/or a part of the microcrystalline semiconductor or the entire microcrystalline semiconductor includes an impurity element which serves as a donor.

摘要翻译： 提出了具有优异电特性的薄膜晶体管，具有薄膜晶体管的显示装置，以及制造薄膜晶体管和显示装置的方法。 薄膜晶体管包括形成在栅电极上的栅极绝缘膜，形成在栅极绝缘膜上的微晶半导体膜，形成在微晶半导体膜上的缓冲层，一对半导体膜，赋予一种导电型的杂质元素 并且形成在缓冲层之上，并且在添加有赋予一种导电类型的杂质元素的一对半导体膜上形成的布线。 栅极绝缘膜或整个栅极绝缘膜的一部分和/或微晶半导体的一部分或整个微晶半导体包括用作供体的杂质元素。

公开(公告)号：US08637866B2

公开(公告)日：2014-01-28

申请号：US12490447

申请日：2009-06-24

申请人： Toshiyuki Isa ,  Yasuhiro Jinbo ,  Sachiaki Tezuka ,  Koji Dairiki ,  Hidekazu Miyairi ,  Shunpei Yamazaki ,  Takuya Hirohashi

发明人： Toshiyuki Isa ,  Yasuhiro Jinbo ,  Sachiaki Tezuka ,  Koji Dairiki ,  Hidekazu Miyairi ,  Shunpei Yamazaki ,  Takuya Hirohashi

IPC分类号： H01L29/72

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

摘要： A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.

摘要翻译： 至少在源区和漏区侧，薄膜晶体管包括作为缓冲层的半导体层，该半导体层含有氮并且包括在栅极绝缘层和源极和漏极区之间的非晶结构中的晶体区域。 与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。 此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。

公开(公告)号：US07927991B2

公开(公告)日：2011-04-19

申请号：US11839349

申请日：2007-08-15

申请人： Hidekazu Miyairi ,  Yasuhiro Jinbo ,  Eiji Higa ,  Shunpei Yamazaki

发明人： Hidekazu Miyairi ,  Yasuhiro Jinbo ,  Eiji Higa ,  Shunpei Yamazaki

IPC分类号： H01L21/20 ,  H01L21/3205

CPC分类号： H01L27/1288 ,  B23K26/0884 ,  B23K2101/006 ,  G03F1/20 ,  H01L21/3086 ,  H01L21/32139 ,  H01L27/1214 ,  H01L29/42384 ,  H01L29/66765

摘要： In a manufacturing process of a semiconductor device, a manufacturing technique for reducing the number of lithography processes that use a photoresist and simplifying the process is provided, which improves throughput. An etching mask for forming a pattern of a layer to be processed such as a conductive layer or a semiconductor layer is manufactured without using a lithography technique that uses a photoresist. The etching mask is formed of a light absorption layer including a material which absorbs a laser beam. The mask is formed by irradiating the light absorption layer with a laser beam through a photomask and utilizing laser ablation by energy of the laser beam absorbed by the light absorption layer.

摘要翻译： 在半导体器件的制造工艺中，提供了减少使用光致抗蚀剂并简化工艺的光刻工艺的数量的制造技术，这提高了生产率。 在不使用使用光致抗蚀剂的光刻技术的情况下，制造用于形成诸如导电层或半导体层的被处理层的图案的蚀刻掩模。 蚀刻掩模由包括吸收激光束的材料的光吸收层形成。 通过光掩模用激光束照射光吸收层并利用由光吸收层吸收的激光束的能量进行激光烧蚀来形成掩模。

公开(公告)号：US08823023B2

公开(公告)日：2014-09-02

申请号：US13542693

申请日：2012-07-06

申请人： Yasuhiro Jinbo ,  Masafumi Morisue ,  Hajime Kimura ,  Shunpei Yamazaki

发明人： Yasuhiro Jinbo ,  Masafumi Morisue ,  Hajime Kimura ,  Shunpei Yamazaki

IPC分类号： H01L29/18 ,  H01L33/00 ,  H01L27/12

CPC分类号： H01L27/1266 ,  G02F1/133305 ,  G02F1/133603 ,  H01L21/6835 ,  H01L27/1214 ,  H01L27/153 ,  H01L33/0079 ,  H01L33/62 ,  H01L51/003 ,  H01L2221/68318 ,  H01L2221/68386

摘要： The present invention provides a manufacturing technique of a semiconductor device and a display device using a peeling process, in which a transfer process can be conducted with a good state in which a shape and property of an element before peeling are kept. Further, the present invention provides a manufacturing technique of more highly reliable semiconductor devices and display devices with high yield without complicating the apparatus and the process for manufacturing. According to the present invention, an organic compound layer including a photocatalyst substance is formed over a first substrate having a light-transmitting property, an element layer is formed over the organic compound layer including a photocatalyst substance, the organic compound layer including a photocatalyst substance is irradiated with light which has passed through the first substrate, and the element layer is peeled from the first substrate.

摘要翻译： 本发明提供一种使用剥离工艺的半导体器件和显示装置的制造技术，其中可以以保持剥离之前元件的形状和特性的良好状态进行转印处理。 此外，本发明提供了一种更高可靠性的高可靠性的半导体器件和显示器件的制造技术，而不会使器件和制造过程复杂化。 根据本发明，在具有透光性的第一基板上形成包含光催化剂物质的有机化合物层，在包含光催化剂物质的有机化合物层上形成元素层，所述有机化合物层包含光催化剂物质 被穿过第一衬底的光照射，并且元件层从第一衬底剥离。

公开(公告)号：US07611930B2

公开(公告)日：2009-11-03

申请号：US12186001

申请日：2008-08-05

申请人： Shunpei Yamazaki ,  Sachiaki Teduka ,  Makoto Furuno ,  Satoshi Toriumi ,  Yasuhiro Jinbo ,  Koji Dairiki

发明人： Shunpei Yamazaki ,  Sachiaki Teduka ,  Makoto Furuno ,  Satoshi Toriumi ,  Yasuhiro Jinbo ,  Koji Dairiki

IPC分类号： H01L21/84

CPC分类号： H01L29/04 ,  H01L21/0262 ,  H01L27/1222 ,  H01L27/127 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78696

摘要： In a case of forming a bottom-gate thin film transistor, a step of forming a microcrystalline semiconductor film over a gate insulating film by a plasma CVD method, and a step of forming an amorphous semiconductor film over the microcrystalline semiconductor film are performed. In the step of forming the microcrystalline semiconductor film, the pressure in the reaction chamber is set at or below 10−5 Pa once, the substrate temperature is set in the range of 120° C. to 220° C., plasma is generated by introducing hydrogen and a silicon gas, hydrogen plasma is made to act on a reaction product formed on a surface of the gate insulating film to perform removal while performing film formation. Moreover, the plasma is generated by applying a first high-frequency electric power of an HF band a second high-frequency electric power of a VHF band superimposed on each other.

摘要翻译： 在形成底栅极薄膜晶体管的情况下，进行通过等离子体CVD法在栅极绝缘膜上形成微晶半导体膜的步骤，以及在微晶半导体膜上形成非晶半导体膜的步骤。 在形成微晶半导体膜的步骤中，反应室中的压力设定为10-5Pa以下，基板温度设定在120℃〜220℃的范围内，等离子体由 引入氢气和硅气体，使氢等离子体作用于形成在栅极绝缘膜的表面上的反应产物，以在进行成膜的同时进行除去。 此外，通过施加VHF频带的第一高频电力，VHF频带的第二高频电力彼此叠加而产生等离子体。

公开(公告)号：US20090140250A1

公开(公告)日：2009-06-04

申请号：US12325439

申请日：2008-12-01

申请人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Yasuhiro Jinbo

发明人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Yasuhiro Jinbo

IPC分类号： H01L29/786

CPC分类号： H01L27/1288 ,  H01L21/67017 ,  H01L21/67207 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1244 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78687 ,  H01L29/78696

摘要： An object is to reduce off-current of a thin film transistor. Another object is to improve electric characteristics of a thin film transistor. Further, it is still another object to improve image quality of a display device using the thin film transistor. An aspect of the present invention is a thin film transistor including a semiconductor film formed over a gate electrode and in an inner region of the gate electrode which does not reach an end portion of the gate electrode, with a gate insulating film interposed therebetween, a film covering at least a side surface of the semiconductor film, and a pair of wirings over the film covering the side surface of the semiconductor film; in which an impurity element serving as a donor is added to the semiconductor film.

摘要翻译： 目的是减少薄膜晶体管的截止电流。 另一个目的是改善薄膜晶体管的电特性。 此外，还有另一个目的是提高使用薄膜晶体管的显示装置的图像质量。 本发明的一个方面是一种薄膜晶体管，它包括半导体膜，该半导体膜形成在栅电极之上，并且在栅电极的内部区域中，其不到达栅电极的端部，栅极绝缘膜介于它们之间， 至少覆盖半导体膜的侧面的膜，以及覆盖半导体膜的侧面的膜上的一对配线; 其中作为供体的杂质元素被添加到半导体膜。

公开(公告)号：US09054206B2

公开(公告)日：2015-06-09

申请号：US12222109

申请日：2008-08-01

申请人： Shunpei Yamazaki ,  Sachiaki Teduka ,  Satoshi Toriumi ,  Makoto Foruno ,  Yasuhiro Jinbo ,  Koji Dairiki ,  Hideaki Kuwabara

发明人： Shunpei Yamazaki ,  Sachiaki Teduka ,  Satoshi Toriumi ,  Makoto Foruno ,  Yasuhiro Jinbo ,  Koji Dairiki ,  Hideaki Kuwabara

IPC分类号： H01L21/84 ,  H01L29/786 ,  H01L29/04 ,  H01L29/417 ,  H01L29/49 ,  H01L29/66 ,  H01L21/02 ,  H01L21/67 ,  H01L27/12

CPC分类号： H01L29/78696 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/67207 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78678

摘要： After a gate insulating film is formed over a gate electrode, in order to improve the quality of a microcrystalline semiconductor film which is formed in an early stage of deposition, a film near an interface with the gate insulating film is formed under a first deposition condition in which a deposition rate is low but the quality of a film to be formed is high, and then, a film is further deposited under a second deposition condition in which a deposition rate is high. Then, a buffer layer is formed to be in contact with the microcrystalline semiconductor film. Further, plasma treatment with a rare gas such as argon or hydrogen plasma treatment is performed before formation of the film under the first deposition condition for removing adsorbed water on a substrate.

公开(公告)号：US08053294B2

公开(公告)日：2011-11-08

申请号：US12424557

申请日：2009-04-16

申请人： Shunpei Yamazaki ,  Yasuhiro Jinbo

发明人： Shunpei Yamazaki ,  Yasuhiro Jinbo

IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L29/10 ,  H01L29/76 ,  H01L31/036 ,  H01L31/112 ,  H01L27/108 ,  H01L29/00 ,  H01L29/12 ,  H01L27/14 ,  H01L29/04 ,  H01L29/15

CPC分类号： H01L27/127 ,  C23C16/0272 ,  C23C16/24 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/78696

摘要： It is an object to control quality of a microcrystalline semiconductor film or a semiconductor film including crystal grains so that operation characteristics of a semiconductor element typified by a TFT can be improved. It is another object to improve characteristics of a semiconductor element typified by a TFT by controlling a deposition process of a microcrystalline semiconductor film or a semiconductor film including crystal grains. In addition, it is another object to increase on-state current of a thin film transistor and to reduce off-state current of the thin film transistor. In a semiconductor layer including a plurality of crystalline regions in an amorphous structure, generation positions and generation density of crystal nuclei from which the crystalline regions start to grow are controlled, whereby quality of the semiconductor layer is controlled. In addition, after generation of crystal nuclei from which the crystalline regions start to grow in the semiconductor layer, an impurity element serving as a donor is added to the semiconductor layer, whereby crystallinity of the semiconductor layer is increased and the resistivity of the semiconductor layer is reduced.

摘要翻译： 本发明的目的是控制微晶半导体膜或包含晶粒的半导体膜的质量，从而可以提高由TFT代表的半导体元件的工作特性。 另一个目的是通过控制微晶半导体膜或包括晶粒的半导体膜的沉积工艺来改善由TFT代表的半导体元件的特性。 此外，另一个目的是增加薄膜晶体管的导通电流并且减小薄膜晶体管的截止电流。 在包括非晶结构中的多个结晶区域的半导体层中，控制晶体区域开始生长的晶核的产生位置和发生密度，从而控制半导体层的质量。 此外，在半导体层中产生结晶区域开始生长的晶核之后，在半导体层中添加用作施主的杂质元素，由此半导体层的结晶度增加，半导体层的电阻率 降低了。