公开(公告)号：US20160005695A1

公开(公告)日：2016-01-07

申请号：US14471505

申请日：2014-08-28

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Rui-Feng Tai ,  Hsiao-Chun Huang ,  Chun-Hung Lu ,  Hsi-Chang Hsu ,  Shih-Ching Chen

IPC: H01L23/544 ,  H01L21/52

CPC classification number: H01L23/544 ,  H01L21/561 ,  H01L21/568 ,  H01L21/682 ,  H01L23/15 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/54486 ,  H01L2224/02331 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05073 ,  H01L2224/05563 ,  H01L2224/05567 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/12105

Abstract: A method for fabricating a package structure is provided, which includes the steps of: providing a base portion having at least an electronic element embedded therein and at least a positioning unit formed around a periphery of the electronic element, wherein the positioning unit protrudes from or is flush with a surface of the base portion; and forming at least a circuit layer on the surface of the base portion and the electronic element. The circuit layer is aligned and connected to the electronic element through the positioning unit.

Abstract translation: 提供一种制造封装结构的方法，其包括以下步骤：提供至少具有嵌入其中的电子元件的基部和至少围绕电子元件的周边形成的定位单元，其中定位单元从或 与基部的表面齐平; 以及在所述基部和所述电子元件的表面上形成至少电路层。 电路层通过定位单元对准并连接到电子元件。

公开(公告)号：US20190109092A1

公开(公告)日：2019-04-11

申请号：US16216621

申请日：2018-12-11

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Rui-Feng Tai ,  Hsiao-Chun Huang ,  Chun-Hung Lu ,  Hsi-Chang Hsu ,  Shih-Ching Chen

IPC: H01L23/544 ,  H01L23/00 ,  H01L21/68 ,  H01L21/56

Abstract: A method for fabricating a package structure is provided, which includes the steps of: providing a base portion having at least an electronic element embedded therein and at least a positioning unit formed around a periphery of the electronic element, wherein the positioning unit protrudes from or is flush with a surface of the base portion; and forming at least a circuit layer on the surface of the base portion and the electronic element. The circuit layer is aligned and connected to the electronic element through the positioning unit.

公开(公告)号：US09875949B2

公开(公告)日：2018-01-23

申请号：US14981521

申请日：2015-12-28

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Hsiao-Chun Huang ,  Hsien-Wen Chen ,  Shih-Ching Chen ,  Guang-Hwa Ma

IPC: H01L23/12 ,  H01L21/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L23/3121 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105

Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second sides; at least an electronic element disposed on the first side of the circuit structure; an encapsulant formed on the first side of the circuit structure for encapsulating the electronic element; a dielectric layer formed on portions of the second side of the circuit structure; and a metal structure formed on the dielectric layer and the circuit structure. The metal structure has a first metal layer bonded to the circuit structure and a second metal layer formed on the first metal layer and the dielectric layer. Therefore, by replacing a conventional silicon interposer with the circuit structure, the invention eliminates the need to fabricate through silicon vias so as to greatly reduce the fabrication difficulty and cost. The invention further provides a method for fabricating the electronic package.

公开(公告)号：US20160329267A1

公开(公告)日：2016-11-10

申请号：US14981521

申请日：2015-12-28

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Hsiao-Chun Huang ,  Hsien-Wen Chen ,  Shih-Ching Chen ,  Guang-Hwa Ma

IPC: H01L23/48 ,  H01L23/29 ,  H01L21/768 ,  H01L23/532 ,  H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L23/528

CPC classification number: H01L23/3121 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105

Abstract: An electronic package is provided, which includes: a circuit structure having opposite first and second sides; at least an electronic element disposed on the first side of the circuit structure; an encapsulant formed on the first side of the circuit structure for encapsulating the electronic element; a dielectric layer formed on portions of the second side of the circuit structure; and a metal structure formed on the dielectric layer and the circuit structure. The metal structure has a first metal layer bonded to the circuit structure and a second metal layer formed on the first metal layer and the dielectric layer. Therefore, by replacing a conventional silicon interposer with the circuit structure, the invention eliminates the need to fabricate through silicon vias so as to greatly reduce the fabrication difficulty and cost. The invention further provides a method for fabricating the electronic package.

Abstract translation: 提供电子封装，其包括：具有相对的第一和第二侧的电路结构; 至少设置在电路结构的第一侧上的电子元件; 形成在用于封装电子元件的电路结构的第一侧上的密封剂; 形成在电路结构的第二侧的部分上的电介质层; 以及形成在电介质层和电路结构上的金属结构。 金属结构具有接合到电路结构的第一金属层和形成在第一金属层和介电层上的第二金属层。 因此，通过用电路结构代替传统的硅插入器，本发明消除了通过硅通孔制造的需要，从而大大降低了制造难度和成本。 本发明还提供一种制造电子封装的方法。

公开(公告)号：US20160307833A1

公开(公告)日：2016-10-20

申请号：US14981588

申请日：2015-12-28

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Hsien-Wen Chen ,  Shih-Ching Chen ,  Hsiao-Chun Huang ,  Guang-Hwa Ma

IPC: H01L23/498 ,  H01L21/78 ,  H01L21/683 ,  H01L21/48 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L21/78 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L2221/68318 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An electronic packaging structure is provided, including a circuit portion, an electronic element disposed on an upper side of the circuit portion and a glass carrier disposed on a lower side of the circuit portion. By replacing a conventional silicon wafer with the glass carrier, the present invention eliminates the need of an adhesive layer and allows quick removal of the glass carrier during a subsequent process, thus saving the fabrication time and increasing the product yield. The present invention further provides a method for fabricating an electronic package.

Abstract translation: 提供一种电子封装结构，包括电路部分，设置在电路部分上侧的电子元件和设置在电路部分下侧的玻璃载体。 通过用玻璃载体代替传统的硅晶片，本发明消除了对粘合剂层的需要，并允许在随后的工艺中快速去除玻璃载体，从而节省制造时间并提高产品产量。 本发明还提供一种电子封装的制造方法。

公开(公告)号：US20140217605A1

公开(公告)日：2014-08-07

申请号：US13894687

申请日：2013-05-15

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chun-Hung Lin ,  Chun-Hung Lu ,  Guang-Hwa Ma ,  Hsiao-Chun Huang ,  Kuang-Hsin Chen

IPC: H01L23/532 ,  H01L21/768

CPC classification number: H01L23/53295 ,  H01L21/76802 ,  H01L21/76808 ,  H01L23/49894 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An interconnection structure for a package is disclosed. The interconnection structure includes a substrate body having a conductive portion formed on a surface thereof; a first photosensitive dielectric layer formed on the surface of the substrate body and having a via for exposing the conductive potion; a conductive via formed in the via; a second photosensitive dielectric layer formed on the first photosensitive dielectric layer and having a opening for exposing the conductive via and a portion of the first photosensitive dielectric layer; and a conductive trace layer formed in the opening of the second photosensitive dielectric layer so as to be electrically connected to the conductive portion through the conductive via, thereby simplifying the fabrication process and reducing the fabrication cost and time.

Abstract translation: 公开了一种用于封装的互连结构。 互连结构包括在其表面上形成有导电部分的基板主体; 形成在所述基板主体的表面上并且具有用于使所述导电部暴露的通孔的第一光敏介电层; 在通孔中形成的导电通孔; 形成在所述第一光敏介电层上并具有用于使所述导电通孔和所述第一光敏介电层的一部分暴露的开口的第二光敏介电层; 以及形成在第二感光介电层的开口中的导电迹线层，以便通过导电通孔电连接到导电部分，从而简化制造工艺并降低制造成本和时间。

公开(公告)号：US09076796B2

公开(公告)日：2015-07-07

申请号：US13894687

申请日：2013-05-15

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chun-Hung Lin ,  Chun-Hung Lu ,  Guang-Hwa Ma ,  Hsiao-Chun Huang ,  Kuang-Hsin Chen

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/498

CPC classification number: H01L23/53295 ,  H01L21/76802 ,  H01L21/76808 ,  H01L23/49894 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An interconnection structure for a package is disclosed. The interconnection structure includes a substrate body having a conductive portion formed on a surface thereof; a first photosensitive dielectric layer formed on the surface of the substrate body and having a via for exposing the conductive potion; a conductive via formed in the via; a second photosensitive dielectric layer formed on the first photosensitive dielectric layer and having a opening for exposing the conductive via and a portion of the first photosensitive dielectric layer; and a conductive trace layer formed in the opening of the second photosensitive dielectric layer so as to be electrically connected to the conductive portion through the conductive via, thereby simplifying the fabrication process and reducing the fabrication cost and time.

Abstract translation: 公开了一种用于封装的互连结构。 互连结构包括在其表面上形成有导电部分的基板主体; 形成在所述基板主体的表面上并且具有用于使所述导电部暴露的通孔的第一光敏介电层; 在通孔中形成的导电通孔; 形成在所述第一光敏介电层上并具有用于使所述导电通孔和所述第一光敏介电层的一部分暴露的开口的第二光敏介电层; 以及形成在第二感光介电层的开口中的导电迹线层，以便通过导电通孔电连接到导电部分，从而简化制造工艺并降低制造成本和时间。