公开(公告)号：US20120011716A1

公开(公告)日：2012-01-19

申请号：US13137695

申请日：2011-09-02

申请人： Han Kim ,  Mi Sun Hwang ,  Suk Won Lee ,  Chang Gun Oh

发明人： Han Kim ,  Mi Sun Hwang ,  Suk Won Lee ,  Chang Gun Oh

IPC分类号： H05K3/42

CPC分类号： H05K3/462 ,  H05K1/0265 ,  H05K1/0366 ,  H05K3/025 ,  H05K3/108 ,  H05K3/4623 ,  H05K2201/0352 ,  H05K2201/0394 ,  H05K2201/09527 ,  H05K2201/09545 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09736 ,  Y10T29/49126 ,  Y10T29/49165

摘要： A method of manufacturing a printed circuit board including: preparing a first double-sided substrate including a first insulating layer, a first lower copper layer, a second circuit layer including a first lower land, and a first via; preparing a second double-sided substrate including a second insulating layer, a third lower copper layer, a fourth circuit layer including a second lower land, and a second via; disposing a third insulating layer between the second circuit layer and the fourth circuit layer such that the first lower land and the second lower land are electrically connected to each other though a conductive bump; and forming a first circuit layer including a first circuit pattern connected to the first via on the first lower copper layer and forming a third circuit layer including a third circuit pattern connected to the second via on the third lower copper layer.

摘要翻译： 一种制造印刷电路板的方法，包括：制备包括第一绝缘层，第一下铜层，包括第一下焊盘的第二电路层和第一通孔的第一双面基板; 制备包括第二绝缘层，第三下铜层，包括第二下焊盘的第四电路层和第二通孔的第二双面基板; 在所述第二电路层和所述第四电路层之间设置第三绝缘层，使得所述第一下焊盘和所述第二下焊盘通过导电凸块彼此电连接; 以及形成第一电路层，所述第一电路层包括在所述第一下铜层上连接到所述第一通孔的第一电路图案，并形成第三电路层，所述第三电路层包括在所述第三下铜层上连接到所述第二通孔的第三电路图案。

公开(公告)号：US20090288872A1

公开(公告)日：2009-11-26

申请号：US12219078

申请日：2008-07-15

申请人： Han Kim ,  Mi Sun Hwang ,  Suk Won Lee ,  Chang Gun Oh

发明人： Han Kim ,  Mi Sun Hwang ,  Suk Won Lee ,  Chang Gun Oh

IPC分类号： H05K1/02 ,  H05K3/36

CPC分类号： H05K3/462 ,  H05K1/0265 ,  H05K1/0366 ,  H05K3/025 ,  H05K3/108 ,  H05K3/4623 ,  H05K2201/0352 ,  H05K2201/0394 ,  H05K2201/09527 ,  H05K2201/09545 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09736 ,  Y10T29/49126 ,  Y10T29/49165

摘要： Disclosed herein is a printed circuit board including an outmost fine circuit pattern. In the board, an end of a via, which has the minimum diameter, is connected to the outmost circuit layer of a substrate. The end surface, having the minimum diameter, is positioned at the outmost layer, so that the outmost circuit layer of the substrate, which needs to have a relatively high density in order to mount chips, compared to other circuit layers, can be more finely formed.

摘要翻译： 这里公开了包括最外部的精细电路图案的印刷电路板。 在板中，具有最小直径的通孔的端部连接到基板的最外层电路层。 具有最小直径的端面位于最外层，使得与其它电路层相比，为了安装芯片而需要具有相对较高密度的衬底的最外层电路层可以更细 形成。

公开(公告)号：US20090260868A1

公开(公告)日：2009-10-22

申请号：US12215413

申请日：2008-06-27

申请人： Chang Gun Oh ,  Mi Sun Hwang ,  Suk Won Lee

发明人： Chang Gun Oh ,  Mi Sun Hwang ,  Suk Won Lee

IPC分类号： H05K1/00 ,  H05K3/42

CPC分类号： H05K3/4647 ,  H05K3/108 ,  H05K3/423 ,  H05K3/426 ,  H05K2201/09536 ,  H05K2201/09545 ,  H05K2203/0574 ,  H05K2203/0733 ,  Y10T29/49165

摘要： The printed circuit board includes the via formed with the electroplating layer unlike a conventional via formed with an electroless plating layer and an electroplating layer and having a cylindrical shape, and thus exhibits good interlayer electrical connection and high reliability of physical contact upon thermal stress caused by the variance in physical properties of material depending on changes in temperature. The via has no upper land, and thus a fine circuit pattern of the circuit layer can be formed on the via.

摘要翻译： 印刷电路板包括形成有电镀层的通孔，与通过形成有化学镀层和电镀层并且具有圆柱形状的常规通孔不同，由此表现出良好的层间电连接和由于热应力引起的物理接触的高可靠性 材料的物理性质随温度变化的变化。 通孔没有上部焊盘，因此可以在通孔上形成电路层的精细电路图案。

公开(公告)号：US20090255722A1

公开(公告)日：2009-10-15

申请号：US12213975

申请日：2008-06-26

申请人： Suk Won Lee ,  Chang Gun Oh ,  Mi Sun Hwang

发明人： Suk Won Lee ,  Chang Gun Oh ,  Mi Sun Hwang

IPC分类号： H01R12/04 ,  H05K3/00

CPC分类号： H05K3/421 ,  H05K1/116 ,  H05K3/108 ,  H05K2201/09545 ,  H05K2201/09563 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

摘要： This invention relates to a printed circuit board having a landless via hole, including a circuit pattern formed on a via made of a first metal and having a line width smaller than the diameter of the via hole, in which the circuit pattern includes a seed layer made of a second metal and a plating layer made of a third metal, which is different from the second metal, and to a method of manufacturing the same. In the printed circuit board, the via has no upper land, thus making it possible to finely form the circuit pattern which is connected to the via, thereby realizing a high-density circuit pattern.

摘要翻译： 本发明涉及一种具有无轨道通孔的印刷电路板，该无线通孔包括形成在由第一金属制成的通孔上并具有小于通孔直径的线宽的电路图案，其中电路图案包括种子层 由与第二金属不同的第三金属制成的第二金属和镀层制成，以及其制造方法。 在印刷电路板中，通孔没有上部焊盘，从而可以精细地形成连接到通孔的电路图案，从而实现高密度电路图案。

公开(公告)号：US08418361B2

公开(公告)日：2013-04-16

申请号：US13299685

申请日：2011-11-18

申请人： Suk Won Lee ,  Chang Gun Oh ,  Mi Sun Hwang

发明人： Suk Won Lee ,  Chang Gun Oh ,  Mi Sun Hwang

IPC分类号： H05K3/02

CPC分类号： H05K3/421 ,  H05K1/116 ,  H05K3/108 ,  H05K2201/09545 ,  H05K2201/09563 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

摘要： Method of manufacturing printed circuit board, including: providing a substrate including a first circuit layer having a lower land of a via; forming an insulating layer on the first circuit layer; forming a via hole in the insulating layer; filling the via hole with a first metal, thus forming a via; forming a seed layer with a second metal on the insulating layer and an exposed surface of the via; applying a resist film on the seed layer, and forming a resist pattern having an opening for a second circuit layer with a width formed on the via being smaller than a width of the via; plating a circuit region defined by the opening with a third metal, thus forming a plating layer formed of the third metal; and removing the resist film, and selectively removing an exposed portion of the seed layer, thus forming a second circuit layer.

摘要翻译： 制造印刷电路板的方法，包括：提供包括具有通孔下部的第一电路层的基板; 在所述第一电路层上形成绝缘层; 在绝缘层中形成通孔; 用第一金属填充通孔，从而形成通孔; 在绝缘层上形成具有第二金属的种子层和通孔的暴露表面; 在种子层上施加抗蚀剂膜，并且形成具有形成在通孔上的宽度的第二电路层的开口的抗蚀剂图案小于通孔的宽度; 用第三金属电镀由开口限定的电路区域，从而形成由第三金属形成的镀层; 并去除抗蚀剂膜，并且选择性地去除种子层的暴露部分，从而形成第二电路层。

公开(公告)号：US20120060369A1

公开(公告)日：2012-03-15

申请号：US13299685

申请日：2011-11-18

申请人： Suk Won LEE ,  Chang Gun Oh ,  Mi Sun Hwang

发明人： Suk Won LEE ,  Chang Gun Oh ,  Mi Sun Hwang

IPC分类号： H01K3/10

CPC分类号： H05K3/421 ,  H05K1/116 ,  H05K3/108 ,  H05K2201/09545 ,  H05K2201/09563 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

摘要： Method of manufacturing printed circuit board, including: providing a substrate including a first circuit layer having a lower land of a via; forming an insulating layer on the first circuit layer; forming a via hole in the insulating layer; filling the via hole with a first metal, thus forming a via; forming a seed layer with a second metal on the insulating layer and an exposed surface of the via; applying a resist film on the seed layer, and forming a resist pattern having an opening for a second circuit layer with a width formed on the via being smaller than a width of the via; plating a circuit region defined by the opening with a third metal, thus forming a plating layer formed of the third metal; and removing the resist film, and selectively removing an exposed portion of the seed layer, thus forming a second circuit layer.

摘要翻译： 制造印刷电路板的方法，包括：提供包括具有通孔下部的第一电路层的基板; 在所述第一电路层上形成绝缘层; 在绝缘层中形成通孔; 用第一金属填充通孔，从而形成通孔; 在绝缘层上形成具有第二金属的种子层和通孔的暴露表面; 在种子层上施加抗蚀剂膜，并且形成具有形成在通孔上的宽度的第二电路层的开口的抗蚀剂图案小于通孔的宽度; 用第三金属电镀由开口限定的电路区域，从而形成由第三金属形成的镀层; 并去除抗蚀剂膜，并且选择性地去除种子层的暴露部分，从而形成第二电路层。

公开(公告)号：US08344261B2

公开(公告)日：2013-01-01

申请号：US12805586

申请日：2010-08-06

申请人： Suk Won Lee ,  Keung Jin Sohn ,  Chang Gun Oh

发明人： Suk Won Lee ,  Keung Jin Sohn ,  Chang Gun Oh

IPC分类号： H05K1/09 ,  H05K1/11

CPC分类号： H05K3/007 ,  H05K3/0097 ,  H05K3/428 ,  H05K2203/0228 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T428/12569 ,  Y10T428/12583 ,  Y10T428/2839

摘要： Disclosed are a carrier substrate including an insulating base material with a copper foil layer formed on at least one surface thereof, a metal layer formed on the copper layer and having a length shorter than that of the copper foil layer, and an insulating layer formed on the metal layer, a fabrication method thereof, a printed circuit board (PCB) using the same, and a fabrication method thereof. Because there is no land at the via and core in the substrate, because a circuit pattern connected with the via can be formed to be finer, so the circuit pattern can be highly integrated and the substrate can become thinner. Thus, a printed circuit board (PCB) having a smaller size and reduced number of layers can be fabricated.

摘要翻译： 公开了一种载体基板，其包括在其至少一个表面上形成有铜箔层的绝缘基材，在铜层上形成的长度短于铜箔层的金属层，以及形成在 金属层，其制造方法，使用其的印刷电路板（PCB）及其制造方法。 由于在基板中的通孔和芯部没有焊盘，因为可以形成与通孔连接的电路图案更细，所以电路图案可以高度集成，并且基板可以变薄。 因此，可以制造具有更小尺寸和更少层数的印刷电路板（PCB）。

公开(公告)号：US20110155429A1

公开(公告)日：2011-06-30

申请号：US12805586

申请日：2010-08-06

申请人： Suk Won Lee ,  Keung Jin Sohn ,  Chang Gun Oh

发明人： Suk Won Lee ,  Keung Jin Sohn ,  Chang Gun Oh

IPC分类号： H05K1/09 ,  H05K1/11 ,  H05K3/10

CPC分类号： H05K3/007 ,  H05K3/0097 ,  H05K3/428 ,  H05K2203/0228 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T428/12569 ,  Y10T428/12583 ,  Y10T428/2839

摘要： Disclosed are a carrier substrate including an insulating base material with a copper foil layer formed on at least one surface thereof, a metal layer formed on the cooper layer and having a length shorter than that of the copper foil layer, and an insulating layer formed on the metal layer, a fabrication method thereof, a printed circuit board (PCB) using the same, and a fabrication method thereof. Because there is no land at the via and core in the substrate, because a circuit pattern connected with the via can be formed to be finer, so the circuit pattern can be highly integrated and the substrate can become thinner. Thus, a printed circuit board (PCB) having a smaller size and reduced number of layers can be fabricated.

摘要翻译： 公开了一种载体基板，其包括在其至少一个表面上形成有铜箔层的绝缘基材，在铜层上形成的长度短于铜箔层的金属层，以及形成在 金属层，其制造方法，使用其的印刷电路板（PCB）及其制造方法。 由于在基板中的通孔和芯部没有焊盘，因为可以形成与通孔连接的电路图案更细，所以电路图案可以高度集成，并且基板可以变薄。 因此，可以制造具有更小尺寸和更少层数的印刷电路板（PCB）。

公开(公告)号：US08720049B2

公开(公告)日：2014-05-13

申请号：US13009789

申请日：2011-01-19

申请人： Tae Kyun Bae ,  Chang Gun Oh ,  Ho Sik Park

发明人： Tae Kyun Bae ,  Chang Gun Oh ,  Ho Sik Park

IPC分类号： H05K3/20

CPC分类号： H05K3/4647 ,  H05K1/0366 ,  H05K2201/0195 ,  H05K2203/1189 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/51

摘要： Disclosed herein is a method for fabricating a printed circuit board, including: stacking a second insulating layer including a reinforcement on an outer surface of a first insulating layer having a post via formed thereon; polishing an upper surface of the second insulating layer to expose an upper side of the post via; stacking a film member on the second insulating layer to cover the post via and compress the second insulating layer; polishing an upper surface of the film member to expose an upper side of the post via; and forming a circuit layer connected to the post via on the upper surface of the film member.

摘要翻译： 这里公开了一种制造印刷电路板的方法，包括：在其上形成有具有柱经的第一绝缘层的外表面上堆叠包括增强材料的第二绝缘层; 抛光所述第二绝缘层的上表面以暴露所述柱通孔的上侧; 在第二绝缘层上堆叠膜构件以覆盖柱经和压缩第二绝缘层; 抛光膜构件的上表面以暴露柱通孔的上侧; 以及在所述膜构件的上表面上形成连接到所述柱通孔的电路层。

公开(公告)号：US20110139858A1

公开(公告)日：2011-06-16

申请号：US12721544

申请日：2010-03-10

申请人： Seong Min Cho ,  Keung Jin Sohn ,  Chang Gun Oh ,  Hyun Jung Hong ,  Tae Kyun Bae

发明人： Seong Min Cho ,  Keung Jin Sohn ,  Chang Gun Oh ,  Hyun Jung Hong ,  Tae Kyun Bae

IPC分类号： B23K31/02 ,  B32B15/01

CPC分类号： H05K3/4644 ,  H05K3/0097 ,  H05K2203/1536 ,  Y10T428/12681 ,  Y10T428/12701 ,  Y10T428/12708 ,  Y10T428/12736 ,  Y10T428/12785 ,  Y10T428/12792 ,  Y10T428/12903 ,  Y10T428/12944 ,  Y10T428/12986

摘要： Disclosed herein is a carrier for manufacturing a substrate, including: two insulation layers, each being provided on one side thereof with a first metal layer and on the other side thereof with a second metal layer; and a third metal layer having a lower melting point than the first metal layer and formed between the two first metal layers respectively formed on the two insulation layers such that the two first metal layers are attached to each other. The carrier is advantageous in that the carrier can be separated by heating the third metal layer, so that the size of a substrate does not change at the time of separating the carrier, thereby maintaining the compatibility between a substrate and manufacturing facilities.

摘要翻译： 这里公开了一种用于制造基板的载体，包括：两个绝缘层，每个绝缘层的一侧上设置有第一金属层，在另一侧上设置有第二金属层; 以及第三金属层，其具有比所述第一金属层低的熔点，并且形成在分别形成在所述两个绝缘层上的所述两个第一金属层之间，使得所述两个第一金属层彼此附接。 载体的优点在于，可以通过加热第三金属层来分离载体，使得在分离载体时基板的尺寸不变，从而保持基板和制造设备之间的相容性。