公开(公告)号：US07248134B2

公开(公告)日：2007-07-24

申请号：US11186859

申请日：2005-07-22

Applicant: Sung-Mao Wu ,  Chi-Tsung Chiu ,  Chih-Pin Hung

Inventor： Sung-Mao Wu ,  Chi-Tsung Chiu ,  Chih-Pin Hung

IPC: H01P3/08

CPC classification number: H05K1/0216 ,  H01G4/236 ,  H05K1/025 ,  H05K1/162 ,  H05K1/165 ,  H05K2201/09509

Abstract: An inductor and capacitor implemented with build-up vias. The inductor and capacitor comprise a conductor plane, a dielectric layer, an inductor/capacitor inducing build-up via and a conductor layer. There is a conducting material in the inductor/capacitor inducing build-up via and a fist end thereof is in contact with the conductor plane. The length of the inductor inducing build-up via is larger than one fourth of a signal wavelength while the length of the conductor inducing build-up via is smaller than one fourth of a signal wavelength.

Abstract translation: 用积层通孔实现的电感和电容器。 电感器和电容器包括导体平面，电介质层，电感器/电容器，用于引导积聚通孔和导体层。 在电感器/电容器中存在导电材料，其导致积聚通孔，并且其第一端与导体平面接触。 感应电感通孔的电感长度大于信号波长的四分之一，而导体积聚通孔的导体长度小于信号波长的四分之一。

公开(公告)号：US07945062B2

公开(公告)日：2011-05-17

申请号：US11645598

申请日：2006-12-27

Applicant: Wei-Chung Wang ,  Sung-Mao Wu ,  Hsueh-An Yang ,  Kuo-Pin Yang ,  Chian-Chi Lin

Inventor： Wei-Chung Wang ,  Sung-Mao Wu ,  Hsueh-An Yang ,  Kuo-Pin Yang ,  Chian-Chi Lin

IPC: H04R25/00 ,  H04R9/08 ,  H04R11/04 ,  H04R17/02 ,  H04R19/04 ,  H04R21/02 ,  H01L23/02 ,  H01L23/28

CPC classification number: B81B7/0064 ,  B81B2201/0257 ,  H01L23/3121 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/16151 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3025 ,  H04R1/02 ,  H04R1/04 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The invention relates to a microelectromechanical microphone packaging system. The microelectromechanical microphone packaging system comprises a substrate, a chip, a microelectromechanical microphone, a conductive glue, a non-conductive glue and a cover. The substrate has a first surface. The chip is mounted on the first surface of the substrate. The microelectromechanical microphone is mounted on the first surface of the substrate, and electrically connected to the chip. The chip is enclosed by the non-conductive glue. The non-conductive glue is enclosed by the conductive glue. The cover is mounted on the first surface of the substrate to form a containing space, and has an acoustic aperture. The microelectromechanical microphone packaging system utilizes the conductive glue enclosing the chip and the non-conductive glue to shield interference from outside noise and obtain a shielding effect. In addition, the cover does not need to be made of metal material.

Abstract translation: 本发明涉及一种微机电麦克风包装系统。 微电机麦克风包装系统包括基片，芯片，微电机麦克风，导电胶，非导电胶和盖。 衬底具有第一表面。 芯片安装在基板的第一表面上。 微机电麦克风安装在基板的第一表面上，并与芯片电连接。 芯片由非导电胶水封闭。 导电胶被导电胶包围。 盖安装在基板的第一表面上以形成容纳空间，并具有声孔。 微机电麦克风包装系统利用封装芯片和非导电胶的导电胶来屏蔽外部噪声的干扰并获得屏蔽效果。 此外，盖子不需要由金属材料制成。

公开(公告)号：US20100265009A1

公开(公告)日：2010-10-21

申请号：US12425045

申请日：2009-04-16

Applicant: Tzyy-Sheng Horng ,  Chien-Hsun Chen ,  Chien-Hsiang Huang ,  Sung-Mao Wu ,  Chi-Tsung Chiu ,  Chih-Pin Hung

Inventor： Tzyy-Sheng Horng ,  Chien-Hsun Chen ,  Chien-Hsiang Huang ,  Sung-Mao Wu ,  Chi-Tsung Chiu ,  Chih-Pin Hung

IPC: H03H7/01 ,  H03H7/12

CPC classification number: H03H7/0115 ,  H03H2001/0085

Abstract: A stacked LC resonator includes a parallel-plate capacitor, a dielectric layer and a spiral inductor. The parallel-plate capacitor has a first metal layer, a second metal layer opposed to the first metal layer and a middle dielectric layer formed between the first and second metal layers. The dielectric layer is formed on the second metal layer of the parallel-plate capacitor. The spiral inductor is formed on the dielectric layer and electrically connected with the first and second metal layers of the parallel-plate capacitor.

Abstract translation: 叠层LC谐振器包括平行板电容器，电介质层和螺旋电感器。 平行板电容器具有第一金属层，与第一金属层相对的第二金属层和形成在第一和第二金属层之间的中间介电层。 电介质层形成在平行板电容器的第二金属层上。 螺旋电感器形成在电介质层上并与平行板电容器的第一和第二金属层电连接。

公开(公告)号：US20060103483A1

公开(公告)日：2006-05-18

申请号：US11186859

申请日：2005-07-22

Applicant: Sung-Mao Wu ,  Chi-Tsung Chiu ,  Chih-Pin Hung

Inventor： Sung-Mao Wu ,  Chi-Tsung Chiu ,  Chih-Pin Hung

IPC: H03H5/02

CPC classification number: H05K1/0216 ,  H01G4/236 ,  H05K1/025 ,  H05K1/162 ,  H05K1/165 ,  H05K2201/09509

Abstract: An inductor and capacitor implemented with build-up vias. The inductor and capacitor comprise a conductor plane, a dielectric layer, an inductor/capacitor inducing build-up via and a conductor layer. There is a conducting material in the inductor/capacitor inducing build-up via and a fist end thereof is in contact with the conductor plane. The length of the inductor inducing build-up via is larger than one fourth of a signal wavelength while the length of the conductor inducing build-up via is smaller than one fourth of a signal wavelength.

Abstract translation: 用积层通孔实现的电感和电容器。 电感器和电容器包括导体平面，电介质层，电感器/电容器，用于引导积聚通孔和导体层。 在电感器/电容器中存在导电材料，其导致积聚通孔，并且其第一端与导体平面接触。 感应电感通孔的电感长度大于信号波长的四分之一，而导体积聚通孔的导体长度小于信号波长的四分之一。

公开(公告)号：US07199445B2

公开(公告)日：2007-04-03

申请号：US11183864

申请日：2005-07-19

Applicant: Sung-Mao Wu

Inventor： Sung-Mao Wu

IPC: H01L29/00

CPC classification number: H01G4/35 ,  H01G4/33 ,  H01L23/50 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/1903 ,  H05K1/0231 ,  H05K1/0253 ,  H05K1/162 ,  H05K2201/09318 ,  H05K2201/09736 ,  H01L2924/00

Abstract: An integrated capacitor on a packaging substrate. The integrated capacitor comprises a conductor plane, a first dielectric layer and a signal transmission layer. The conductor plane has an extrusion layer of a first thickness. The first extrusion layer and the conductor plane are made of the same material. The first dielectric layer is formed on the conductor plane. The signal transmission layer is formed on the first dielectric layer.

Abstract translation: 封装基板上的集成电容器。 集成电容器包括导体平面，第一介电层和信号传输层。 导体平面具有第一厚度的挤出层。 第一挤出层和导体平面由相同的材料制成。 第一电介质层形成在导体平面上。 信号传输层形成在第一电介质层上。

公开(公告)号：US07061347B2

公开(公告)日：2006-06-13

申请号：US10749917

申请日：2003-12-31

Applicant: Kun-Ching Chen ,  Sung-Mao Wu

Inventor： Kun-Ching Chen ,  Sung-Mao Wu

IPC: H01P3/08

CPC classification number: H01P3/081 ,  H01P3/088 ,  H05K1/024 ,  H05K3/4688 ,  H05K2201/015 ,  H05K2201/0187 ,  H05K2201/09309

Abstract: A high frequency substrate includes a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer and a high-frequency signal transmission line. The first dielectric layer is formed on the first metal layer, and the second metal layer is formed on the first dielectric layer. The first and second metal layers are maintained in a stable voltage status due to the high dielectric coefficient of the first dielectric layer. Besides, the second dielectric layer is formed on the second metal layer. High speed and high frequency transmission are achieved when signals transmitting in the high-frequency transmission line formed on the second dielectric layer due to the low dielectric coefficient of the second dielectric layer.

Abstract translation: 高频基板包括第一金属层，第一介电层，第二金属层，第二介电层和高频信号传输线。 第一介电层形成在第一金属层上，第二金属层形成在第一介电层上。 由于第一介电层的高介电系数，第一和第二金属层保持在稳定的电压状态。 此外，第二介电层形成在第二金属层上。 由于第二电介质层的低介电系数，在形成在第二电介质层上的高频传输线中的信号传输时，实现了高速和高频传输。

公开(公告)号：US20060076658A1

公开(公告)日：2006-04-13

申请号：US10962437

申请日：2004-10-13

Applicant: Sung-Mao Wu

Inventor： Sung-Mao Wu

IPC: H01L23/02 ,  H01L23/52 ,  H01L23/48

CPC classification number: H01Q1/2283 ,  H01L23/49838 ,  H01L23/49855 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01Q1/22 ,  H01Q1/38 ,  H01Q9/30 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package structure with a microstrip antenna comprises a packaging substrate, a chip and a microstrip radiation device. The packaging substrate has an upper surface having a packaging area on which the chip is disposed and a peripheral area on which the microstrip radiation device is disposed for transceiving a signal of the chip.

Abstract translation: 具有微带天线的半导体封装结构包括封装基板，芯片和微带辐射装置。 所述封装基板具有上表面，所述上表面具有设置所述芯片的封装区域和设置所述微带辐射装置的外围区域，用于收集所述芯片的信号。

公开(公告)号：US20080093702A1

公开(公告)日：2008-04-24

申请号：US11848251

申请日：2007-08-31

Applicant: Hung-Hsiang Cheng ,  Sung-Mao Wu

Inventor： Hung-Hsiang Cheng ,  Sung-Mao Wu

IPC: H01L29/00

CPC classification number: H01L23/5227 ,  H01L23/5223 ,  H01L23/5228 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention relates to a semiconductor device having a passive device. The semiconductor device includes a substrate and at least one passive device. The substrate has at least one via. The via has at least two conductive elements therein. The conductive elements are not electrically connected to each other. The passive device has at least two electrodes, and is disposed on the substrate. The electrodes are electrically connected to the conductive elements respectively. The passive device needs only one via, so the amount of vias can be reduced effectively. In addition, the conductive path formed by the conductive elements and the passive device is relatively short, so that the inductance is lowered and the electrical performance is raised.

Abstract translation: 本发明涉及一种具有无源器件的半导体器件。 半导体器件包括衬底和至少一个无源器件。 衬底具有至少一个通孔。 通孔中至少有两个导电元件。 导电元件彼此不电连接。 无源器件具有至少两个电极，并且设置在衬底上。 电极分别电连接到导电元件。 无源器件只需要一个通孔，因此可以有效地减少通孔的数量。 此外，由导电元件和无源器件形成的导电路径相对较短，使得电感降低并且电性能提高。

公开(公告)号：US07352056B2

公开(公告)日：2008-04-01

申请号：US10962437

申请日：2004-10-13

Applicant: Sung-Mao Wu

Inventor： Sung-Mao Wu

IPC: H01L21/425

CPC classification number: H01Q1/2283 ,  H01L23/49838 ,  H01L23/49855 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01Q1/22 ,  H01Q1/38 ,  H01Q9/30 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package structure with a microstrip antenna comprises a packaging substrate, a chip and a microstrip radiation device. The packaging substrate has an upper surface having a packaging area on which the chip is disposed and a peripheral area on which the microstrip radiation device is disposed for transceiving a signal of the chip.

Abstract translation: 具有微带天线的半导体封装结构包括封装基板，芯片和微带辐射装置。 所述封装基板具有上表面，所述上表面具有设置所述芯片的封装区域和设置所述微带辐射装置的外围区域，用于收集所述芯片的信号。

公开(公告)号：US07072780B2

公开(公告)日：2006-07-04

申请号：US10745576

申请日：2003-12-29

Applicant: Sung-Mao Wu ,  Chi-Tsung Chiu

Inventor： Sung-Mao Wu ,  Chi-Tsung Chiu

IPC: G06F19/00

CPC classification number: G01R27/28 ,  G01R35/007

Abstract: An Impedance standard substrate for adjusting a vector network analyzer mainly comprises a fixer and a flexible tape, wherein the vector network analyzer has a plurality of pairs of probes disposed at an underneath of the impedance standard substrate and an upside of the impedance standard substrate. There are thru-circuits formed at the flexible tape, wherein the flexible tape has electrically connecting contacts and the contacts are electrically connected to each other. The flexible tape is bent and fixed to a fixer such that the contacts are faced to the corresponding probes respectively. Furthermore, the impedance standard substrate also includes a plurality of pairs of open-circuits, short-circuits and load-circuits formed at the flexible tape.

Abstract translation: 用于调整矢量网络分析仪的阻抗标准基板主要包括定影器和柔性带，其中矢量网络分析仪具有设置在阻抗标准基板下方的多对探针和阻抗标准基板的上侧。 在柔性带上形成有通路，其中柔性带具有电连接触点，并且触点彼此电连接。 柔性带被弯曲并固定到固定器，使得接触件分别面对相应的探针。 此外，阻抗标准基板还包括在柔性带形成的多对开路，短路和负载电路。