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公开(公告)号:US20170373119A1
公开(公告)日:2017-12-28
申请号:US15465049
申请日:2017-03-21
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Atsushi OGA , Mutsumi OKAJIMA , Natsuki FUKUDA , Takeshi YAMAGUCHI , Toshiharu TANAKA , Hiroyuki ODE
CPC classification number: H01L27/249 , H01L27/2454 , H01L45/1226 , H01L45/146 , H01L45/16
Abstract: A semiconductor memory device according to an embodiment comprises: a semiconductor substrate extending in a first direction and a second direction, the first and second directions intersecting each other; a first wiring line disposed above the semiconductor substrate and extending in the first direction; a second wiring line disposed above the semiconductor substrate and extending in a third direction, the third direction intersecting the first direction and the second direction; a variable resistance film disposed at an intersection of the first wiring line and the second wiring line; a first insulating film disposed aligned with the second wiring line in the first direction; a first film disposed between the first wiring line and the first insulating film; and a second film disposed between the first insulating film and the first film and configured from a material different from that of the first film.
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公开(公告)号:US20200075615A1
公开(公告)日:2020-03-05
申请号:US16296001
申请日:2019-03-07
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Atsushi OGA , Hideaki HARAKAWA , Satoshi NAGASHIMA , Natsuki FUKUDA
IPC: H01L27/11556 , H01L27/11582 , H01L21/762
Abstract: According to an embodiment, a semiconductor memory device includes: a first stacked body including a first semiconductor layer, a first memory film, a second semiconductor layer and a first insulating layer; a joining member provided on the first semiconductor layer, the second semiconductor layer, and the first insulating layer; a first layer provided above the joining member and covering the first semiconductor layer and the first memory film; a second layer provided above the joining member, located away from the first layer as viewed in a second direction perpendicular to the first direction, and covering the second semiconductor layer and the second memory film; a second stacked body including a third semiconductor layer, a fourth semiconductor layer, a fourth memory film and a second insulating layer.
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公开(公告)号:US20180006089A1
公开(公告)日:2018-01-04
申请号:US15706598
申请日:2017-09-15
Applicant: TOSHIBA MEMORY CORPORATION
Inventor: Natsuki FUKUDA , Mutsumi OKAJIMA , Atsushi OGA , Toshiharu TANAKA , Takeshi YAMAGUCHI , Takeshi TAKAGI , Masanori KOMURA
IPC: H01L27/24 , H01L27/11582 , H01L27/11578 , H01L27/11575 , H01L27/11573 , H01L27/11556 , H01L21/311 , H01L27/11551 , H01L21/822 , H01L21/768 , H01L21/3213 , H01L29/792 , H01L27/1157
CPC classification number: H01L27/2481 , H01L21/311 , H01L21/3213 , H01L21/76805 , H01L21/76816 , H01L21/76831 , H01L21/8221 , H01L23/5226 , H01L23/5329 , H01L27/0688 , H01L27/101 , H01L27/11551 , H01L27/11556 , H01L27/1157 , H01L27/11573 , H01L27/11575 , H01L27/11578 , H01L27/11582 , H01L27/2454 , H01L27/249 , H01L29/7926
Abstract: A semiconductor device according to an embodiment includes: a stacked body including a plurality of first conductive films stacked via an inter-layer insulating film;a first conductive body contacting the stacked body to extend in a stacking direction; and a plurality of first insulating films in the same layers as the first conductive films and disposed between the first conductive body and the first conductive films, the first conductive body including a projecting part that projects along tops of one of the first insulating films and one of the first conductive films, and a side surface of the projecting part contacting an upper surface of the one of the first conductive films.
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公开(公告)号:US20200286902A1
公开(公告)日:2020-09-10
申请号:US16518030
申请日:2019-07-22
Applicant: Toshiba Memory Corporation
Inventor: Natsuki FUKUDA , Satoshi NAGASHIMA , Tetsu MOROOKA , Noritaka ISHIHARA
IPC: H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582 , H01L29/06 , H01L21/311 , H01L21/764 , H01L21/28
Abstract: According to one embodiment, a semiconductor storage device includes a first charge storage part, a first insulating part, a second charge storage part, a second insulating part, a first select transistor, and a hollow part. The first charge storage part is at a first position separated from a surface of a substrate by a first distance in a third direction. The first select transistor is at a second position separated from the surface of the substrate by a second distance in the third direction. The second distance is greater than the first distance. The hollow part is up to a third position in the third direction separated from the surface of the substrate by a third distance in the third direction. The third distance is greater than or equal to the first distance and shorter than or equal to the second distance.
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