公开(公告)号：US20190214277A1

公开(公告)日：2019-07-11

申请号：US16357151

申请日：2019-03-18

Applicant: Toshiba Memory Corporation

Inventor： Yoshihiro Uozumi ,  Shinsuke Kimura ,  Yoshihiro Ogawa ,  Hiroyasu Iimori ,  Tatsuhiko Koide ,  Hideaki Hirabayashi ,  Yuji Nagashima

IPC: H01L21/67 ,  G03F7/40 ,  G03F7/16 ,  H01L21/68 ,  H01L21/677

CPC classification number: H01L21/67075 ,  G03F7/162 ,  G03F7/405 ,  H01L21/67017 ,  H01L21/67028 ,  H01L21/67051 ,  H01L21/67098 ,  H01L21/6715 ,  H01L21/67739 ,  H01L21/68

Abstract: According to one embodiment, a substrate processing method is disclosed. The method can include treating a substrate with a first liquid. The substrate has a structural body formed on a major surface of the substrate. The method can include forming a support member supporting the structural body by bringing a second liquid into contact with the substrate wetted by the first liquid, and changing at least a portion of the second liquid into a solid by carrying out at least one of causing the second liquid to react, reducing a quantity of a solvent included in the second liquid, and causing at least a portion of a substance dissolved in the second liquid to be separated. The method can include removing the support member by changing at least a part of the support member from a solid phase to a gaseous phase, without passing through a liquid phase.

公开(公告)号：US10714328B2

公开(公告)日：2020-07-14

申请号：US15904595

申请日：2018-02-26

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Tomonori Harada ,  Tatsuhiko Koide ,  Katsuhiro Sato

IPC: H01L21/02 ,  H01L21/687 ,  H01L21/67

Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a supporter configured to support a wafer. The apparatus further includes a first member including a first portion that faces a first region on an upper face of the wafer and a second portion that intervenes between the wafer and the first portion. The apparatus further includes a second member including a third portion that faces a second region on the upper face of the wafer and a fourth portion that intervenes between the wafer and the third portion. The apparatus further includes a first liquid feeder configured to feed a first liquid for processing the wafer to the first region, a first gas feeder configured to feed a first gas between the wafer and the first portion, and a second gas feeder configured to feed a second gas between the wafer and the second portion.

公开(公告)号：US20180082832A1

公开(公告)日：2018-03-22

申请号：US15827427

申请日：2017-11-30

Applicant: Toshiba Memory Corporation

Inventor： Yoshihiro Ogawa ,  Tatsuhiko Koide ,  Shinsuke Kimura ,  Hisashi Okuchi ,  Hiroshi Tomita

IPC: H01L21/02 ,  H01L21/67 ,  H01L21/3213 ,  H01L21/311

CPC classification number: H01L21/0206 ,  H01L21/02043 ,  H01L21/02211 ,  H01L21/31116 ,  H01L21/32135 ,  H01L21/67028

Abstract: In one embodiment, an apparatus of treating a surface of a semiconductor substrate comprises a substrate holding and rotating unit, first to fourth supplying units, and a removing unit. A substrate holding and rotating unit holds a semiconductor substrate, having a convex pattern formed on its surface, and rotates the semiconductor substrate. A first supplying unit supplies a chemical onto the surface of the semiconductor substrate in order to clean the semiconductor substrate. A second supplying unit supplies pure water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate. A third supplying unit supplies a water repellent agent to the surface of the semiconductor substrate in order to form a water repellent protective film onto the surface of the convex pattern. A fourth supplying unit supplies alcohol, which is diluted with pure water, or acid water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate. A removing unit removes the water repellent protective film with the convex pattern being left.

公开(公告)号：US09748091B2

公开(公告)日：2017-08-29

申请号：US14836145

申请日：2015-08-26

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Shinsuke Kimura ,  Tatsuhiko Koide ,  Yoshihiro Ogawa

IPC: H01L21/02 ,  H01L21/306 ,  H01L21/67

CPC classification number: H01L21/02057 ,  H01L21/30604 ,  H01L21/67028 ,  H01L21/67109

Abstract: In one embodiment, a substrate treatment apparatus includes a housing configured to house a substrate. The apparatus further includes a chemical supplying module configured to supply one or more chemicals in a gas state to the substrate in the housing, the one or more chemicals including a first chemical that contains a silylation agent. The apparatus further includes a cooling module configured to cool the substrate in the housing while any of the one or more chemicals is supplied to the substrate in the housing.

公开(公告)号：US10290491B2

公开(公告)日：2019-05-14

申请号：US15670349

申请日：2017-08-07

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Shinsuke Kimura ,  Tatsuhiko Koide ,  Yoshihiro Ogawa

IPC: H01L21/02 ,  H01L21/306 ,  H01L21/67

Abstract: In one embodiment, a substrate treatment apparatus includes a housing configured to house a substrate. The apparatus further includes a chemical supplying module configured to supply one or more chemicals in a gas state to the substrate in the housing, the one or more chemicals including a first chemical that contains a silylation agent. The apparatus further includes a cooling module configured to cool the substrate in the housing while any of the one or more chemicals is supplied to the substrate in the housing.

公开(公告)号：US09991111B2

公开(公告)日：2018-06-05

申请号：US15827427

申请日：2017-11-30

Applicant: Toshiba Memory Corporation

Inventor： Yoshihiro Ogawa ,  Tatsuhiko Koide ,  Shinsuke Kimura ,  Hisashi Okuchi ,  Hiroshi Tomita

IPC: C23F1/00 ,  H01L21/306 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/311 ,  H01L21/67

CPC classification number: H01L21/0206 ,  H01L21/02043 ,  H01L21/02211 ,  H01L21/31116 ,  H01L21/32135 ,  H01L21/67028

Abstract: In one embodiment, an apparatus of treating a surface of a semiconductor substrate comprises a substrate holding and rotating unit, first to fourth supplying units, and a removing unit. A substrate holding and rotating unit holds a semiconductor substrate, having a convex pattern formed on its surface, and rotates the semiconductor substrate. A first supplying unit supplies a chemical onto the surface of the semiconductor substrate in order to clean the semiconductor substrate. A second supplying unit supplies pure water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate. A third supplying unit supplies a water repellent agent to the surface of the semiconductor substrate in order to form a water repellent protective film onto the surface of the convex pattern. A fourth supplying unit supplies alcohol, which is diluted with pure water, or acid water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate. A removing unit removes the water repellent protective film with the convex pattern being left.

公开(公告)号：US10573508B2

公开(公告)日：2020-02-25

申请号：US14836881

申请日：2015-08-26

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Tatsuhiko Koide ,  Shinsuke Kimura ,  Yoshihiro Ogawa ,  Hisashi Okuchi ,  Hiroshi Tomita

IPC: H01L21/02 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/311 ,  H01L21/324

Abstract: In one embodiment, a surface treatment apparatus for a semiconductor substrate includes a holding unit, a first supply unit, a second supply unit, a third supply unit, a drying treatment unit, and a removal unit. The holding unit holds a semiconductor substrate with a surface having a convex pattern formed thereon. The first supply unit supplies a chemical solution to the surface of the semiconductor substrate, to perform cleaning and oxidation. The second supply unit supplies pure water to the surface of the semiconductor substrate, to rinse the semiconductor substrate. The third supply unit supplies a water repelling agent to the surface of the semiconductor substrate, to form a water repellent protective film on the surface of the convex pattern. The drying treatment unit dries the semiconductor substrate. The removal unit removes the water repellent protective film while making the convex pattern remain.

公开(公告)号：US10453729B2

公开(公告)日：2019-10-22

申请号：US15915559

申请日：2018-03-08

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Tatsuhiko Koide ,  Hiroyasu Iimori ,  Shinsuke Kimura

IPC: H01L21/68 ,  H01L21/673 ,  H01L21/02 ,  H01L21/67 ,  H01L21/677

Abstract: According to an embodiment, a substrate treatment apparatus includes a support unit, a silane coupler supplier, an organic functional group remover, and a drive mechanism. The support supports a substrate having a patterned film. The silane coupler supplier supplies the film with a silane coupler. The organic functional group remover removes an organic functional group from the film silylated with the silane coupler. The drive mechanism drives at least one of the support, the silane coupler supplier, and the organic functional group remover in such a way that the supply of the silane coupler and the supply of light or gas are repeated by a predetermined number.

公开(公告)号：US20190080947A1

公开(公告)日：2019-03-14

申请号：US15915559

申请日：2018-03-08

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Tatsuhiko Koide ,  Hiroyasu Iimori ,  Shinsuke Kimura

IPC: H01L21/68 ,  H01L21/673 ,  H01L21/677 ,  H01L21/67 ,  H01L21/02

CPC classification number: H01L21/68 ,  H01L21/02164 ,  H01L21/02282 ,  H01L21/02348 ,  H01L21/67028 ,  H01L21/67051 ,  H01L21/67115 ,  H01L21/67379 ,  H01L21/67383 ,  H01L21/67706 ,  H01L21/6776

Abstract: According to an embodiment, a substrate treatment apparatus includes a support unit, a silane coupler supplier, an organic functional group remover, and a drive mechanism. The support supports a substrate having a patterned film. The silane coupler supplier supplies the film with a silane coupler. The organic functional group remover removes an organic functional group from the film silylated with the silane coupler. The drive mechanism drives at least one of the support, the silane coupler supplier, and the organic functional group remover in such a way that the supply of the silane coupler and the supply of light or gas are repeated by a predetermined number.

公开(公告)号：US20190074171A1

公开(公告)日：2019-03-07

申请号：US15904595

申请日：2018-02-26

Applicant: TOSHIBA MEMORY CORPORATION

Inventor： Tomonori Harada ,  Tatsuhiko Koide ,  Katsuhiro Sato

IPC: H01L21/02 ,  H01L21/67 ,  H01L21/687

CPC classification number: H01L21/02021 ,  H01L21/02019 ,  H01L21/6708 ,  H01L21/68764

Abstract: In one embodiment, a semiconductor manufacturing apparatus includes a supporter configured to support a wafer. The apparatus further includes a first member including a first portion that faces a first region on an upper face of the wafer and a second portion that intervenes between the wafer and the first portion. The apparatus further includes a second member including a third portion that faces a second region on the upper face of the wafer and a fourth portion that intervenes between the wafer and the third portion. The apparatus further includes a first liquid feeder configured to feed a first liquid for processing the wafer to the first region, a first gas feeder configured to feed a first gas between the wafer and the first portion, and a second gas feeder configured to feed a second gas between the wafer and the second portion.