公开(公告)号：US08334173B2

公开(公告)日：2012-12-18

申请号：US12694534

申请日：2010-01-27

申请人： Takao Nogi ,  Tomoyuki Kitani ,  Akira Tojo ,  Kentaro Suga

发明人： Takao Nogi ,  Tomoyuki Kitani ,  Akira Tojo ,  Kentaro Suga

IPC分类号： H01L21/00

CPC分类号： H01L23/051 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor apparatus includes: forming a protrusion made of a conductor on each of the electrodes provided on a semiconductor wafer top face side of a plurality of semiconductor devices formed in a semiconductor wafer; making a trench in the top face between the plurality of semiconductor devices; filling an insulator into a gap between the protrusions and into the trench to form a sealing member; grinding a bottom face of the semiconductor wafer opposing the top face until the sealing member being exposed to divide the semiconductor wafer into each of the semiconductor devices; forming a first lead made of a conductor on each of the protrusions, the first lead forming a portion of a first external electrode; forming a conductive material layer directly to form a second lead on the bottom face of the plurality of semiconductor devices, the second lead forming the second external electrode; and cutting the sealing member between the plurality of semiconductor devices to separate the plurality of semiconductor devices from each other.

摘要翻译： 一种半导体装置的制造方法，其特征在于，在形成于半导体晶片的多个半导体装置的半导体晶片顶面侧的各电极上形成由导体构成的突起， 在所述多个半导体器件之间的顶面中形成沟槽; 将绝缘体填充到突起之间的间隙中并进入沟槽中以形成密封构件; 研磨与顶面相对的半导体晶片的底面，直到暴露出密封构件，以将半导体晶片分成每个半导体器件; 在每个突起上形成由导体制成的第一引线，所述第一引线形成第一外部电极的一部分; 直接形成导电材料层以在所述多个半导体器件的底面上形成第二引线，所述第二引线形成所述第二外部电极; 以及切割所述多个半导体器件之间的所述密封构件以将所述多个半导体器件彼此分离。

公开(公告)号：US20100233856A1

公开(公告)日：2010-09-16

申请号：US12694534

申请日：2010-01-27

申请人： Takao NOGI ,  Tomoyuki Kitani ,  Akira Tojo ,  Kentaro Suga

发明人： Takao NOGI ,  Tomoyuki Kitani ,  Akira Tojo ,  Kentaro Suga

IPC分类号： H01L21/78

CPC分类号： H01L23/051 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/32 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor apparatus includes: forming a protrusion made of a conductor on each of the electrodes provided on a semiconductor wafer top face side of a plurality of semiconductor devices formed in a semiconductor wafer; making a trench in the top face between the plurality of semiconductor devices; filling an insulator into a gap between the protrusions and into the trench to form a sealing member; grinding a bottom face of the semiconductor wafer opposing the top face until the sealing member being exposed to divide the semiconductor wafer into each of the semiconductor devices; forming a first lead made of a conductor on each of the protrusions, the first lead forming a portion of a first external electrode; forming a conductive material layer directly to form a second lead on the bottom face of the plurality of semiconductor devices, the second lead forming the second external electrode; and cutting the sealing member between the plurality of semiconductor devices to separate the plurality of semiconductor devices from each other.

摘要翻译： 一种半导体装置的制造方法，其特征在于，在形成于半导体晶片的多个半导体装置的半导体晶片顶面侧的各电极上形成由导体构成的突起， 在所述多个半导体器件之间的顶面中形成沟槽; 将绝缘体填充到突起之间的间隙中并进入沟槽中以形成密封构件; 研磨与顶面相对的半导体晶片的底面，直到暴露出密封构件，以将半导体晶片分成每个半导体器件; 在每个突起上形成由导体制成的第一引线，所述第一引线形成第一外部电极的一部分; 直接形成导电材料层以在所述多个半导体器件的底面上形成第二引线，所述第二引线形成所述第二外部电极; 以及切割所述多个半导体器件之间的所述密封构件以将所述多个半导体器件彼此分离。

公开(公告)号：US08378479B2

公开(公告)日：2013-02-19

申请号：US13188124

申请日：2011-07-21

申请人： Akira Tojo ,  Tomoyuki Kitani ,  Kazuhito Higuchi ,  Masako Fukumitsu ,  Tomohiro Iguchi ,  Hideo Nishiuchi ,  Kyoto Kato

发明人： Akira Tojo ,  Tomoyuki Kitani ,  Kazuhito Higuchi ,  Masako Fukumitsu ,  Tomohiro Iguchi ,  Hideo Nishiuchi ,  Kyoto Kato

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/544 ,  H01L24/03 ,  H01L24/48 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/274 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating materials, each of the outer plating materials covering five surfaces of the outer electrode other than one surface of the outer electrode being connected with the inner electrode.

摘要翻译： 根据本发明的一个方面，提供一种半导体器件，包括半导体芯片，该半导体芯片包括第一电极和半导体元件的第二电极，第一电极和第二电极被配置在第一表面和第二表面上 半导体芯片的封装材料，封装半导体芯片的封装材料，表面部分不同于区域，每个区域与第一第二电极连接，每个内部电极与第一或第二电极连接，厚度为 来自第一表面或第二表面的内部电极分别与来自第一表面或第二表面的密封材料的厚度相同，外部电极，每个外部电极形成在封装材料上并与内部电极连接， 外部电极的宽度至少比半导体ch的宽度宽 ip和外部电镀材料，覆盖外部电极的除了外部电极的一个表面以外的五个表面的每个外部电镀材料与内部电极连接。

公开(公告)号：US20100052142A1

公开(公告)日：2010-03-04

申请号：US12553452

申请日：2009-09-03

申请人： Akira Tojo ,  Tomoyuki Kitani ,  Kazuhito Higuchi ,  Masako Fukumitsu ,  Tomohiro Iguchi ,  Hideo Nishiuchi ,  Kyoko Kato

发明人： Akira Tojo ,  Tomoyuki Kitani ,  Kazuhito Higuchi ,  Masako Fukumitsu ,  Tomohiro Iguchi ,  Hideo Nishiuchi ,  Kyoko Kato

IPC分类号： H01L23/28 ,  H01L21/56

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/544 ,  H01L24/03 ,  H01L24/48 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/274 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating materials, each of the outer plating materials covering five surfaces of the outer electrode other than one surface of the outer electrode being connected with the inner electrode.

摘要翻译： 根据本发明的一个方面，提供一种半导体器件，包括半导体芯片，该半导体芯片包括第一电极和半导体元件的第二电极，第一电极和第二电极被配置在第一表面和第二表面上 半导体芯片的封装材料，封装半导体芯片的封装材料，表面部分不同于区域，每个区域与第一第二电极连接，每个内部电极与第一或第二电极连接，厚度为 来自第一表面或第二表面的内部电极分别与来自第一表面或第二表面的密封材料的厚度相同，外部电极，每个外部电极形成在封装材料上并与内部电极连接， 外部电极的宽度至少比半导体ch的宽度宽 ip和外部电镀材料，覆盖外部电极的除了外部电极的一个表面以外的五个表面的每个外部电镀材料与内部电极连接。

公开(公告)号：US20080179751A1

公开(公告)日：2008-07-31

申请号：US12017929

申请日：2008-01-22

申请人： Tomoyuki Kitani ,  Tomohiro Iguchi ,  Masako Hirahara ,  Hideo Nishiuchi ,  Akira Tojo ,  Taizo Tomioka

发明人： Tomoyuki Kitani ,  Tomohiro Iguchi ,  Masako Hirahara ,  Hideo Nishiuchi ,  Akira Tojo ,  Taizo Tomioka

IPC分类号： H01L23/29 ,  H01L21/304

CPC分类号： H01L21/78 ,  H01L23/29 ,  H01L23/291 ,  H01L23/293 ,  H01L23/298 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19043 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A manufacturing method for semiconductor devices includes a process of forming a conductive layer 4 on the other principle surface of a semiconductor wafer 10 having circuit elements 2 formed in one principle surface of the semiconductor wafer, a process of forming a protecting layer 5 on at least a part of the conductive layer, the protecting layer 5 being made from material having hard-to-shave characteristics in comparison with the conductive layer and a process of cutting the semiconductor wafer 10 into pieces with respect to each of the semiconductor devices 1. By the manufacturing method, each semiconductor device 1 is provided with a semiconductor substrate 3 having the circuit elements 2 formed in one principle surface of the semiconductor substrate 3, the conductive layer 4 formed on the other principle surface of the semiconductor substrate 3 and the protecting layer 5 formed on the conductive layer 4 in lamination to have hard-to-shave characteristics in comparison with the conductive layer 4.

摘要翻译： 半导体器件的制造方法包括在半导体晶片10的另一个主表面上形成导电层4的工艺，该半导体晶片10具有形成在半导体晶片的一个主表面中的电路元件2，至少形成保护层5的工艺 导电层的一部分，保护层5由与导电层相比具有难以剃须特性的材料制成，以及将半导体晶片10相对于每个半导体器件1切割成片的工艺。 通过制造方法，每个半导体器件1设置有半导体衬底3，其具有形成在半导体衬底3的一个主表面中的电路元件2，形成在半导体衬底3的另一个主表面上的导电层4和保护 层5形成在导电层4上，与导电层4相比具有难剃刮特性。

公开(公告)号：US20090209065A1

公开(公告)日：2009-08-20

申请号：US12367637

申请日：2009-02-09

申请人： Hideo NISHIUCHI ,  Tomohiro Iguchi ,  Tomoyuki Kitani ,  Takahiro Aizawa ,  Masako Fukumitsu ,  Akira Tojo

发明人： Hideo NISHIUCHI ,  Tomohiro Iguchi ,  Tomoyuki Kitani ,  Takahiro Aizawa ,  Masako Fukumitsu ,  Akira Tojo

IPC分类号： H01L21/78 ,  B23K1/06

CPC分类号： H01L24/40 ,  B23K20/004 ,  B23K20/10 ,  B23K20/106 ,  B23K2101/42 ,  H01L24/37 ,  H01L24/45 ,  H01L24/48 ,  H01L24/77 ,  H01L24/84 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/371 ,  H01L2224/37124 ,  H01L2224/37599 ,  H01L2224/40091 ,  H01L2224/40247 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73219 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/84205 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An example of the invention is a method of manufacturing a semiconductor device including, pressing a part of the connection conductor having a plate-like shape or a belt-like shape against a lead terminal which is formed on a lead frame, is formed into a thin and long plate-like shape, and is supported only at one end in a longitudinal direction of the terminal, in such a manner that the part of the conductor is brought into contact with the lead terminal, and applying ultrasonic vibration substantially in the longitudinal direction in a plane perpendicular to the pressing direction to the connection conductor in the state where the part of the connection conductor is pressed against the lead terminal.

摘要翻译： 本发明的一个实例是一种制造半导体器件的方法，其包括：将形成在引线框架上的引线端子压接具有板状或带状形状的连接导体的一部分形成为 薄且长的板状形状，并且仅在端子的纵向方向上的一端被支撑，使得导体的一部分与引线端子接触，并且基本上在纵向上施加超声波振动 在连接导体的一部分压靠引线端子的状态下，在与连接导体的按压方向垂直的平面的方向。

公开(公告)号：US08193643B2

公开(公告)日：2012-06-05

申请号：US12546916

申请日：2009-08-25

申请人： Akira Tojo ,  Tomoyuki Kitani ,  Tomohiro Iguchi ,  Takahiro Aizawa ,  Hideo Nishiuchi ,  Masako Fukumitsu

发明人： Akira Tojo ,  Tomoyuki Kitani ,  Tomohiro Iguchi ,  Takahiro Aizawa ,  Hideo Nishiuchi ,  Masako Fukumitsu

IPC分类号： H01L23/28

CPC分类号： H01L21/561 ,  H01L23/3107 ,  H01L24/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/00

摘要： According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a semiconductor element, a first electrode of the semiconductor chip being configured on a first surface of the semiconductor element, a second electrode of the semiconductor element being configured on a second surface opposed to the first surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, a first hole and a second hole being configured in the encapsulating material, a portion of the first electrode and a portion of the second electrode being exposed, a first conductive material being connected to the first surface of the semiconductor chip via the first hole, a second conductive material being connected to the second surface of the semiconductor chip via the second hole, and a plating film covering five surfaces of the first conductive material other than one surface contacting with the encapsulating material and five surfaces of the second conductive material other than one surface contacting with the encapsulating material.

摘要翻译： 根据本发明的一个方面，提供了一种半导体器件，其包括半导体元件的半导体芯片，半导体芯片的第一电极配置在半导体元件的第一表面上，半导体元件的第二电极 配置在与半导体芯片的第一表面相对的第二表面上，封装半导体芯片的封装材料，在封装材料中配置的第一孔和第二孔，第一电极的一部分和第二电极的一部分 电极被暴露，第一导电材料经由第一孔连接到半导体芯片的第一表面，第二导电材料经由第二孔连接到半导体芯片的第二表面，并且镀覆膜覆盖五个表面的 除了与封装材料接触的一个表面之外的第一导电材料 以及第二导电材料的五个表面，而不是与封装材料接触的一个表面。

公开(公告)号：US08008773B2

公开(公告)日：2011-08-30

申请号：US12553452

申请日：2009-09-03

申请人： Akira Tojo ,  Tomoyuki Kitani ,  Kazuhito Higuchi ,  Masako Fukumitsu ,  Tomohiro Iguchi ,  Hideo Nishiuchi ,  Kyoko Kato

发明人： Akira Tojo ,  Tomoyuki Kitani ,  Kazuhito Higuchi ,  Masako Fukumitsu ,  Tomohiro Iguchi ,  Hideo Nishiuchi ,  Kyoko Kato

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/544 ,  H01L24/03 ,  H01L24/48 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/274 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating materials, each of the outer plating materials covering five surfaces of the outer electrode other than one surface of the outer electrode being connected with the inner electrode.

摘要翻译： 根据本发明的一个方面，提供一种半导体器件，包括半导体芯片，该半导体芯片包括第一电极和半导体元件的第二电极，第一电极和第二电极被配置在第一表面和第二表面上 半导体芯片的封装材料，封装半导体芯片的封装材料，表面部分不同于区域，每个区域与第一第二电极连接，每个内部电极与第一或第二电极连接，厚度为 来自第一表面或第二表面的内部电极分别与来自第一表面或第二表面的密封材料的厚度相同，外部电极，每个外部电极形成在封装材料上并与内部电极连接， 外部电极的宽度至少比半导体ch的宽度宽 ip和外部电镀材料，覆盖外部电极的除了外部电极的一个表面之外的五个表面的每个外部电镀材料与内部电极连接。

公开(公告)号：US08859415B2

公开(公告)日：2014-10-14

申请号：US13414454

申请日：2012-03-07

申请人： Takayuki Tajima ,  Akira Tojo

发明人： Takayuki Tajima ,  Akira Tojo

IPC分类号： H01L21/4763 ,  H01L21/768 ,  H01L23/532

CPC分类号： H01L23/53238 ,  H01L21/76802 ,  H01L21/7684 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming wiring of a semiconductor device includes: forming an insulating resin on a main surface of a substrate such that an opening portion defining a wiring pattern is provided in the insulating resin; forming a first wiring layer made of a first metal on a bottom surface and side surfaces of the opening portion surrounding and a surface of the insulating resin opposite to the main surface of the substrate, the first wiring layer having a bottom portion formed on the bottom surface of the opening portion and side portions formed on the side surfaces, the bottom portion having a thickness greater than a thickness of at least one of the side portions; and cutting the insulating resin and the first wiring layer such that the insulating resin and the first wiring layer are exposed.

摘要翻译： 形成半导体器件布线的方法包括：在绝缘树脂中设置绝缘树脂至基片的主表面上，使得限定布线图形的开口部分; 在底面上形成由第一金属构成的第一布线层和围绕的开口部分的侧表面和与基板的主表面相对的绝缘树脂的表面，第一布线层的底部形成在底部 所述开口部的表面和形成在所述侧面上的侧部，所述底部的厚度大于所述侧部中的至少一个的厚度; 以及绝缘树脂和第一布线层的切割，使得绝缘树脂和第一布线层露出。

公开(公告)号：US20120231625A1

公开(公告)日：2012-09-13

申请号：US13414454

申请日：2012-03-07

申请人： Takayuki TAJIMA ,  Akira Tojo

发明人： Takayuki TAJIMA ,  Akira Tojo

IPC分类号： H01L21/768

CPC分类号： H01L23/53238 ,  H01L21/76802 ,  H01L21/7684 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming wiring of a semiconductor device includes: forming an insulating resin on a main surface of a substrate such that an opening portion defining a wiring pattern is provided in the insulating resin; forming a first wiring layer made of a first metal on a bottom surface and side surfaces of the opening portion surrounding and a surface of the insulating resin opposite to the main surface of the substrate, the first wiring layer having a bottom portion formed on the bottom surface of the opening portion and side portions formed on the side surfaces, the bottom portion having a thickness greater than a thickness of at least one of the side portions; and cutting the insulating resin and the first wiring layer such that the insulating resin and the first wiring layer are exposed.

摘要翻译： 形成半导体器件布线的方法包括：在绝缘树脂中设置绝缘树脂至基片的主表面上，使得限定布线图形的开口部分; 在底面上形成由第一金属构成的第一布线层和围绕的开口部分的侧表面和与基板的主表面相对的绝缘树脂的表面，第一布线层的底部形成在底部 所述开口部的表面和形成在所述侧面上的侧部，所述底部的厚度大于所述侧部中的至少一个的厚度; 以及绝缘树脂和第一布线层的切割，使得绝缘树脂和第一布线层露出。