-
公开(公告)号：US07018580B2
公开(公告)日：2006-03-28
申请号：US10248095
申请日：2002-12-18
IPC分类号： B29C33/38
CPC分类号： B29C33/3842 , B29C33/40 , B29C43/16 , B29C2043/3615 , G02B6/138 , G02B6/4214 , H01S5/147
摘要： A method of fabricating a stamping mold suitable for use in the formation of a tapered waveguide structure includes defining a stamping pattern upon the surface of a silicon wafer, and removing portions of the silicon wafer surface in accordance with the stamped pattern, thereby creating tapered vertical surfaces within the wafer.
摘要翻译： 制造适合用于形成锥形波导结构的冲压模具的方法包括：在硅晶片的表面上限定冲压图案，并根据冲压图案去除硅晶片表面的部分，由此产生锥形垂直 晶片内的表面。
-
公开(公告)号：US06935792B2
公开(公告)日：2005-08-30
申请号：US10065460
申请日：2002-10-21
申请人： Richard Joseph Saia , Thomas Bert Gorczyca , Christopher James Kapusta , Ernest Wayne Balch , Glenn Scott Claydon , Samhita Dasgupta , Eladio Clemente Delgado
发明人： Richard Joseph Saia , Thomas Bert Gorczyca , Christopher James Kapusta , Ernest Wayne Balch , Glenn Scott Claydon , Samhita Dasgupta , Eladio Clemente Delgado
CPC分类号： G02B6/122 , G02B6/12002 , G02B6/12004 , G02B6/1221 , G02B6/138 , G02B6/42 , H01L2224/04105 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2924/15153 , H01L2924/15192
摘要： An optoelectronic package is fabricated by a method which includes: positioning an optical device within a window of a substrate active-side up and below a top substrate surface; filling the window with an optical polymer material; planarizing surfaces of the optical polymer material and the substrate; patterning waveguide material over the optical polymer material and the substrate to form an optical interconnection path; and to form a mirror to reflect light from the optical device to the interconnection path; and forming a via to expose a bond pad of the optical device.
摘要翻译： 通过一种方法制造光电子封装，该方法包括：将光学器件定位在衬底主动侧的窗口内，顶部衬底表面上方和下方; 用光学聚合物材料填充窗户; 光学聚合物材料和基底的平坦化表面; 在光学聚合物材料和基底上形成波导材料以形成光学互连路径; 并且形成反射镜以将来自光学装置的光反射到互连路径; 以及形成通孔以暴露所述光学器件的接合焊盘。
-
公开(公告)号：US07427566B2
公开(公告)日：2008-09-23
申请号：US11297868
申请日：2005-12-09
IPC分类号： H01L21/302
CPC分类号： H01L23/473 , F28F3/12 , H01L2924/0002 , H05K3/108 , H01L2924/00
摘要： A method is provided. The method includes forming a conductive layer on an inner surface of a substrate and providing a sacrificial layer over the conductive layer. The method includes forming a plurality of channels in the sacrificial layer and plating the sacrificial layer to substantially fill the plurality of channels with a plating material comprising conducting material. The method also includes etching the sacrificial layer to form a conducting structure having fins where conducting material remains separated by microchannels where the sacrificial layer is etched.
摘要翻译： 提供了一种方法。 该方法包括在衬底的内表面上形成导电层并在导电层上提供牺牲层。 该方法包括在牺牲层中形成多个通道，并且使牺牲层电镀以使包含导电材料的镀覆材料基本上填充多个通道。 该方法还包括蚀刻牺牲层以形成具有翅片的导电结构，其中导电材料保持由其中蚀刻牺牲层的微通道分离。
-
4.发明授权Method for making multichip module substrates by encapsulating electrical conductors and filling gaps 失效通过封装电导体和填充间隙来制造多芯片模块基板的方法公开(公告)号：US06602739B1
公开(公告)日：2003-08-05
申请号：US10101231
申请日：2002-03-19
申请人： James Wilson Rose , Thomas Bert Gorczyca , Christopher James Kapusta , Ernest Wayne Balch , Kevin Matthew Durocher
发明人： James Wilson Rose , Thomas Bert Gorczyca , Christopher James Kapusta , Ernest Wayne Balch , Kevin Matthew Durocher
IPC分类号： H01L2144
CPC分类号： H01L24/76 , H01L21/4857 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/81 , H01L24/82 , H01L2224/04105 , H01L2224/73267 , H01L2224/81801 , H01L2224/82039 , H01L2224/92144 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/14 , H01L2924/3025 , H05K1/185
摘要： A method for making a multichip “HDI” module includes the step of making a substrate for supporting the semiconductor or solid-state chips (or other components) by applying electrical conductor in a pattern to a first dielectric sheet, and applying encapsulating material to the electrical conductor. Apertures are made in the first dielectric sheet and encapsulant at locations at which the chips (or other components) are to be located. The components are affixed to a second dielectric sheet at locations registered with the apertures in the first sheet, and the sheets are juxtaposed with the chips extending into the apertures. This results in the formation of gaps between the components and the edges of the apertures, which gaps are then filled with hardenable or curable material. Electrical connection is made to the pads of the chips by means of a multilayer structure of dielectric sheets with conductor patterns, interconnected by means of plated-through vias.
摘要翻译： 制造多芯片“HDI”模块的方法包括以下步骤：通过将图案中的电导体施加到第一电介质片上，并且将封装材料施加到第一电介质片上，制备用于支撑半导体或固态芯片（或其它部件）的基板 电导体。 在第一电介质片和密封剂中在芯片（或其他部件）所在的位置处形成孔。 这些部件在与第一片中的孔对准的位置处固定到第二电介质片，并且片材与延伸到孔中的芯片并置。 这导致在部件和孔的边缘之间形成间隙，然后用可硬化或可固化材料填充该间隙。 通过具有通过电镀通孔互连的导体图案的介电片的多层结构对芯片的焊盘进行电连接。
-
5.发明授权Method for making multichip module substrates by encapsulating electrical conductors 失效通过封装电导体制造多芯片模块基板的方法公开(公告)号：US06706624B1
公开(公告)日：2004-03-16
申请号：US10100658
申请日：2002-03-18
IPC分类号： H01L214763
CPC分类号： H01L25/50 , H01L23/5389 , H01L24/19 , H01L24/82 , H01L2224/32245 , H01L2224/73267 , H01L2224/9222 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/3025
摘要： A method for making a multichip “HDI” module includes the step of making a substrate for supporting the semiconductor or solid-state chips by applying electrical conductor in a pattern to a first dielectric sheet, and applying encapsulating material to the electrical conductor. Apertures are made in the first dielectric sheet at locations at which the chips are to be located. The chips are affixed to a second dielectric sheet at locations registered with the apertures in the first sheet, and the sheets are juxtaposed with the chips extending into the apertures. Electrical connection is made to the pads of the chips by means of a multilayer structure of dielectric sheets with conductor patterns, interconnected by means of plated-through vias.
摘要翻译： 制造多芯片“HDI”模块的方法包括以下步骤：通过将图案中的电导体施加到第一电介质片上，并将封装材料施加到电导体上来制造用于支撑半导体或固态芯片的衬底。 在芯片位于的位置处，在第一电介质片中制作孔。 芯片在与第一片材中的孔对准的位置处固定到第二电介质片材，并且片材与延伸到孔中的芯片并置。 通过具有通过电镀通孔互连的导体图案的介电片的多层结构对芯片的焊盘进行电连接。
-
公开(公告)号：US07316512B2
公开(公告)日：2008-01-08
申请号：US10909611
申请日：2004-07-30
申请人： Min-Yi Shih , Christopher James Kapusta , William Paul Kornrumpf , Matthew Christian Nielsen , Samhita Dasgupta , Eric Michael Breitung
发明人： Min-Yi Shih , Christopher James Kapusta , William Paul Kornrumpf , Matthew Christian Nielsen , Samhita Dasgupta , Eric Michael Breitung
CPC分类号： G02B6/43 , G02B6/4214 , G02B6/4246 , G02B6/4292
摘要： An apparatus is provided that includes a substrate having a top surface, at least one optical data transport medium coupled to the substrate, one or more lens devices coupled to the substrate, and one or more reflective devices coupled to the substrate. The one or more lens devices and the one or more reflective devices are at least partially passively aligned with the at least one optical transport medium by use of one or more pins.
摘要翻译： 提供了一种装置，其包括具有顶表面的基板，耦合到基板的至少一个光学数据传输介质，耦合到该基板的一个或多个透镜装置以及耦合到该基板的一个或多个反射装置。 一个或多个透镜装置和一个或多个反射装置通过使用一个或多个销至少部分被动地与至少一个光传输介质对准。
-
公开(公告)号：US08742646B2
公开(公告)日：2014-06-03
申请号：US13433422
申请日：2012-03-29
申请人： Robert Gideon Wodnicki , Charles Edward Baumgartner , David Martin Mills , Kevin Matthew Durocher , William Hullinger Huber , George Charles Sogoian , Christopher James Kapusta
发明人： Robert Gideon Wodnicki , Charles Edward Baumgartner , David Martin Mills , Kevin Matthew Durocher , William Hullinger Huber , George Charles Sogoian , Christopher James Kapusta
CPC分类号： B06B1/0622 , H01L41/338 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/1433 , H01L2924/15321 , Y10T29/42 , H01L2924/00
摘要： An ultrasound acoustic assembly includes a number of ultrasound acoustic arrays, each array comprising an acoustic stack comprising a piezoelectric layer assembled with at least one acoustic impedance dematching layer and with a support layer. The acoustic stack defines a number of dicing kerfs and a number of acoustic elements, such that the dicing kerfs are formed between neighboring ones of the acoustic elements. The dicing kerfs extend through the piezoelectric layer and through the acoustic impedance dematching layer(s) but extend only partially through the support layer. The ultrasound acoustic assembly further includes a number of application specific integrated circuit (ASIC) die. Each ultrasound acoustic array is coupled to a respective ASIC die to form a respective acoustic-electric transducer module. Methods of manufacture are also provided.
摘要翻译： 超声波声学组件包括多个超声波阵列，每个阵列包括声叠层，声堆叠包括与至少一个声阻抗分配层和支撑层组装的压电层。 声学堆叠限定了多个切割切口和多个声学元件，使得切割切口形成在相邻的声学元件之间。 切割切口延伸穿过压电层并通过声阻抗分层，但仅部分延伸穿过支撑层。 超声波组件还包括许多专用集成电路（ASIC）芯片。 每个超声波阵列耦合到相应的ASIC管芯，以形成相应的声电传感器模块。 还提供了制造方法。
-
公开(公告)号：US08163596B2
公开(公告)日：2012-04-24
申请号：US12410281
申请日：2009-03-24
IPC分类号： H01L29/66
CPC分类号： H01L23/4985 , H01L23/3128 , H01L23/49827 , H01L23/5389 , H01L24/18 , H01L24/19 , H01L24/82 , H01L25/105 , H01L2223/6677 , H01L2224/04105 , H01L2224/12105 , H01L2224/18 , H01L2224/73267 , H01L2224/92144 , H01L2225/1035 , H01L2225/1058 , H01L2924/01006 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/18162 , H01L2924/3025
摘要： An apparatus comprises a first chip layer comprising a first component coupled to a first side of a first flex layer, the first component comprising a plurality of electrical pads. The first chip layer also comprises a first plurality of feed-thru pads coupled to the first side of the first flex layer and a first encapsulant encapsulating the first component, the first encapsulant having a portion thereof removed to form a first plurality of cavities in the first encapsulant and to expose the first plurality of feed-thru pads by way of the first plurality of cavities.
摘要翻译： 一种装置包括第一芯片层，其包括耦合到第一柔性层的第一侧的第一部件，所述第一部件包括多个电焊盘。 第一芯片层还包括耦合到第一柔性层的第一侧的第一多个馈通垫和封装第一部件的第一密封剂，第一密封剂的一部分被去除以在其中形成第一多个空腔 第一密封剂并且通过第一多个空腔暴露出第一多个馈通垫。
-
公开(公告)号：US07993064B2
公开(公告)日：2011-08-09
申请号：US12060430
申请日：2008-04-01
IPC分类号： G02B6/36
CPC分类号： C07D487/04
摘要： A high temperature optoelectronic device package includes a substrate, an optoelectronic die situated on an upper surface of the substrate, a seal surrounding the optoelectronic die and situated on the upper surface of the substrate and a housing disposed on the seal having a ferrule-seating portion. The housing is disposed on the seal such that a fiber optic center of the ferrule-seating portion is aligned with an active portion of the optoelectronic die. The optoelectronic die is in operative communication with electronic traces of the substrate.
摘要翻译： 高温光电子器件封装包括衬底，位于衬底的上表面上的光电裸片，围绕光电管芯并且位于衬底的上表面上的密封件，以及设置在密封件上的壳体，其具有套圈座部分 。 壳体设置在密封件上，使得套圈座部分的光纤中心与光电管芯的有效部分对准。 光电管芯与基板的电子迹线工作连通。
-
10.发明授权Affordable high performance high frequency multichip module fabrication and apparatus 有权负担得起的高性能高频多芯片模块制造和设备公开(公告)号：US07952196B1
公开(公告)日：2011-05-31
申请号：US12106805
申请日：2008-04-21
IPC分类号： H01L23/34
CPC分类号： H01L23/36 , H01L21/563 , H01L23/3107 , H01L23/373 , H01L23/5389 , H01L23/66 , H01L25/0652 , H01L25/18 , H01L2223/6605 , H01L2223/6622 , H01L2224/1134 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2924/01079 , H01L2924/09701 , H01L2924/1461 , H01L2924/1627 , H01L2924/19051 , H01L2924/3011 , H01L2924/00
摘要： An interconnect assembly for use in high frequency applications includes an interconnect structure, a plurality of electronic die disposed on the interconnect structure, and an encapsulant at least partially surrounding the plurality of electronic die. The interconnect structure includes a plurality of layers. The interconnect assembly further includes a thermal management layer disposed within a portion of the encapsulant and proximate to the plurality of electronic die and a controlled impedance interconnect connected to the interconnect structure and extending to a peripheral surface of the interconnect assembly.
摘要翻译： 用于高频应用的互连组件包括互连结构，布置在互连结构上的多个电子管芯以及至少部分围绕多个电子管芯的密封剂。 互连结构包括多个层。 互连组件还包括设置在密封剂的一部分内并且靠近多个电子管芯的热管理层和连接到互连结构并延伸到互连组件的外围表面的受控阻抗互连。
-
-
-
-
-
-
-
-
-
搜索结果
59 条记录 (耗时 0.03 秒)
