公开(公告)号：US08581359B2

公开(公告)日：2013-11-12

申请号：US12516714

申请日：2008-08-22

申请人： Taku Horii ,  Tomihito Miyazaki ,  Makoto Kiyama

发明人： Taku Horii ,  Tomihito Miyazaki ,  Makoto Kiyama

IPC分类号： H01L29/47 ,  H01L29/02

CPC分类号： H01L29/872 ,  H01L21/0495 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66143 ,  H01L29/66212

摘要： A Schottky barrier diode includes a GaN freestanding substrate having a front surface, a GaN epitaxial layer deposited on the front surface, and an insulation layer deposited on the GaN epitaxial layer at a front surface and having an opening. Furthermore, the Schottky barrier diode also includes an electrode. The electrode is configured by a Schottky electrode provided in the opening in contact with the GaN epitaxial layer, and a field plate electrode connected to the Schottky electrode and also overlapping the insulation layer. The GaN freestanding substrate has a dislocation density of at most 1×108 cm−2.

摘要翻译： 肖特基势垒二极管包括具有前表面的GaN独立衬底，沉积在前表面上的GaN外延层和在前表面上沉积在GaN外延层上并具有开口的绝缘层。 此外，肖特基势垒二极管还包括电极。 电极由设置在与GaN外延层接触的开口中的肖特基电极和连接到肖特基电极并且还与绝缘层重叠的场板电极构成。 GaN独立基板的位错密度为1×108cm-2以下。

公开(公告)号：US20120037918A1

公开(公告)日：2012-02-16

申请号：US13266420

申请日：2009-12-25

申请人： Tomihito Miyazaki ,  Makoto Kiyama ,  Taku Horii

发明人： Tomihito Miyazaki ,  Makoto Kiyama ,  Taku Horii

IPC分类号： H01L29/20 ,  H01L21/20

CPC分类号： H01L21/20 ,  H01L21/28575 ,  H01L21/28581 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/452 ,  H01L29/475 ,  H01L29/4958 ,  H01L29/7813 ,  H01L29/872 ,  H01L2224/04042 ,  H01L2224/05018 ,  H01L2224/05026 ,  H01L2224/05558 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48724 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/2076

摘要： A semiconductor device includes a semiconductor layer (1) containing GaN and an electrode. The electrode includes an electrode main body (6), a connection-use electrode (8) containing Al and formed at a position farther from the semiconductor layer (1) than the electrode main body (6), and a barrier layer (7) formed between the electrode main body (6) and the connection-use electrode (8), the barrier layer (7) containing at least one selected from the group consisting of W, TiW, WN, TiN, Ta, and TaN. A surface roughness RMS of the barrier layer (7) is 3.0 nm or less.

摘要翻译： 半导体器件包括含有GaN和电极的半导体层（1）。 所述电极包括电极主体（6），包含Al并形成在比所述电极主体（6）更远离所述半导体层（1）的位置处的连接用电极（8）和阻挡层（7） 形成在电极主体（6）和连接用电极（8）之间，阻挡层（7）含有选自W，TiW，WN，TiN，Ta和TaN中的至少一种。 阻挡层（7）的表面粗糙度RMS为3.0nm以下。

公开(公告)号：US08502337B2

公开(公告)日：2013-08-06

申请号：US13057241

申请日：2009-07-23

申请人： Taku Horii ,  Tomihito Miyazaki ,  Makoto Kiyama

发明人： Taku Horii ,  Tomihito Miyazaki ,  Makoto Kiyama

IPC分类号： H01L29/20

CPC分类号： H01L29/872 ,  H01L29/0611 ,  H01L29/08 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/475 ,  H01L29/66143

摘要： A method for manufacturing a Schottky barrier diode includes the following steps. First, a GaN substrate is prepared. A GaN layer is formed on the GaN substrate. A Schottky electrode including a first layer made of Ni or Ni alloy and in contact with the GaN layer is formed. The step of forming the Schottky electrode includes a step of forming a metal layer to serve as the Schottky electrode and a step of heat treating the metal layer. A region of the GaN layer in contact with the Schottky electrode has a dislocation density of 1×108 cm−2 or less.

摘要翻译： 制造肖特基势垒二极管的方法包括以下步骤。 首先，准备GaN衬底。 在GaN衬底上形成GaN层。 形成包括由Ni或Ni合金制成并与GaN层接触的第一层的肖特基电极。 形成肖特基电极的步骤包括形成金属层以用作肖特基电极的步骤和对金属层进行热处理的步骤。 与肖特基电极接触的GaN层的区域的位错密度为1×10 8 cm -2以下。

公开(公告)号：US20100059761A1

公开(公告)日：2010-03-11

申请号：US12516714

申请日：2008-08-22

申请人： Taku Horii ,  Tomihito Miyazaki ,  Makoto Kiyama

发明人： Taku Horii ,  Tomihito Miyazaki ,  Makoto Kiyama

IPC分类号： H01L29/872 ,  H01L29/20

CPC分类号： H01L29/872 ,  H01L21/0495 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66143 ,  H01L29/66212

摘要： A Schottky barrier diode includes a GaN freestanding substrate having a front surface, a GaN epitaxial layer deposited on the front surface, and an insulation layer deposited on the GaN epitaxial layer at a front surface and having an opening. Furthermore, the Schottky barrier diode also includes an electrode. The electrode is configured by a Schottky electrode provided in the opening in contact with the GaN epitaxial layer, and a field plate electrode connected to the Schottky electrode and also overlapping the insulation layer. The GaN freestanding substrate has a dislocation density of at most 1×108 cm−2.

摘要翻译： 肖特基势垒二极管包括具有前表面的GaN独立衬底，沉积在前表面上的GaN外延层和在前表面上沉积在GaN外延层上并具有开口的绝缘层。 此外，肖特基势垒二极管还包括电极。 电极由设置在与GaN外延层接触的开口中的肖特基电极和连接到肖特基电极并且还与绝缘层重叠的场板电极构成。 GaN独立基板的位错密度为1×108cm-2以下。

公开(公告)号：US08614446B2

公开(公告)日：2013-12-24

申请号：US13266420

申请日：2009-12-25

申请人： Tomihito Miyazaki ,  Makoto Kiyama ,  Taku Horii

发明人： Tomihito Miyazaki ,  Makoto Kiyama ,  Taku Horii

IPC分类号： H01L29/15

CPC分类号： H01L21/20 ,  H01L21/28575 ,  H01L21/28581 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/452 ,  H01L29/475 ,  H01L29/4958 ,  H01L29/7813 ,  H01L29/872 ,  H01L2224/04042 ,  H01L2224/05018 ,  H01L2224/05026 ,  H01L2224/05558 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48724 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/2076

摘要： A semiconductor device includes a semiconductor layer (1) containing GaN and an electrode. The electrode includes an electrode main body (6), a connection-use electrode (8) containing Al and formed at a position farther from the semiconductor layer (1) than the electrode main body (6), and a barrier layer (7) formed between the electrode main body (6) and the connection-use electrode (8), the barrier layer (7) containing at least one selected from the group consisting of W, TiW, WN, TiN, Ta, and TaN. A surface roughness RMS of the barrier layer (7) is 3.0 nm or less.

摘要翻译： 半导体器件包括含有GaN和电极的半导体层（1）。 所述电极包括电极主体（6），包含Al并形成在比所述电极主体（6）更远离所述半导体层（1）的位置处的连接用电极（8）和阻挡层（7） 形成在电极主体（6）和连接用电极（8）之间，阻挡层（7）含有选自W，TiW，WN，TiN，Ta和TaN中的至少一种。 阻挡层（7）的表面粗糙度RMS为3.0nm以下。

公开(公告)号：US20110133210A1

公开(公告)日：2011-06-09

申请号：US13057241

申请日：2009-07-23

申请人： Taku Horii ,  Tomihito Miyazaki ,  Makoto Kiyama

发明人： Taku Horii ,  Tomihito Miyazaki ,  Makoto Kiyama

IPC分类号： H01L29/20 ,  H01L21/283

CPC分类号： H01L29/872 ,  H01L29/0611 ,  H01L29/08 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/475 ,  H01L29/66143

摘要： A method for manufacturing a Schottky barrier diode includes the following steps. First, a GaN substrate is prepared. A GaN layer is formed on the GaN substrate. A Schottky electrode including a first layer made of Ni or Ni alloy and in contact with the GaN layer is formed. The step of forming the Schottky electrode includes a step of forming a metal layer to serve as the Schottky electrode and a step of heat treating the metal layer. A region of the GaN layer in contact with the Schottky electrode has a dislocation density of 1×108 cm−2 or less.

摘要翻译： 制造肖特基势垒二极管的方法包括以下步骤。 首先，准备GaN衬底。 在GaN衬底上形成GaN层。 形成包括由Ni或Ni合金制成并与GaN层接触的第一层的肖特基电极。 形成肖特基电极的步骤包括形成金属层以用作肖特基电极的步骤和对金属层进行热处理的步骤。 与肖特基电极接触的GaN层的区域的位错密度为1×10 8 cm -2以下。

公开(公告)号：US07884393B2

公开(公告)日：2011-02-08

申请号：US12786440

申请日：2010-05-25

申请人： Shin Hashimoto ,  Makoto Kiyama ,  Takashi Sakurada ,  Tatsuya Tanabe ,  Kouhei Miura ,  Tomihito Miyazaki

发明人： Shin Hashimoto ,  Makoto Kiyama ,  Takashi Sakurada ,  Tatsuya Tanabe ,  Kouhei Miura ,  Tomihito Miyazaki

IPC分类号： H01L29/778

CPC分类号： H01L29/7787 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/0262 ,  H01L29/2003 ,  H01L29/66462

摘要： Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor (11) is provided with a supporting substrate (13) composed of gallium nitride, a buffer layer (15) composed of a first gallium nitride semiconductor, a channel layer (17) composed of a second gallium nitride semiconductor, a semiconductor layer (19) composed of a third gallium nitride semiconductor, and electrode structures (a gate electrode (21), a source electrode (23) and a drain electrode (25) for the transistor (11). The band gap of the third gallium nitride semiconductor is broader than that of the second gallium nitride semiconductor. The carbon concentration NC1 of the first gallium nitride semiconductor is 4×1017 cm−3 or more. The carbon concentration NC2 of the second gallium nitride semiconductor is less than 4×1016 cm−3.

摘要翻译： 提供具有高纯度沟道层和高电阻缓冲层的高电子迁移率晶体管。 高电子迁移率晶体管（11）设置有由氮化镓构成的支撑基板（13），由第一氮化镓半导体构成的缓冲层（15），由第二氮化镓半导体构成的沟道层（17） 由第三氮化镓半导体构成的半导体层（19）和用于晶体管（11）的电极结构（栅电极（21），源电极（23）和漏电极（25）），带隙 第三氮化镓半导体的第二氮化镓半导体的碳浓度NC2比第二氮化镓半导体的碳浓度小于4×10 17 cm -3以上， 1016厘米-3。

公开(公告)号：US07749828B2

公开(公告)日：2010-07-06

申请号：US11571156

申请日：2006-03-03

申请人： Shin Hashimoto ,  Makoto Kiyama ,  Takashi Sakurada ,  Tatsuya Tanabe ,  Kouhei Miura ,  Tomihito Miyazaki

发明人： Shin Hashimoto ,  Makoto Kiyama ,  Takashi Sakurada ,  Tatsuya Tanabe ,  Kouhei Miura ,  Tomihito Miyazaki

IPC分类号： H01L21/338

CPC分类号： H01L29/7787 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/0262 ,  H01L29/2003 ,  H01L29/66462

摘要： Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor 11 is provided with a supporting substrate 13 composed of gallium nitride, a buffer layer 15 composed of a first gallium nitride semiconductor, a channel layer 17 composed of a second gallium nitride semiconductor, a semiconductor layer 19 composed of a third gallium nitride semiconductor, and electrode structures (a gate electrode 21, a source electrode 23 and a drain electrode 25) for the transistor 11. The band gap of the third gallium nitride semiconductor is broader than that of the second gallium nitride semiconductor. The carbon concentration NC1 of the first gallium nitride semiconductor is 4×1017 cm−3 or more. The carbon concentration NC2 of the second gallium nitride semiconductor is less than 4×1016 cm−3.

摘要翻译： 提供具有高纯度沟道层和高电阻缓冲层的高电子迁移率晶体管。 高电子迁移率晶体管11设置有由氮化镓构成的支撑基板13，由第一氮化镓半导体构成的缓冲层15，由第二氮化镓半导体构成的沟道层17，由第三氮化镓半导体构成的半导体层19 氮化镓半导体，以及用于晶体管11的电极结构（栅电极21，源电极23和漏电极25）。第三氮化镓半导体的带隙比第二氮化镓半导体的带隙宽。 第一氮化镓半导体的碳浓度NC1为4×1017cm-3以上。 第二氮化镓半导体的碳浓度NC2小于4×1016cm-3。

公开(公告)号：US20100224952A1

公开(公告)日：2010-09-09

申请号：US12301944

申请日：2008-03-19

申请人： Tomihito Miyazaki ,  Makoto Kiyama

发明人： Tomihito Miyazaki ,  Makoto Kiyama

IPC分类号： H01L29/872 ,  H01L21/329

CPC分类号： H01L29/872 ,  H01L29/2003 ,  H01L29/66143 ,  H01L29/66204

摘要： A Schottky barrier diode includes an epitaxial growth layer disposed on a substrate and having a mesa portion, and a Schottky electrode disposed on the mesa portion, wherein a distance between an edge of the Schottky electrode and a top surface edge of the mesa portion is 2 μm or less. Since the distance x is 2 μm or less, a leakage current is significantly decreased, a breakdown voltage is improved, and a Schottky barrier diode having excellent reverse breakdown voltage characteristics is provide.

摘要翻译： 肖特基势垒二极管包括设置在基板上并具有台面部分的外延生长层和设置在台面部分上的肖特基电极，其中肖特基电极的边缘与台面部分的顶表面边缘之间的距离为2 μm以下。 由于距离x为2μm以下，所以漏电流明显降低，击穿电压提高，并且提供具有优异的反向击穿电压特性的肖特基势垒二极管。

公开(公告)号：US20090189190A1

公开(公告)日：2009-07-30

申请号：US11571156

申请日：2006-03-03

申请人： Shin Hashimoto ,  Makoto Kiyama ,  Takashi Sakurada ,  Tatsuya Tanabe ,  Kouhei Miura ,  Tomihito Miyazaki

发明人： Shin Hashimoto ,  Makoto Kiyama ,  Takashi Sakurada ,  Tatsuya Tanabe ,  Kouhei Miura ,  Tomihito Miyazaki

IPC分类号： H01L29/80 ,  H01L21/20

CPC分类号： H01L29/7787 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/0262 ,  H01L29/2003 ,  H01L29/66462

摘要： Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor 11 is provided with a supporting substrate 13 composed of gallium nitride, a buffer layer 15 composed of a first gallium nitride semiconductor, a channel layer 17 composed of a second gallium nitride semiconductor, a semiconductor layer 19 composed of a third gallium nitride semiconductor, and electrode structures (a gate electrode 21, a source electrode 23 and a drain electrode 25) for the transistor 11. The band gap of the third gallium nitride semiconductor is broader than that of the second gallium nitride semiconductor. The carbon concentration NC1 of the first gallium nitride semiconductor is 4×1017 cm−3 or more. The carbon concentration NC2 of the second gallium nitride semiconductor is less than 4×1016 cm−3.

摘要翻译： 提供具有高纯度沟道层和高电阻缓冲层的高电子迁移率晶体管。 高电子迁移率晶体管11设置有由氮化镓构成的支撑基板13，由第一氮化镓半导体构成的缓冲层15，由第二氮化镓半导体构成的沟道层17，由第三氮化镓半导体构成的半导体层19 氮化镓半导体，以及用于晶体管11的电极结构（栅电极21，源电极23和漏电极25）。第三氮化镓半导体的带隙比第二氮化镓半导体的带隙宽。 第一氮化镓半导体的碳浓度NC1为4×10 17 cm -3以上。 第二氮化镓半导体的碳浓度NC2小于4×10 16 cm -3。