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    TRANSISTOR DEVICES WITH NANO-CRYSTAL GATE STRUCTURES
    3.
    发明申请
    TRANSISTOR DEVICES WITH NANO-CRYSTAL GATE STRUCTURES 有权
    具有纳米晶体结构的晶体管器件

    公开(公告)号：US20100155825A1

    公开(公告)日：2010-06-24

    申请号：US12715947

    申请日：2010-03-02

    申请人： Chun-Li Liu ,  Tushar P. Merchant ,  Marius K. Orlowski ,  Matthew W. Stoker

    发明人： Chun-Li Liu ,  Tushar P. Merchant ,  Marius K. Orlowski ,  Matthew W. Stoker

    IPC分类号： H01L29/792

    CPC分类号： H01L29/7883 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/513 ,  H01L29/66825 ,  H01L29/78

    摘要： Embodiments of non-volatile semiconductor devices include a substrate having therein a source region and a drain region separated by a channel region extending to a first surface of the substrate, and a multilayered gate structure containing nano-crystals located above the channel region. The gate structure comprises a gate dielectric substantially in contact with the channel region, spaced-apart nano-crystals disposed in the gate dielectric, one or more impurity blocking layers overlying the gate dielectric, and a gate conductor layer overlying the one more impurity blocking layers. The blocking layer nearest the gate conductor can be used to adjust the threshold voltage of the device and/or retard dopant out-diffusion from the gate conductor layer.

    摘要翻译： 非易失性半导体器件的实施例包括其中具有源极区域和漏极区域的衬底，所述源极区域和漏极区域被延伸到衬底的第一表面的沟道区域分开，以及包含位于沟道区域上方的纳米晶体的多层栅极结构。 栅极结构包括基本上与沟道区接触的栅极电介质，设置在栅极电介质中的间隔开的纳米晶体，覆盖栅极电介质的一个或多个杂质阻挡层，以及叠加在一个以上杂质阻挡层上的栅极导体层 。 可以使用最靠近栅极导体的阻挡层来调节器件的阈值电压和/或从栅极导体层延迟掺杂剂的扩散。

    Transistor devices with nano-crystal gate structures
    4.
    发明授权
    Transistor devices with nano-crystal gate structures 有权
    具有纳米晶体栅结构的晶体管器件

    公开(公告)号：US07928502B2

    公开(公告)日：2011-04-19

    申请号：US12715947

    申请日：2010-03-02

    申请人： Chun-Li Liu ,  Tushar P. Merchant ,  Marius K. Orlowski ,  Matthew W. Stoker

    发明人： Chun-Li Liu ,  Tushar P. Merchant ,  Marius K. Orlowski ,  Matthew W. Stoker

    IPC分类号： H01L29/792 ,  H01L29/76

    CPC分类号： H01L29/7883 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/513 ,  H01L29/66825 ,  H01L29/78

    摘要： Embodiments of non-volatile semiconductor devices include a substrate having therein a source region and a drain region separated by a channel region extending to a first surface of the substrate, and a multilayered gate structure containing nano-crystals located above the channel region. The gate structure comprises a gate dielectric substantially in contact with the channel region, spaced-apart nano-crystals disposed in the gate dielectric, one or more impurity blocking layers overlying the gate dielectric, and a gate conductor layer overlying the one more impurity blocking layers. The blocking layer nearest the gate conductor can be used to adjust the threshold voltage of the device and/or retard dopant out-diffusion from the gate conductor layer.

    摘要翻译： 非易失性半导体器件的实施例包括其中具有源极区域和漏极区域的衬底，所述源极区域和漏极区域被延伸到衬底的第一表面的沟道区域分开，以及包含位于沟道区域上方的纳米晶体的多层栅极结构。 栅极结构包括基本上与沟道区接触的栅极电介质，设置在栅极电介质中的间隔开的纳米晶体，覆盖栅极电介质的一个或多个杂质阻挡层，以及叠加在一个以上杂质阻挡层上的栅极导体层 。 可以使用最靠近栅极导体的阻挡层来调节器件的阈值电压和/或从栅极导体层延迟掺杂剂的扩散。

    MOS device with nano-crystal gate structure
    5.
    发明授权
    MOS device with nano-crystal gate structure 有权
    具有纳米晶体栅结构的MOS器件

    公开(公告)号：US07700438B2

    公开(公告)日：2010-04-20

    申请号：US11343624

    申请日：2006-01-30

    申请人： Chun-Li Liu ,  Tushar P. Merchant ,  Marius K. Orlowski ,  Matthew W. Stoker

    发明人： Chun-Li Liu ,  Tushar P. Merchant ,  Marius K. Orlowski ,  Matthew W. Stoker

    IPC分类号： H01L21/336 ,  H01L21/3205

    CPC分类号： H01L29/7883 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/42332 ,  H01L29/513 ,  H01L29/66825 ,  H01L29/78

    摘要： Methods and apparatus are provided for non-volatile semiconductor devices. The apparatus comprises a substrate having therein a source region and a drain region separated by a channel region extending to a first surface of the substrate, and a multilayered gate structure containing nano-crystals located above the channel region. The gate structure comprises, a gate dielectric substantially in contact with the channel region, spaced-apart nano-crystals disposed in the gate dielectric, one or more impurity blocking layers overlying the gate dielectric and a gate conductor layer overlying the one more impurity blocking layers. The blocking layer nearest the gate conductor can also be used to adjust the threshold voltage of the device and/or retard dopant out-diffusion from the gate conductor layer.

    摘要翻译： 为非易失性半导体器件提供了方法和装置。 该装置包括其中具有源极区域和漏极区域的衬底，漏极区域被延伸到衬底的第一表面的沟道区域分开，以及包含位于沟道区域上方的纳米晶体的多层栅极结构。 栅极结构包括：基本上与沟道区接触的栅极电介质，设置在栅极电介质中的间隔开的纳米晶体，覆盖栅极电介质的一个或多个杂质阻挡层和覆盖一个以上杂质阻挡层的栅极导体层 。 最靠近栅极导体的阻挡层也可用于调节器件的阈值电压和/或从栅极导体层延迟掺杂剂扩散。

    Method of making a phase change memory cell having a silicide heater in conjunction with a FinFET
    10.
    发明授权
    Method of making a phase change memory cell having a silicide heater in conjunction with a FinFET 有权
    制造具有与FinFET结合的硅化物加热器的相变存储单元的方法

    公开(公告)号：US08563355B2

    公开(公告)日：2013-10-22

    申请号：US12016739

    申请日：2008-01-18

    申请人： Leo Mathew ,  Tushar P. Merchant ,  Ramachandran Muralidhar ,  Rajesh A. Rao

    发明人： Leo Mathew ,  Tushar P. Merchant ,  Ramachandran Muralidhar ,  Rajesh A. Rao

    IPC分类号： H01L21/06

    CPC分类号： H01L27/2436 ,  H01L29/785 ,  H01L45/06 ,  H01L45/1226 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1675

    摘要： A phase change memory (PCM) cell includes a transistor, a PCM structure, and a heater. The transistor has a first current electrode and a second current electrode in a structure, and a channel region having a first portion along a first sidewall of the structure and having a second portion along a second sidewall of the structure. The second sidewall is opposite the first sidewall. The transistor has a control electrode that has a first portion adjacent to the first sidewall and a second portion adjacent to the second sidewall. The PCM structure exhibits first and second resistive values when in first and second phase states, respectively. The heater is on the structure and produces heat when current flows through the heater for changing the phase state of the phase change structure.

    摘要翻译： 相变存储器（PCM）单元包括晶体管，PCM结构和加热器。 晶体管具有结构中的第一电流电极和第二电流电极，以及具有沿着结构的第一侧壁的第一部分并且具有沿着结构的第二侧壁的第二部分的沟道区域。 第二侧壁与第一侧壁相对。 晶体管具有控制电极，该控制电极具有与第一侧壁相邻的第一部分和与第二侧壁相邻的第二部分。 当分别处于第一和第二相位状态时，PCM结构呈现出第一和第二电阻值。 当电流流过加热器以改变相变结构的相位状态时，加热器在结构上并产生热量。