-
公开(公告)号：US08097873B2
公开(公告)日：2012-01-17
申请号：US12881678
申请日：2010-09-14
CPC分类号： H01L45/1233 , H01L45/06 , H01L45/126 , H01L45/1273 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1675
摘要： A phase change memory cell has a first electrode, a plurality of pillars, and a second electrode. The plurality of pillars are electrically coupled with the first electrode. Each of the pillars comprises a phase change material portion and a heater material portion. The second electrode is electrically coupled to each of the pillars. In some examples, the pillars have a width less than 20 nanometers.
摘要翻译： 相变存储单元具有第一电极，多个柱和第二电极。 多个柱与第一电极电耦合。 每个支柱包括相变材料部分和加热器材料部分。 第二电极电耦合到每个支柱。 在一些示例中，支柱具有小于20纳米的宽度。
-
公开(公告)号：US20070202645A1
公开(公告)日：2007-08-30
申请号：US11680121
申请日：2007-02-28
申请人： Tien Ying Luo , Lakshmanna Vishnubhotla , Tushar P. Merchant , Rajesh A. Rao , Ramachandran Muralidhar
发明人： Tien Ying Luo , Lakshmanna Vishnubhotla , Tushar P. Merchant , Rajesh A. Rao , Ramachandran Muralidhar
IPC分类号： H01L21/8242
CPC分类号： H01L29/7885 , B82Y10/00 , H01L21/02164 , H01L21/02271 , H01L21/02304 , H01L21/02337 , H01L21/31612 , H01L29/40117 , H01L29/42332 , H01L29/7883
摘要： An oxide layer formed by deposition is subject to a treatment process to repair bond defects of the oxide layer. In one embodiment, the layer is treated with nitric oxide. In one embodiment, a nitric oxide gas is flowed over the dielectric layer at an elevated temperature. In still another embodiment, the oxide layer is treated with fluorine. A layer is deposited over the oxide layer and a species containing fluorine is ion implanted into the layer. The wafer is heated where the species is driven to the oxide layer.
摘要翻译： 通过沉积形成的氧化物层经受处理工艺以修复氧化物层的结合缺陷。 在一个实施方案中，该层用一氧化氮处理。 在一个实施方案中，一氧化氮气体在升高的温度下流过电介质层。 在另一个实施方案中，用氟处理氧化物层。 在氧化物层上沉积一层，并且将含氟物质离子注入到该层中。 加热晶片，将物质驱动到氧化物层。
-
3.发明授权Process of forming an electronic device including a layer of discontinuous storage elements 有权形成包括不连续存储元件层的电子器件的工艺公开(公告)号：US07932189B2
公开(公告)日：2011-04-26
申请号：US11627817
申请日：2007-01-26
申请人： Tushar P. Merchant , Chun-Li Liu , Ramachandran Muralidhar , Marius K. Orlowski , Rajesh A. Rao , Matthew Stoker
发明人： Tushar P. Merchant , Chun-Li Liu , Ramachandran Muralidhar , Marius K. Orlowski , Rajesh A. Rao , Matthew Stoker
IPC分类号： H01L21/31
CPC分类号： H01L21/28273 , B82Y10/00 , H01L27/11524 , H01L29/7887 , Y10S977/932 , Y10S977/943
摘要： An electronic device can include a layer of discontinuous storage elements. A dielectric layer overlying the discontinuous storage elements can be substantially hydrogen-free. A process of forming the electronic device can include forming a layer including silicon over the discontinuous storage elements. In one embodiment, the process includes oxidizing at least substantially all of the layer. In another embodiment, the process includes forming the layer using a substantially hydrogen-free silicon precursor material and oxidizing at least substantially all of the layer.
摘要翻译： 电子设备可以包括不连续的存储元件层。 覆盖不连续存储元件的电介质层可以是基本上无氢的。 形成电子器件的工艺可以包括在不连续的存储元件上形成包括硅的层。 在一个实施方案中，该方法包括至少基本上氧化所有该层。 在另一个实施方案中，该方法包括使用基本上无氢的硅前体材料形成层并至少基本上全部氧化。
-
公开(公告)号：US20090085024A1
公开(公告)日：2009-04-02
申请号：US11864246
申请日：2007-09-28
CPC分类号： H01L45/1233 , H01L45/06 , H01L45/126 , H01L45/1273 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1675
摘要： A phase change memory cell has a first electrode, a plurality of pillars, and a second electrode. The plurality of pillars are electrically coupled with the first electrode. Each of the pillars comprises a phase change material portion and a heater material portion. The second electrode is electrically coupled to each of the pillars. In some examples, the pillars have a width less than 20 nanometers.
摘要翻译： 相变存储单元具有第一电极，多个柱和第二电极。 多个柱与第一电极电耦合。 每个支柱包括相变材料部分和加热器材料部分。 第二电极电耦合到每个支柱。 在一些示例中，支柱具有小于20纳米的宽度。
-
5.发明申请公开(公告)号：US20080182428A1
公开(公告)日：2008-07-31
申请号：US11627817
申请日：2007-01-26
申请人： Tushar P. Merchant , Chun-Li Liu , Ramachandran Muralidhar , Marius K. Orlowski , Rajesh A. Rao , Matthew Stoker
发明人： Tushar P. Merchant , Chun-Li Liu , Ramachandran Muralidhar , Marius K. Orlowski , Rajesh A. Rao , Matthew Stoker
IPC分类号： H01L21/31
CPC分类号： H01L21/28273 , B82Y10/00 , H01L27/11524 , H01L29/7887 , Y10S977/932 , Y10S977/943
摘要： An electronic device can include a layer of discontinuous storage elements. A dielectric layer overlying the discontinuous storage elements can be substantially hydrogen-free. A process of forming the electronic device can include forming a layer including silicon over the discontinuous storage elements. In one embodiment, the process includes oxidizing at least substantially all of the layer. In another embodiment, the process includes forming the layer using a substantially hydrogen-free silicon precursor material and oxidizing at least substantially all of the layer.
摘要翻译： 电子设备可以包括不连续的存储元件层。 覆盖不连续存储元件的电介质层可以是基本上无氢的。 形成电子器件的过程可以包括在不连续的存储元件上形成包括硅的层。 在一个实施方案中，该方法包括至少基本上氧化所有该层。 在另一个实施方案中，该方法包括使用基本上无氢的硅前体材料形成该层并至少基本上全部氧化。
-
公开(公告)号：US06808986B2
公开(公告)日：2004-10-26
申请号：US10231556
申请日：2002-08-30
IPC分类号： H01L21336
CPC分类号： B82Y10/00 , C23C16/02 , C23C16/24 , H01L21/0237 , H01L21/02488 , H01L21/02532 , H01L21/0259 , H01L21/0262 , H01L21/28273 , H01L29/42332
摘要： Nanocrystals (22) are formed in a semiconductor, such as for example, in a memory having a floating gate. A dielectric (18) overlies a substrate (12) and is placed in a chemical vapor deposition chamber (34). A first precursor gas, such as disilane (36), is flowed into the chemical vapor deposition chamber during a first phase to nucleate the nanocrystals (22) on the dielectric with first predetermined processing conditions existing within the chemical vapor deposition chamber for a first time period. A second precursor gas, such as silane, is flowed into the chemical vapor deposition chamber during a second phase subsequent to the first phase to grow the nanocrystals under second predetermined processing conditions existing within the chemical vapor deposition chamber for a second time period.
-
7.发明授权Method of making a phase change memory cell having a silicide heater in conjunction with a FinFET 有权制造具有与FinFET结合的硅化物加热器的相变存储单元的方法公开(公告)号：US08563355B2
公开(公告)日：2013-10-22
申请号：US12016739
申请日：2008-01-18
IPC分类号： H01L21/06
CPC分类号： H01L27/2436 , H01L29/785 , H01L45/06 , H01L45/1226 , H01L45/126 , H01L45/144 , H01L45/1675
摘要： A phase change memory (PCM) cell includes a transistor, a PCM structure, and a heater. The transistor has a first current electrode and a second current electrode in a structure, and a channel region having a first portion along a first sidewall of the structure and having a second portion along a second sidewall of the structure. The second sidewall is opposite the first sidewall. The transistor has a control electrode that has a first portion adjacent to the first sidewall and a second portion adjacent to the second sidewall. The PCM structure exhibits first and second resistive values when in first and second phase states, respectively. The heater is on the structure and produces heat when current flows through the heater for changing the phase state of the phase change structure.
摘要翻译： 相变存储器（PCM）单元包括晶体管，PCM结构和加热器。 晶体管具有结构中的第一电流电极和第二电流电极，以及具有沿着结构的第一侧壁的第一部分并且具有沿着结构的第二侧壁的第二部分的沟道区域。 第二侧壁与第一侧壁相对。 晶体管具有控制电极，该控制电极具有与第一侧壁相邻的第一部分和与第二侧壁相邻的第二部分。 当分别处于第一和第二相位状态时，PCM结构呈现出第一和第二电阻值。 当电流流过加热器以改变相变结构的相位状态时，加热器在结构上并产生热量。
-
公开(公告)号：US07811851B2
公开(公告)日：2010-10-12
申请号：US11864246
申请日：2007-09-28
CPC分类号： H01L45/1233 , H01L45/06 , H01L45/126 , H01L45/1273 , H01L45/143 , H01L45/144 , H01L45/148 , H01L45/1675
摘要： A phase change memory cell has a first electrode, a plurality of pillars, and a second electrode. The plurality of pillars are electrically coupled with the first electrode. Each of the pillars comprises a phase change material portion and a heater material portion. The second electrode is electrically coupled to each of the pillars. In some examples, the pillars have a width less than 20 nanometers.
摘要翻译： 相变存储单元具有第一电极，多个柱和第二电极。 多个柱与第一电极电耦合。 每个柱子包括相变材料部分和加热器材料部分。 第二电极电耦合到每个支柱。 在一些示例中，支柱具有小于20纳米的宽度。
-
公开(公告)号：US20090184306A1
公开(公告)日：2009-07-23
申请号：US12016739
申请日：2008-01-18
IPC分类号： H01L45/00
CPC分类号： H01L27/2436 , H01L29/785 , H01L45/06 , H01L45/1226 , H01L45/126 , H01L45/144 , H01L45/1675
摘要： A phase change memory (PCM) cell includes a transistor, a PCM structure, and a heater. The transistor has a first current electrode and a second current electrode in a structure, and a channel region having a first portion along a first sidewall of the structure and having a second portion along a second sidewall of the structure. The second sidewall is opposite the first sidewall. The transistor has a control electrode that has a first portion adjacent to the first sidewall and a second portion adjacent to the second sidewall. The PCM structure exhibits first and second resistive values when in first and second phase states, respectively. The heater is on the structure and produces heat when current flows through the heater for changing the phase state of the phase change structure.
摘要翻译： 相变存储器（PCM）单元包括晶体管，PCM结构和加热器。 晶体管具有结构中的第一电流电极和第二电流电极，以及具有沿着结构的第一侧壁的第一部分并且具有沿着结构的第二侧壁的第二部分的沟道区域。 第二侧壁与第一侧壁相对。 晶体管具有控制电极，该控制电极具有与第一侧壁相邻的第一部分和与第二侧壁相邻的第二部分。 当分别处于第一和第二相状态时，PCM结构呈现出第一和第二电阻值。 当电流流过加热器以改变相变结构的相位状态时，加热器在结构上并产生热量。
-
公开(公告)号：US20080303094A1
公开(公告)日：2008-12-11
申请号：US11759593
申请日：2007-06-07
CPC分类号： H01L29/792 , H01L21/28273 , H01L29/42324 , H01L29/42328 , H01L29/42332
摘要： A method of forming a split gate memory device using a semiconductor layer includes patterning an insulating layer to leave a pillar thereof. A gate dielectric is formed over the semiconductor layer. A charge storage layer is formed over the gate dielectric and along first and second sides of the pillar. A gate material layer is formed over the gate dielectric and pillar. An etch is performed to leave a first portion of the gate material laterally adjacent to a first side of the pillar and over a first portion of the charge storage layer that is over the gate dielectric to function as a control gate of the memory device and a second portion of the gate material laterally adjacent to a second side of the pillar and over a second portion of the charge storage layer that is over the gate dielectric to function as a select gate.
摘要翻译： 使用半导体层形成分离栅极存储器件的方法包括图案化绝缘层以留下其柱。 在半导体层上形成栅极电介质。 电荷存储层形成在栅极电介质上并沿着柱的第一和第二侧。 栅极材料层形成在栅极电介质和支柱上。 执行蚀刻以将栅极材料的第一部分横向邻近柱的第一侧并且位于栅极电介质上方的电荷存储层的第一部分上，以用作存储器件的控制栅极，并且 栅极材料的第二部分横向邻近柱的第二侧，并且位于栅极电介质上方的电荷存储层的第二部分上，用作选择栅极。
-
-
-
-
-
-
-
-
-
搜索结果
31 条记录 (耗时 0.019 秒)