公开(公告)号：US20230230930A1

公开(公告)日：2023-07-20

申请号：US17674796

申请日：2022-02-17

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuang-Hui Tang

IPC: H01L23/544 ,  H01L23/48 ,  H01L23/528 ,  H01L29/20 ,  H01L29/40 ,  H01L29/45 ,  H01L29/47 ,  H01L29/778 ,  H01L21/768 ,  H01L21/66

CPC classification number: H01L23/544 ,  H01L23/481 ,  H01L23/5286 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/452 ,  H01L29/475 ,  H01L29/7786 ,  H01L21/76898 ,  H01L22/12 ,  H01L2223/5444

Abstract: A semiconductor structure with backside through silicon vias (TSVs) is provided in the present invention, including a semiconductor substrate with a front side and a back side, multiple dummy pads set on the front side, multiple backside TSVs extending from the back side to the front side, wherein a number of the dummy pads are connected with the backside TSVs while other dummy pads are not connected with the backside TSVs, and a metal coating covering the back side and the surface of backside TSVs and connected with those dummy pads that connecting with the backside TSVs.

公开(公告)号：US09899333B2

公开(公告)日：2018-02-20

申请号：US15219272

申请日：2016-07-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuang-Hui Tang

IPC: H01L29/04 ,  H01L29/10 ,  H01L31/00 ,  H01L23/544 ,  H01L23/00 ,  H01L21/762 ,  H01L23/58 ,  H01L21/784 ,  H01L23/48 ,  H01L21/56 ,  H01L21/768 ,  H01L23/522 ,  H01L21/66 ,  H01L21/78

CPC classification number: H01L23/544 ,  H01L21/56 ,  H01L21/76232 ,  H01L21/76898 ,  H01L21/78 ,  H01L21/784 ,  H01L22/34 ,  H01L23/481 ,  H01L23/522 ,  H01L23/562 ,  H01L23/585 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/37001 ,  H01L2924/00

Abstract: A crack-stopping structure includes a semiconductor wafer comprising a plurality of dies defined by a plurality of scribe line regions, a plurality of metal patterns formed in the scribe line regions, and a plurality of groups of through silicon holes (TSHs) formed in the scribe line regions. The wafer further includes a front side and a back side, and the TSHs respectively include at least a bottom opening formed in the bottom side of the wafer. The groups of TSHs are formed between the metal patterns and the dies.

公开(公告)号：US20150255430A1

公开(公告)日：2015-09-10

申请号：US14201934

申请日：2014-03-10

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuang-Hui Tang

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/522

CPC classification number: H01L25/0657 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/544 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2223/5444 ,  H01L2223/5448 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06596 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/014

Abstract: A package structure is disclosed. The package structure includes a first die, a second die on the first die, and a substrate disposed corresponding to the first die. The first die includes a first die identification (ID) region defined thereon and a plurality of first through silicon vias (TSVs) in the first die ID region. The second die includes another first die identification (ID) region and a second die ID region defined thereon and a plurality of second TSVs in the another first die ID region and a plurality of third TSVs in the second die ID region, in which the second TSVs are electrically connected to the first TSVs in the first die.

Abstract translation: 公开了一种封装结构。 封装结构包括第一管芯，第一管芯上的第二管芯和与第一管芯相对设置的衬底。 第一管芯包括在其上限定的第一管芯识别（ID）区域和第一管芯ID区域中的多个第一至第三通孔（TSV）。 第二管芯包括在其上限定的另一个第一管芯识别（ID）区域和第二管芯ID区域，以及在另一第一管芯ID区域中的多个第二TSV以及第二管芯ID区域中的多个第三TSV， TSV电连接到第一管芯中的第一TSV。

公开(公告)号：US20150155209A1

公开(公告)日：2015-06-04

申请号：US14096022

申请日：2013-12-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuang-Hui Tang

IPC: H01L21/66 ,  H01L23/00

CPC classification number: H01L22/10 ,  H01L23/544 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L2223/5444 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/1411 ,  H01L2224/16106 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/17106 ,  H01L2224/94 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2224/03 ,  H01L2924/014

Abstract: A package structure is disclosed. The package structure includes a die; a substrate disposed corresponding to the die, wherein the substrate comprises a first dummy pad and a second dummy pad on a first surface of the substrate; and a first solder ball and a second solder ball on a second surface of the substrate and electrically connect the first dummy pad and the second dummy pad respectively.

Abstract translation: 公开了一种封装结构。 包装结构包括模具; 与所述管芯相对设置的衬底，其中所述衬底包括在所述衬底的第一表面上的第一虚设焊盘和第二虚拟焊盘; 以及在所述基板的第二表面上的第一焊球和第二焊球，并分别电连接所述第一虚拟焊盘和所述第二虚设焊盘。

公开(公告)号：US11495510B2

公开(公告)日：2022-11-08

申请号：US16780639

申请日：2020-02-03

Applicant: United Microelectronics Corp.

Inventor： Yu-Yuan Huang ,  Tsung-Kai Yu ,  Chen-Hsiao Wang ,  Kai-Kuang Ho ,  Kuang-Hui Tang

IPC: H01L23/31 ,  H01L23/58 ,  H01L21/56 ,  H01L23/00

Abstract: A semiconductor device package structure includes a substrate. The substrate has a circuit structure formed in a die region. The die region is defined by a plurality of scribe lines configured on the substrate. A seal ring is disposed in the substrate and located at a periphery region of the die region, and surrounds at least a portion of the circuit structure. A trench ring is disposed in the substrate between the seal ring and the scribe lines. A packaging passivation cap layer covers over the circuit structure and the seal ring, and covers at least the trench ring.

公开(公告)号：US20160336274A1

公开(公告)日：2016-11-17

申请号：US15219272

申请日：2016-07-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuang-Hui Tang

IPC: H01L23/544 ,  H01L21/56 ,  H01L23/00 ,  H01L21/768

CPC classification number: H01L23/544 ,  H01L21/56 ,  H01L21/76232 ,  H01L21/76898 ,  H01L21/78 ,  H01L21/784 ,  H01L22/34 ,  H01L23/481 ,  H01L23/522 ,  H01L23/562 ,  H01L23/585 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/37001 ,  H01L2924/00

Abstract: A crack-stopping structure includes a semiconductor wafer comprising a plurality of dies defined by a plurality of scribe line regions, a plurality of metal patterns formed in the scribe line regions, and a plurality of groups of through silicon holes (TSHs) formed in the scribe line regions. The wafer further includes a front side and a back side, and the TSHs respectively include at least a bottom opening formed in the bottom side of the wafer. The groups of TSHs are formed between the metal patterns and the dies.

Abstract translation: 裂纹停止结构包括半导体晶片，其包括由多个划线区域限定的多个管芯，在划线区域中形成的多个金属图案，以及形成在该划线区域中的多个贯通硅孔（TSH） 划线区域。 晶片还包括前侧和后侧，并且TSH分别至少形成在晶片的底侧中的底部开口。 在金属图案和模具之间形成TSH组。

公开(公告)号：US09196549B2

公开(公告)日：2015-11-24

申请号：US14096022

申请日：2013-12-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuang-Hui Tang

IPC: H01L23/48 ,  H01L21/768 ,  H01L21/66 ,  H01L23/00

CPC classification number: H01L22/10 ,  H01L23/544 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L2223/5444 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/1411 ,  H01L2224/16106 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/17106 ,  H01L2224/94 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2224/03 ,  H01L2924/014

Abstract: A package structure is disclosed. The package structure includes a die; a substrate disposed corresponding to the die, wherein the substrate comprises a first dummy pad and a second dummy pad on a first surface of the substrate; and a first solder ball and a second solder ball on a second surface of the substrate and electrically connect the first dummy pad and the second dummy pad respectively.

Abstract translation: 公开了一种封装结构。 包装结构包括模具; 与所述管芯相对设置的衬底，其中所述衬底包括在所述衬底的第一表面上的第一虚设焊盘和第二虚拟焊盘; 以及在所述基板的第二表面上的第一焊球和第二焊球，并分别电连接所述第一虚拟焊盘和所述第二虚设焊盘。

公开(公告)号：US20150270228A1

公开(公告)日：2015-09-24

申请号：US14220140

申请日：2014-03-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuang-Hui Tang

IPC: H01L23/00 ,  H01L23/544 ,  H01L21/762 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L23/544 ,  H01L21/56 ,  H01L21/76232 ,  H01L21/76898 ,  H01L21/78 ,  H01L21/784 ,  H01L22/34 ,  H01L23/481 ,  H01L23/522 ,  H01L23/562 ,  H01L23/585 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/37001 ,  H01L2924/00

Abstract: A crack-stopping structure includes a semiconductor wafer comprising a plurality of dies defined by a plurality of scribe line regions, a plurality of metal patterns formed in the scribe line regions, and a plurality of groups of through silicon holes (TSHs) formed in the scribe line regions. The wafer further includes a front side and a back side, and the TSHs respectively include at least a bottom opening formed in the bottom side of the wafer. The groups of TSHs are formed between the metal patterns and the dies.

Abstract translation: 裂纹停止结构包括半导体晶片，其包括由多个划线区域限定的多个管芯，在划线区域中形成的多个金属图案，以及形成在该划线区域中的多组通孔硅（TSH） 划线区域。 晶片还包括前侧和后侧，并且TSH分别至少形成在晶片的底侧中的底部开口。 在金属图案和模具之间形成TSH组。

公开(公告)号：US20210202340A1

公开(公告)日：2021-07-01

申请号：US16780639

申请日：2020-02-03

Applicant: United Microelectronics Corp.

Inventor： YU-YUAN HUANG ,  Tsung-Kai Yu ,  Chen-Hsiao Wang ,  Kai-Kuang Ho ,  Kuang-Hui Tang

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L23/58

Abstract: A semiconductor device package structure includes a substrate. The substrate has a circuit structure formed in a die region. The die region is defined by a plurality of scribe lines configured on the substrate. A seal ring is disposed in the substrate and located at a periphery region of the die region, and surrounds at least a portion of the circuit structure. A trench ring is disposed in the substrate between the seal ring and the scribe lines. A packaging passivation cap layer covers over the circuit structure and the seal ring, and covers at least the trench ring.

公开(公告)号：US09431350B2

公开(公告)日：2016-08-30

申请号：US14220140

申请日：2014-03-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Kuang-Hui Tang

IPC: H01L23/544 ,  H01L23/00 ,  H01L21/762 ,  H01L23/58 ,  H01L21/784 ,  H01L23/48 ,  H01L23/522 ,  H01L21/66

CPC classification number: H01L23/544 ,  H01L21/56 ,  H01L21/76232 ,  H01L21/76898 ,  H01L21/78 ,  H01L21/784 ,  H01L22/34 ,  H01L23/481 ,  H01L23/522 ,  H01L23/562 ,  H01L23/585 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/37001 ,  H01L2924/00

Abstract: A crack-stopping structure includes a semiconductor wafer comprising a plurality of dies defined by a plurality of scribe line regions, a plurality of metal patterns formed in the scribe line regions, and a plurality of groups of through silicon holes (TSHs) formed in the scribe line regions. The wafer further includes a front side and a back side, and the TSHs respectively include at least a bottom opening formed in the bottom side of the wafer. The groups of TSHs are formed between the metal patterns and the dies.

Abstract translation: 裂纹停止结构包括半导体晶片，其包括由多个划线区域限定的多个管芯，在划线区域中形成的多个金属图案，以及形成在该划线区域中的多组通孔硅（TSH） 划线区域。 晶片还包括前侧和后侧，并且TSH分别至少形成在晶片的底侧中的底部开口。 在金属图案和模具之间形成TSH组。