公开(公告)号：US20080073774A1

公开(公告)日：2008-03-27

申请号：US11566242

申请日：2006-12-04

申请人： Wen-Kun Yang ,  Dyi-Chung Hu ,  Chih-Ming Chen ,  Hsien-Wen Hsu

发明人： Wen-Kun Yang ,  Dyi-Chung Hu ,  Chih-Ming Chen ,  Hsien-Wen Hsu

IPC分类号： H01L23/04

CPC分类号： H01L23/5389 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/19 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05026 ,  H01L2224/12105 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01094 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： A chip package including a multilayer substrate, an adhesive core layer and a chip is provided. The multilayer substrate has a plurality of material layers. The adhesive core layer is disposed on the multilayer substrate. The chip is disposed in the adhesive core layer. The chip has an active surface exposed outside the adhesive core layer. The chip includes a plurality of bonding pads disposed on the active surface and a plurality of metal conductive bodies electrically connected to the bonding pads respectively.

摘要翻译： 提供了包括多层基板，粘合芯层和芯片的芯片封装。 多层基板具有多个材料层。 粘合芯层设置在多层基板上。 芯片设置在粘合芯层中。 该芯片具有暴露在粘合芯层外的活性表面。 芯片包括设置在有源表面上的多个接合焊盘和分别与焊盘电连接的多个金属导电体。

公开(公告)号：US20080229574A1

公开(公告)日：2008-09-25

申请号：US11725826

申请日：2007-03-19

申请人： Wen-Kun Yang ,  Hsien-Wen Hsu ,  Chih-Wei Lin ,  Ming-Chung Cheng ,  Chih-Ming Chen ,  Chun-Hiu Yu

发明人： Wen-Kun Yang ,  Hsien-Wen Hsu ,  Chih-Wei Lin ,  Ming-Chung Cheng ,  Chih-Ming Chen ,  Chun-Hiu Yu

IPC分类号： B23P19/033

CPC分类号： H01L21/67144 ,  H01L24/95 ,  H01L25/50 ,  H01L2224/95085 ,  H01L2224/95122 ,  H01L2224/95136 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/14 ,  Y10T29/53535

摘要： The present invention provides an apparatus and a method for self chip redistribution. The apparatus of the present invention comprises a glass base on which a trench and a cavity formed by a layer of photo resistance. Chips are picked from a sawed wafer and placed on the glass base and moved by fluid flow to the front of index bar. The glass base and the index bar vibrate with low frequency to fill chips into chip cavities. The present invention further provides a method for self chip redistribution, comprising providing a self redistribution tool, transferring redistributed chips onto a panel forming tool, forming a chip panel and separating said chip panel from panel forming tool.

摘要翻译： 本发明提供一种用于自身芯片再分配的装置和方法。 本发明的装置包括一个玻璃基座，一个沟槽和一个由光电阻层形成的空腔。 芯片从锯切的晶片上取下并放置在玻璃基底上，并通过流体流动将其移动到索引杆的前部。 玻璃基座和索引杆以低频振动，将芯片填充到芯片空腔中。 本发明还提供了一种用于自芯片再分配的方法，包括提供自重新分配工具，将重新分配的芯片转移到面板成形工具上，形成芯片面板并将所述芯片面板与面板成形工具分离。

公开(公告)号：US20080217761A1

公开(公告)日：2008-09-11

申请号：US11715358

申请日：2007-03-08

申请人： Wen-Kun Yang ,  Chih-Ming Chen ,  Hsien-Wen Hsu

发明人： Wen-Kun Yang ,  Chih-Ming Chen ,  Hsien-Wen Hsu

IPC分类号： H01L23/053

CPC分类号： H01L25/50 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01059 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： The present invention provides a semiconductor device package comprising a substrate with at lease a pre-formed die receiving cavity formed and terminal contact metal pads formed within an upper surface of the substrate. At lease a first die is disposed within the die receiving cavity. A first dielectric layer is formed on the first die and the substrate and refilled into a gap between the first die and the substrate to absorb thermal mechanical stress there between. A first re-distribution layer (RDL) is formed on the first dielectric layer and coupled to the first die. A second dielectric layer is formed on the first RDL, and then a second die is disposed on the second dielectric layer and surrounded by core pastes having through holes thereon. A second re-distribution layer (RDL) is formed on the core pastes to fill the through holes, and then a third dielectric layer formed on the second RDL.

摘要翻译： 本发明提供一种半导体器件封装，其包括至少形成有预形成的裸片接收腔的衬底和形成在衬底的上表面内的端接触金属衬垫。 至少第一模头设置在模具接纳腔内。 第一电介质层形成在第一裸片和衬底上，并重新填充到第一裸片与衬底之间的间隙中以吸收其间的热机械应力。 第一再分配层（RDL）形成在第一电介质层上并且耦合到第一裸片。 在第一RDL上形成第二电介质层，然后在第二电介质层上设置第二芯片，并且在其上具有通孔的核心浆料包围。 在核心浆料上形成第二再分布层（RDL）以填充通孔，然后形成在第二RDL上的第三介电层。

公开(公告)号：US20080230884A1

公开(公告)日：2008-09-25

申请号：US11725827

申请日：2007-03-19

申请人： Wen-Kun Yang ,  Diann-Fang Lin ,  Tung-Chuan Wang ,  Hsien-Wen Hsu ,  Chih-Ming Chen

发明人： Wen-Kun Yang ,  Diann-Fang Lin ,  Tung-Chuan Wang ,  Hsien-Wen Hsu ,  Chih-Ming Chen

IPC分类号： H01L23/02 ,  H01L23/48 ,  H01L23/04 ,  H01L23/52

CPC分类号： H01L23/3128 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a semiconductor device package having multi-chips with side-by-side configuration comprising a substrate with die receiving through holes, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. A first die having first bonding pads and a second die having second bonding pads are respectively disposed within the die receiving through holes. The first adhesion material is formed under the first and second die and the substrate, and the second adhesion material is filled in the gap between the first and second die and sidewall of the die receiving though holes of the substrate. Further, bonding wires are formed to couple between the first bonding pads and the first contact pads, between the second bonding pads and the first contact pads. A dielectric layer is formed on the bonding wires, the first and second die and the substrate. A build up layer is form on the lower surface of substrate and the back side of first and second die.

摘要翻译： 本发明提供一种具有并排配置的多芯片的半导体器件封装，包括：具有通孔的基板，其中，所述基板具有通孔，连接通孔结构和上表面上的第一接触焊盘;以及第二接触焊盘， 基质。 具有第一接合焊盘的第一管芯和具有第二接合焊盘的第二管芯分别设置在管芯接收通孔内。 第一粘合材料形成在第一模具和第二模具和基板之下，并且第二粘合材料填充在第一和第二模具之间的间隙中以及接收基板的贯穿孔的模具的侧壁。 此外，形成接合线以在第二接合焊盘和第一接触焊盘之间在第一接合焊盘和第一接触焊盘之间耦合。 在接合线，第一和第二管芯和基板上形成介电层。 在基板的下表面和第一和第二模具的背面上形成堆积层。

公开(公告)号：US07525185B2

公开(公告)日：2009-04-28

申请号：US11725827

申请日：2007-03-19

申请人： Wen-Kun Yang ,  Diann-Fang Lin ,  Tung-Chuan Wang ,  Hsien-Wen Hsu ,  Chih-Ming Chen

发明人： Wen-Kun Yang ,  Diann-Fang Lin ,  Tung-Chuan Wang ,  Hsien-Wen Hsu ,  Chih-Ming Chen

IPC分类号： H01L23/02

CPC分类号： H01L23/3128 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a semiconductor device package having multi-chips with side-by-side configuration comprising a substrate with die receiving through holes, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. A first die having first bonding pads and a second die having second bonding pads are respectively disposed within the die receiving through holes. The first adhesion material is formed under the first and second die and the substrate, and the second adhesion material is filled in the gap between the first and second die and sidewall of the die receiving though holes of the substrate. Further, bonding wires are formed to couple between the first bonding pads and the first contact pads, between the second bonding pads and the first contact pads. A dielectric layer is formed on the bonding wires, the first and second die and the substrate. A build up layer is form on the lower surface of substrate and the back side of first and second die.

摘要翻译： 本发明提供一种具有并排配置的多芯片的半导体器件封装，包括：具有通孔的基板，其中，所述基板具有通孔，连接通孔结构和上表面上的第一接触焊盘;以及第二接触焊盘， 基质。 具有第一接合焊盘的第一管芯和具有第二接合焊盘的第二管芯分别设置在管芯接收通孔内。 第一粘合材料形成在第一模具和第二模具和基板之下，并且第二粘合材料填充在第一和第二模具之间的间隙中以及接收基板的贯穿孔的模具的侧壁。 此外，形成接合线以在第二接合焊盘和第一接触焊盘之间在第一接合焊盘和第一接触焊盘之间耦合。 在接合线，第一和第二管芯和基板上形成介电层。 在基板的下表面和第一和第二模具的背面上形成堆积层。

公开(公告)号：US10905656B2

公开(公告)日：2021-02-02

申请号：US14390017

申请日：2013-03-26

申请人： GOLDEN BIOTECHNOLOGY CORPORATION ,  Sheng-Yung Liu ,  Wu-Che Wen ,  Chih-Ming Chen

发明人： Sheng-Yung Liu ,  Wu-Che Wen ,  Chih-Ming Chen

IPC分类号： A61K31/122 ,  A61P3/10 ,  A61K36/07 ,  A61K31/133 ,  A61P9/10 ,  C07C49/753 ,  A61K9/00 ,  A61K9/48

摘要： The present invention provides methods and compositions for treating arteriosclerotic vascular diseases by cyclohexenone compounds. In some embodiments, the compound in the methods inhibits PDGF-stimulated smooth muscle cell proliferation or migration. In some embodiments, the atherosclerosis is associated with coronary artery disease, aneurysm, arteriosclerosis, myocardial infarction, embolism, stroke, thrombosis, angina, vascular plaque inflammation, vascular plaque rupture, Kawasaki disease, calcification or inflammation. In some embodiments, the compound lowers low-density lipoprotein (LDL) cholesterol in the subject. In some embodiments, the compound maintains a normal low-density lipoprotein (LDL) cholesterol level in the subject.

公开(公告)号：US08878318B2

公开(公告)日：2014-11-04

申请号：US13244349

申请日：2011-09-24

申请人： Chih-Ming Chen ,  Ya-Chen Kao ,  Ming-Te Liu ,  Chung-Yi Yu ,  Cheng-Yuan Tsai ,  Chun-Jung Lin

发明人： Chih-Ming Chen ,  Ya-Chen Kao ,  Ming-Te Liu ,  Chung-Yi Yu ,  Cheng-Yuan Tsai ,  Chun-Jung Lin

IPC分类号： H01L43/08 ,  G11C11/15 ,  H01L43/12

CPC分类号： H01L43/12 ,  G11C11/15 ,  G11C11/161 ,  H01L43/08

摘要： MTJ stack structures for an MRAM device include an MTJ stack having a pinned ferromagnetic layer over a pinning layer, a tunneling barrier layer over the pinned ferromagnetic layer, a free ferromagnetic layer over the tunneling barrier layer, a conductive oxide layer over the free ferromagnetic layer, and an oxygen-based cap layer over the conductive oxide layer.

摘要翻译： 用于MRAM器件的MTJ堆叠结构包括在钉扎层上具有钉扎铁磁层的MTJ堆叠，在钉扎铁磁层上的隧道势垒层，在隧道势垒层上的自由铁磁层，在自由铁磁层上的导电氧化物层 ，以及导电氧化物层上的氧基覆盖层。

公开(公告)号：US20130194061A1

公开(公告)日：2013-08-01

申请号：US13614907

申请日：2012-09-13

申请人： Po-Yu Wei ,  Ming-Cheng Lee ,  Yi-Lin Chen ,  Cheng-En Liao ,  Chia-Ming Liu ,  Chih-Ming Chen ,  Wei-Chin Chen

发明人： Po-Yu Wei ,  Ming-Cheng Lee ,  Yi-Lin Chen ,  Cheng-En Liao ,  Chia-Ming Liu ,  Chih-Ming Chen ,  Wei-Chin Chen

IPC分类号： H01F27/29

CPC分类号： H01F17/043 ,  H01F27/292

摘要： A magnetic module includes a magnetic element and a base. The magnetic element includes a conductive assembly and a magnetic core assembly. The conductive assembly includes a plurality of terminals. The magnetic core assembly is partially embedded within the conductive assembly. The base includes a base body and a plurality of conductive structures. The base body has a first surface, wherein the magnetic element is disposed on the first surface. The conductive structures are disposed on the base body and engaged with the plurality of terminals, so that the plurality of terminals are fixed by and electrically connected with the plurality of conductive structures, respectively.

摘要翻译： 磁性模块包括磁性元件和基座。 磁性元件包括导电组件和磁芯组件。 导电组件包括多个端子。 磁芯组件部分嵌入导电组件内。 底座包括基体和多个导电结构。 基体具有第一表面，其中磁性元件设置在第一表面上。 导电结构设置在基体上并与多个端子接合，使得多个端子分别固定并与多个导电结构电连接。

公开(公告)号：US20130105107A1

公开(公告)日：2013-05-02

申请号：US13479735

申请日：2012-05-24

申请人： Chao-Jung Chen ,  Chien-Pang Chen ,  Kai-Hung Lin ,  Chih-Ming Chen ,  Wen-Liang Huang

发明人： Chao-Jung Chen ,  Chien-Pang Chen ,  Kai-Hung Lin ,  Chih-Ming Chen ,  Wen-Liang Huang

IPC分类号： F28F27/02 ,  F28F27/00

CPC分类号： F24F11/00 ,  F24F12/00 ,  F24F2011/0006 ,  H05K7/20745 ,  H05K7/20836

摘要： An energy saving air conditioning system is disclosed which provides different air conditioning modes, including a closed-loop mode, an open-loop mode, and a partial-loop mode, for controlling the environment in a high-density apparatus room. The energy saving air conditioning system uses a cloud operating center to monitor the temperature and the moisture inside and outside the high-density apparatus room. The cloud operating system dynamically selects the air conditioning mode in such a manner that energy can be saved and the environment in the high-density apparatus room can be optimally to managed.

摘要翻译： 公开了一种节能空调系统，其提供了用于控制高密度装置室中的环境的不同的空调模式，包括闭环模式，开环模式和部分环路模式。 节能空调系统采用云运行中心监控高密度机房内外的温度和湿度。 云操作系统动态地选择空调模式，使得能够节省能量并且可以最佳地管理高密度设备室中的环境。

公开(公告)号：US20130075838A1

公开(公告)日：2013-03-28

申请号：US13244346

申请日：2011-09-24

申请人： Chih-Ming Chen ,  Chung-Yi Yu ,  Cheng-Yuan Tsai ,  Kai-Wen Cheng

发明人： Chih-Ming Chen ,  Chung-Yi Yu ,  Cheng-Yuan Tsai ,  Kai-Wen Cheng

IPC分类号： H01L29/82 ,  H01L21/8246

CPC分类号： H01L43/08 ,  B82Y10/00 ,  B82Y25/00 ,  G11C11/16 ,  H01L27/228 ,  H01L43/12

摘要： The present disclosure provides a magnetoresistive random access memory (MRAM) device. The MRAM device includes a magnetic tunnel junction (MTJ) stack on a substrate; and a dual-layer passivation layer disposed around the MTJ stack. The dual-layer passivation layer includes an oxygen-free film formed adjacent sidewalls of the MTJ stack; and a moisture-blocking film formed around the oxygen-free film.

摘要翻译： 本公开提供了一种磁阻随机存取存储器（MRAM）装置。 MRAM器件包括在衬底上的磁隧道结（MTJ）堆叠; 以及设置在MTJ堆叠周围的双层钝化层。 双层钝化层包括与MTJ叠层的侧壁相邻形成的无氧膜; 以及形成在无氧膜周围的防潮膜。