公开(公告)号：US20080229574A1

公开(公告)日：2008-09-25

申请号：US11725826

申请日：2007-03-19

申请人： Wen-Kun Yang ,  Hsien-Wen Hsu ,  Chih-Wei Lin ,  Ming-Chung Cheng ,  Chih-Ming Chen ,  Chun-Hiu Yu

发明人： Wen-Kun Yang ,  Hsien-Wen Hsu ,  Chih-Wei Lin ,  Ming-Chung Cheng ,  Chih-Ming Chen ,  Chun-Hiu Yu

IPC分类号： B23P19/033

CPC分类号： H01L21/67144 ,  H01L24/95 ,  H01L25/50 ,  H01L2224/95085 ,  H01L2224/95122 ,  H01L2224/95136 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/14 ,  Y10T29/53535

摘要： The present invention provides an apparatus and a method for self chip redistribution. The apparatus of the present invention comprises a glass base on which a trench and a cavity formed by a layer of photo resistance. Chips are picked from a sawed wafer and placed on the glass base and moved by fluid flow to the front of index bar. The glass base and the index bar vibrate with low frequency to fill chips into chip cavities. The present invention further provides a method for self chip redistribution, comprising providing a self redistribution tool, transferring redistributed chips onto a panel forming tool, forming a chip panel and separating said chip panel from panel forming tool.

摘要翻译： 本发明提供一种用于自身芯片再分配的装置和方法。 本发明的装置包括一个玻璃基座，一个沟槽和一个由光电阻层形成的空腔。 芯片从锯切的晶片上取下并放置在玻璃基底上，并通过流体流动将其移动到索引杆的前部。 玻璃基座和索引杆以低频振动，将芯片填充到芯片空腔中。 本发明还提供了一种用于自芯片再分配的方法，包括提供自重新分配工具，将重新分配的芯片转移到面板成形工具上，形成芯片面板并将所述芯片面板与面板成形工具分离。

公开(公告)号：US20080265462A1

公开(公告)日：2008-10-30

申请号：US11739218

申请日：2007-04-24

申请人： Wen-Kun Yang ,  Hsien-Wen Hsu ,  Ming-Chung Cheng

发明人： Wen-Kun Yang ,  Hsien-Wen Hsu ,  Ming-Chung Cheng

IPC分类号： H01L21/56

CPC分类号： H01L21/565 ,  H01L21/561 ,  H01L21/568 ,  H01L24/96 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00

摘要： The present invention provides an apparatus and a method for panel/wafer molding. The present invention discloses a base with a first separation layer, an upper molding base with a second separation layer, a cheap molding layer and a vacuum panel bonding machine for bonding, a curing unit, a cleaning unit and a separating unit; wherein upper molding base is rectangular or round. Therefore the present invention providing a simple, cheap universal panel/wafer molding apparatus for a round or rectangular type panel, and does no harm to the chip active surface.

摘要翻译： 本发明提供一种用于面板/晶片成型的装置和方法。 本发明公开了一种具有第一分离层的基底，具有第二分离层的上部模制基底，廉价的模制层和用于粘合的真空面板粘合机，固化单元，清洁单元和分离单元; 其中上成型基座为矩形或圆形。 因此，本发明提供了一种用于圆形或矩形型面板的简单，便宜的通用面板/晶片模制装置，并且对芯片活性表面没有任何损害。

公开(公告)号：US07525185B2

公开(公告)日：2009-04-28

申请号：US11725827

申请日：2007-03-19

申请人： Wen-Kun Yang ,  Diann-Fang Lin ,  Tung-Chuan Wang ,  Hsien-Wen Hsu ,  Chih-Ming Chen

发明人： Wen-Kun Yang ,  Diann-Fang Lin ,  Tung-Chuan Wang ,  Hsien-Wen Hsu ,  Chih-Ming Chen

IPC分类号： H01L23/02

CPC分类号： H01L23/3128 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a semiconductor device package having multi-chips with side-by-side configuration comprising a substrate with die receiving through holes, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. A first die having first bonding pads and a second die having second bonding pads are respectively disposed within the die receiving through holes. The first adhesion material is formed under the first and second die and the substrate, and the second adhesion material is filled in the gap between the first and second die and sidewall of the die receiving though holes of the substrate. Further, bonding wires are formed to couple between the first bonding pads and the first contact pads, between the second bonding pads and the first contact pads. A dielectric layer is formed on the bonding wires, the first and second die and the substrate. A build up layer is form on the lower surface of substrate and the back side of first and second die.

摘要翻译： 本发明提供一种具有并排配置的多芯片的半导体器件封装，包括：具有通孔的基板，其中，所述基板具有通孔，连接通孔结构和上表面上的第一接触焊盘;以及第二接触焊盘， 基质。 具有第一接合焊盘的第一管芯和具有第二接合焊盘的第二管芯分别设置在管芯接收通孔内。 第一粘合材料形成在第一模具和第二模具和基板之下，并且第二粘合材料填充在第一和第二模具之间的间隙中以及接收基板的贯穿孔的模具的侧壁。 此外，形成接合线以在第二接合焊盘和第一接触焊盘之间在第一接合焊盘和第一接触焊盘之间耦合。 在接合线，第一和第二管芯和基板上形成介电层。 在基板的下表面和第一和第二模具的背面上形成堆积层。

公开(公告)号：US20080230884A1

公开(公告)日：2008-09-25

申请号：US11725827

申请日：2007-03-19

申请人： Wen-Kun Yang ,  Diann-Fang Lin ,  Tung-Chuan Wang ,  Hsien-Wen Hsu ,  Chih-Ming Chen

发明人： Wen-Kun Yang ,  Diann-Fang Lin ,  Tung-Chuan Wang ,  Hsien-Wen Hsu ,  Chih-Ming Chen

IPC分类号： H01L23/02 ,  H01L23/48 ,  H01L23/04 ,  H01L23/52

CPC分类号： H01L23/3128 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a semiconductor device package having multi-chips with side-by-side configuration comprising a substrate with die receiving through holes, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. A first die having first bonding pads and a second die having second bonding pads are respectively disposed within the die receiving through holes. The first adhesion material is formed under the first and second die and the substrate, and the second adhesion material is filled in the gap between the first and second die and sidewall of the die receiving though holes of the substrate. Further, bonding wires are formed to couple between the first bonding pads and the first contact pads, between the second bonding pads and the first contact pads. A dielectric layer is formed on the bonding wires, the first and second die and the substrate. A build up layer is form on the lower surface of substrate and the back side of first and second die.

摘要翻译： 本发明提供一种具有并排配置的多芯片的半导体器件封装，包括：具有通孔的基板，其中，所述基板具有通孔，连接通孔结构和上表面上的第一接触焊盘;以及第二接触焊盘， 基质。 具有第一接合焊盘的第一管芯和具有第二接合焊盘的第二管芯分别设置在管芯接收通孔内。 第一粘合材料形成在第一模具和第二模具和基板之下，并且第二粘合材料填充在第一和第二模具之间的间隙中以及接收基板的贯穿孔的模具的侧壁。 此外，形成接合线以在第二接合焊盘和第一接触焊盘之间在第一接合焊盘和第一接触焊盘之间耦合。 在接合线，第一和第二管芯和基板上形成介电层。 在基板的下表面和第一和第二模具的背面上形成堆积层。

公开(公告)号：US20080073774A1

公开(公告)日：2008-03-27

申请号：US11566242

申请日：2006-12-04

申请人： Wen-Kun Yang ,  Dyi-Chung Hu ,  Chih-Ming Chen ,  Hsien-Wen Hsu

发明人： Wen-Kun Yang ,  Dyi-Chung Hu ,  Chih-Ming Chen ,  Hsien-Wen Hsu

IPC分类号： H01L23/04

CPC分类号： H01L23/5389 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/19 ,  H01L24/82 ,  H01L24/97 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05026 ,  H01L2224/12105 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01094 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： A chip package including a multilayer substrate, an adhesive core layer and a chip is provided. The multilayer substrate has a plurality of material layers. The adhesive core layer is disposed on the multilayer substrate. The chip is disposed in the adhesive core layer. The chip has an active surface exposed outside the adhesive core layer. The chip includes a plurality of bonding pads disposed on the active surface and a plurality of metal conductive bodies electrically connected to the bonding pads respectively.

摘要翻译： 提供了包括多层基板，粘合芯层和芯片的芯片封装。 多层基板具有多个材料层。 粘合芯层设置在多层基板上。 芯片设置在粘合芯层中。 该芯片具有暴露在粘合芯层外的活性表面。 芯片包括设置在有源表面上的多个接合焊盘和分别与焊盘电连接的多个金属导电体。

公开(公告)号：US20080217761A1

公开(公告)日：2008-09-11

申请号：US11715358

申请日：2007-03-08

申请人： Wen-Kun Yang ,  Chih-Ming Chen ,  Hsien-Wen Hsu

发明人： Wen-Kun Yang ,  Chih-Ming Chen ,  Hsien-Wen Hsu

IPC分类号： H01L23/053

CPC分类号： H01L25/50 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/24137 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01059 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： The present invention provides a semiconductor device package comprising a substrate with at lease a pre-formed die receiving cavity formed and terminal contact metal pads formed within an upper surface of the substrate. At lease a first die is disposed within the die receiving cavity. A first dielectric layer is formed on the first die and the substrate and refilled into a gap between the first die and the substrate to absorb thermal mechanical stress there between. A first re-distribution layer (RDL) is formed on the first dielectric layer and coupled to the first die. A second dielectric layer is formed on the first RDL, and then a second die is disposed on the second dielectric layer and surrounded by core pastes having through holes thereon. A second re-distribution layer (RDL) is formed on the core pastes to fill the through holes, and then a third dielectric layer formed on the second RDL.

摘要翻译： 本发明提供一种半导体器件封装，其包括至少形成有预形成的裸片接收腔的衬底和形成在衬底的上表面内的端接触金属衬垫。 至少第一模头设置在模具接纳腔内。 第一电介质层形成在第一裸片和衬底上，并重新填充到第一裸片与衬底之间的间隙中以吸收其间的热机械应力。 第一再分配层（RDL）形成在第一电介质层上并且耦合到第一裸片。 在第一RDL上形成第二电介质层，然后在第二电介质层上设置第二芯片，并且在其上具有通孔的核心浆料包围。 在核心浆料上形成第二再分布层（RDL）以填充通孔，然后形成在第二RDL上的第三介电层。

公开(公告)号：US20090039497A1

公开(公告)日：2009-02-12

申请号：US11933758

申请日：2007-11-01

申请人： Wen-Kun Yang ,  Hsien-Wen Hsu

发明人： Wen-Kun Yang ,  Hsien-Wen Hsu

IPC分类号： H01L23/48 ,  H01L21/00

CPC分类号： H01L23/3114 ,  H01L23/3157 ,  H01L23/562 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/01087

摘要： The present invention provides a semiconductor device package, comprising a die having a back surface and an active surface formed thereon; an adhesive layer formed on the back surface of the die; a protection substrate formed on the adhesive layer; and a plurality of bumps formed on the active surface of the die for electrically connection. The present invention further provides a method for forming a semiconductor device package, comprising providing a plurality of die having a back surface and an active surface on a wafer; forming an adhesive layer on the back surface of the die; forming a protection substrates on the adhesive layer; forming a plurality of bumps on the active surface of each die; and dicing the plurality of die into individual die for singulation.

公开(公告)号：US20080029877A1

公开(公告)日：2008-02-07

申请号：US11869154

申请日：2007-10-09

申请人： Wen-Kun Yang ,  Chun Hui Yu ,  Jui-Hsien Chang ,  Hsien-Wen Hsu

发明人： Wen-Kun Yang ,  Chun Hui Yu ,  Jui-Hsien Chang ,  Hsien-Wen Hsu

IPC分类号： H01L23/48

CPC分类号： H01L23/562 ,  H01L21/78 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01094 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2924/00

摘要： The present invention provides a semiconductor device package singulation method. The method comprises printing a photo epoxy layer on the back surface of a substrate of a wafer for marking the scribe lines to be diced. Then etching is performed through the substrate along the marks in the photo epoxy layer. Dicing the panel into individual package with a typical art designing knife, the step not only avoids the roughness on the edge of each die, but also decrease the cost of singulation process.

摘要翻译： 本发明提供一种半导体器件封装分割方法。 该方法包括在晶片的基板的背面上印刷光环氧树脂层，以标记要切割的划线。 然后沿着光环氧树脂层中的标记通过基板进行蚀刻。 通过典型的美术设计刀将面板切割成单独的包装，该步骤不仅避免了每个模具边缘的粗糙度，而且降低了切割过程的成本。

公开(公告)号：US20080173792A1

公开(公告)日：2008-07-24

申请号：US11656410

申请日：2007-01-23

申请人： Wen-Kun Yang ,  Jui-Hsien Chang ,  Tung-chuan Wang ,  Chihwei Lin ,  Hsien-Wen Hsu

发明人： Wen-Kun Yang ,  Jui-Hsien Chang ,  Tung-chuan Wang ,  Chihwei Lin ,  Hsien-Wen Hsu

IPC分类号： H01L27/00

CPC分类号： H01L27/14618 ,  H01L24/24 ,  H01L24/82 ,  H01L27/14625 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1469 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24195 ,  H01L2224/73267 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/19105 ,  H04N5/2253 ,  H04N5/2257 ,  H01L2924/00

摘要： The present invention provides an image sensor module structure comprising a substrate with a die receiving cavity formed within an upper surface of the substrate and conductive traces within the substrate and a die having a micro lens disposed within the die receiving cavity. A dielectric layer is formed on the die and the substrate, a re-distribution conductive layer (RDL) is formed on the dielectric layer, wherein the RDL is coupled to the die and the conductive traces and the dielectric layer has an opening to expose the micro lens. A lens holder is attached on the substrate and the lens holder has a lens attached an upper portion of the lens holder. A filter is attached between the lens and the micro lens. The structure further comprises a passive device on the upper surface of the substrate within the lens holder.

摘要翻译： 本发明提供了一种图像传感器模块结构，其包括具有形成在基板的上表面内的模具接收空腔的基板和基板内的导电迹线以及具有设置在模具接收腔内的微透镜的模具。 在管芯和衬底上形成电介质层，在电介质层上形成再分配导电层（RDL），其中RDL耦合到管芯，并且导电迹线和电介质层具有露出 微透镜。 透镜保持器附接在基板上，并且透镜保持器具有安装在透镜保持器的上部的透镜。 滤光片安装在透镜和微透镜之间。 该结构还包括在透镜保持器内的衬底的上表面上的无源器件。

公开(公告)号：US20070072338A1

公开(公告)日：2007-03-29

申请号：US11235484

申请日：2005-09-26

申请人： Wen-Kun Yang ,  Chun Yu ,  Jui-Hsien Chang ,  Hsien-Wen Hsu

发明人： Wen-Kun Yang ,  Chun Yu ,  Jui-Hsien Chang ,  Hsien-Wen Hsu

IPC分类号： H01L21/00 ,  H01L23/02

CPC分类号： H01L23/562 ,  H01L21/78 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01094 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2924/00

摘要： The present invention provides a semiconductor device package singulation method. The method comprises printing a photo epoxy layer on the back surface of a substrate of a wafer for marking the scribe lines to be diced. Then etching is performed through the substrate along the marks in the photo epoxy layer. Dicing the panel into individual package with a typical art designing knife, the step not only avoids the roughness on the edge of each die, but also decrease the cost of singulation process.

摘要翻译： 本发明提供一种半导体器件封装分割方法。 该方法包括在晶片的基板的背面上印刷光环氧树脂层，以标记要切割的划线。 然后沿着光环氧树脂层中的标记通过基板进行蚀刻。 通过典型的美术设计刀将面板切割成单独的包装，该步骤不仅避免了每个模具边缘的粗糙度，而且降低了切割过程的成本。