摘要:
An interconnect structure having reduced fringing fields of bottom corners of said interconnect structure and a method of fabricating the same is provided. The interconnect structure includes one or more interconnect levels one on top of each other, wherein each interconnect level is separated by a diffusion barrier and includes a dielectric stack of at least one low-k interlayer dielectric on at least one hybrid dielectric, said dielectrics having planar interfaces therebetween, each interconnect level further comprising metallic lines formed in said low-k interlayer dielectric, with the proviso that bottom horizontal portions of said metallic lines are not coincident with said interface, and said metallic lines are contained within said low-k interlayer dielectric. The interconnect structures may be fabricated such that top horizontal portions of the metallic lines are coplanar with a top surface of the low-k interlayer dielectric.
摘要:
Method for reducing resist poisoning. The method includes the steps of forming a first structure in a dielectric on a substrate, reducing amine related contaminants from the dielectric and the substrate prior to a formation of a second structure on the substrate such that the amine related contaminates will not diffuse out from either the substrate or the dielectric, wherein the reducing utilizes a plasma treatment which one of chemically ties up the amine related contaminates and binds, traps, or consumes the amine related contaminates during subsequent processing steps, forming the second structure on the substrate, and after the forming of the first structure, preventing poisoning of a resist layer in subsequent processing by the reducing.
摘要:
Monitoring a process sector in a production facility includes establishing a tool defect index associated with a process sector in the production facility. The tool defect index includes a signal representing a defect factor associated with a tool in the process sector. Monitoring the process also requires determining whether the defect factor is a known defect factor or an unknown defect factor, and analyzing a unit from the tool if the defect factor is an unknown defect factor. Monitoring the process further requires identifying at least one defect on the unit from the tool, establishing that the at least one defect is a significant defect, determining cause of the significant defect, and creating an alert indicating that the tool associated with the process sector is producing units having significant defects.
摘要:
A probe assembly for a process vessel for viewing the inside of the vessel, the probe assembly includes an elongated bracket, an elongated frame, an ICPC unit, and a camera unit. The elongated bracket has a front face and a rear face, the elongated bracket having an upper portion and a lower portion, the lower portion has a first aperture. The elongated frame has a proximal end and a distal end, the distal end of the elongated frame is coupled to the upper portion of the front face of the bracket. The ICPC unit includes a housing that has a front wall, a rear wall, and side wall extended between the front wall and the rear wall, the front wall has a second aperture, the rear wall has a third aperture. The ICPC unit further includes an actuator enclosed in the housing and an elongated tube operably coupled to the actuator, the tube extends through the second aperture and the first aperture away from the rear face of the bracket, the actuator configured to reciprocate the tube between an extended position and a retracted position. The camera unit includes a camera enclosure housing a camera, wherein the actuation member is configured to reciprocate the camera unit between the engage mode and stand-by mode, in the engage mode, the lens' hood is within the tube of the ICPC unit, and in the stand-by mode, the camera unit is away from the ICPC unit towards the proximal end of the elongated frame.
摘要:
Structures with improved solder bump connections and methods of fabricating such structures are provided herein. The structure includes a trench formed in a dielectric layer which has at least a portion thereof devoid of a fluorine boundary layer. The structure further includes a copper wire in the trench having at least a bottom portion thereof in contact with the non-fluoride boundary layer of the trench. A lead free solder bump is in electrical contact with the copper wire.
摘要:
A system and method for a speech recognition technology that allows language models for a particular language to be customized through the addition of alternate pronunciations that are specific to the accent of the dictator, for a subset of the words in the language model. The system includes the steps of identifying the pronunciation differences that are best handled by modifying the pronunciations of the language model, identifying target words in the language model for pronunciation modification, and creating a accented speech file used to modify the language model.
摘要:
Monitoring a process sector in a production facility includes establishing a tool defect index associated with a process sector in the production facility. The tool defect index includes a signal representing a defect factor associated with a tool in the process sector. Monitoring the process also requires determining whether the defect factor is a known defect factor or an unknown defect factor, and analyzing a unit from the tool if the defect factor is an unknown defect factor. Monitoring the process further requires identifying at least one defect on the unit from the tool, establishing that the at least one defect is a significant defect, determining cause of the significant defect, and creating an alert indicating that the tool associated with the process sector is producing units having significant defects.
摘要:
Structures and a method are disclosed for grounding gate-stack and/or silicon active region front-end-of-line structures on a silicon-on-insulator (SOI) substrate, which may be used as test structures for VC inspection. In one embodiment, a structure includes a grounded bulk silicon substrate having the SOI substrate thereover, the SOI substrate including a silicon-on-insulator (SOI) layer and a buried oxide (BOX) layer; the silicon active region having at least one finger element within the SOI layer, the at least one finger element isolated by a shallow trench isolation (STI) layer; and a polysilicon ground intersecting the at least one finger element and extending through the STI layer and the BOX layer to the grounded bulk silicon substrate, the polysilicon ground contacting the silicon active region and the grounded bulk silicon substrate.
摘要:
A decoupling capacitor is provided for a semiconductor device and may include a first low dielectric insulator layer and a low resistance conductor formed into at least two interdigitized patterns on the surface of the first low dielectric insulator in a single interconnect plane. A high dielectric constant material may be provided between the two patterns. A circuit for testing a plurality of these capacitors is also provided which includes a charge monitoring circuit, a coupling circuit and a control circuit.
摘要:
Method for reducing resist poisoning. The method includes the steps of forming a first structure in a dielectric on a substrate, reducing amine related contaminants from the dielectric and the substrate prior to a formation of a second structure on the substrate such that the amine related contaminates will not diffuse out from either the substrate or the dielectric, wherein the reducing utilizes a plasma treatment which one of chemically ties up the amine related contaminates and binds, traps, or consumes the amine related contaminates during subsequent processing steps, forming the second structure on the substrate, and after the forming of the first structure, preventing poisoning of a resist layer in subsequent processing by the reducing.