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公开(公告)号:US20060290689A1
公开(公告)日:2006-12-28
申请号:US11474714
申请日:2006-06-26
申请人: William Grant , Heny Lin , Jack Marcinkowski , Velimir Nedic
发明人: William Grant , Heny Lin , Jack Marcinkowski , Velimir Nedic
CPC分类号: H02M7/003 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/072 , H01L2224/0603 , H01L2224/45015 , H01L2224/45124 , H01L2224/48137 , H01L2224/48139 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/49113 , H01L2924/01005 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01076 , H01L2924/01082 , H01L2924/01083 , H01L2924/014 , H01L2924/13055 , H01L2924/13091 , H01L2924/19041 , H01L2924/19107 , H01L2924/20751 , H01L2924/30107 , H01L2924/3011 , H01L2924/00014
摘要: A power module that includes embedded power bus bars and output bus arranged to lower the parasitic inductance.
摘要翻译: 一个电源模块,包括嵌入式电源母线和输出总线,用于降低寄生电感。
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公开(公告)号:US20070257343A1
公开(公告)日:2007-11-08
申请号:US11743737
申请日:2007-05-03
IPC分类号: H01L23/495 , H01L23/24 , H01L23/48 , H01L23/52
CPC分类号: H01L23/49861 , H01L23/049 , H01L23/4951 , H01L24/48 , H01L25/072 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2924/00014 , H01L2924/01068 , H01L2924/01077 , H01L2924/10253 , H01L2924/13055 , H01L2924/13091 , H01L2924/15747 , H01L2924/3025 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A high voltage semiconductor module has a leadframe with spaced pads which is connected to a heat sink plate by a curable insulation layer on the top of the plate. Semiconductor die may be soldered to the leadframe pads before or after assembly to the plate. The insulation layer may be a curable epoxy or a B stage IMS plate.
摘要翻译: 高压半导体模块具有带有间隔垫的引线框架,该引线框架通过板顶部的可固化绝缘层连接到散热板。 半导体管芯可以在组装到板之前或之后焊接到引线框焊盘。 绝缘层可以是可固化环氧树脂或B阶段IMS板。
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公开(公告)号:US20120223322A1
公开(公告)日:2012-09-06
申请号:US13053646
申请日:2011-03-22
申请人: Heny Lin , Jason Zhang , Alberto Guerra
发明人: Heny Lin , Jason Zhang , Alberto Guerra
IPC分类号: H01L29/20
CPC分类号: H01L27/0727 , H01L23/49562 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/065 , H01L25/18 , H01L27/0605 , H01L29/2003 , H01L29/778 , H01L2224/2919 , H01L2224/32245 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48147 , H01L2224/48247 , H01L2224/48257 , H01L2224/49111 , H01L2224/73265 , H01L2924/01013 , H01L2924/01014 , H01L2924/10253 , H01L2924/10323 , H01L2924/1033 , H01L2924/10334 , H01L2924/10344 , H01L2924/10346 , H01L2924/12032 , H01L2924/12036 , H01L2924/12041 , H01L2924/1306 , H01L2924/19104 , H01L2924/30107 , H01L2924/00 , H01L2924/00014
摘要: One exemplary disclosed embodiment comprises a two-terminal stacked-die package including a diode, such as a silicon diode, stacked atop a III-nitride transistor, such that a cathode of the diode resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a drain of the III-nitride transistor, and a second terminal of the package is coupled to an anode of the diode. In this manner, devices such as cascoded rectifiers may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.
摘要翻译: 一个示例性的公开的实施例包括二端子堆叠管芯封装,其包括二极管,例如硅二极管,堆叠在III族氮化物晶体管的顶部,使得二极管的阴极位于III的源极上并与其电耦合 氮化晶体管。 封装的第一端子耦合到III族氮化物晶体管的漏极,并且封装的第二端子耦合到二极管的阳极。 以这种方式,诸如级联整流器的器件可以以堆叠的管芯形式封装,与常规封装相比,导致减小的寄生电感和电阻,改善的散热,更小的外形尺寸以及更低的制造成本。
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公开(公告)号:US07149088B2
公开(公告)日:2006-12-12
申请号:US10871246
申请日:2004-06-18
申请人: Heny Lin , Bertrand Vaysse , Fabio Necco
发明人: Heny Lin , Bertrand Vaysse , Fabio Necco
IPC分类号: H05K7/20
CPC分类号: H05K7/209 , H01L2224/45124 , H01L2224/48091 , H01L2224/49111 , H01L2224/73265 , H01L2924/13091 , H01L2924/00014 , H01L2924/00
摘要: A power module which includes heatsinks made of AlSiC and power semiconductor devices directly mounted thereon.
摘要翻译: 一种功率模块,其包括由AlSiC制成的散热器和直接安装在其上的功率半导体器件。
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公开(公告)号:US08963338B2
公开(公告)日:2015-02-24
申请号:US13053646
申请日:2011-03-22
申请人: Heny Lin , Jason Zhang , Alberto Guerra
发明人: Heny Lin , Jason Zhang , Alberto Guerra
IPC分类号: H01L23/48 , H01L23/495 , H01L23/58 , H01L25/18 , H01L23/00 , H01L29/778 , H01L29/20
CPC分类号: H01L27/0727 , H01L23/49562 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/065 , H01L25/18 , H01L27/0605 , H01L29/2003 , H01L29/778 , H01L2224/2919 , H01L2224/32245 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48147 , H01L2224/48247 , H01L2224/48257 , H01L2224/49111 , H01L2224/73265 , H01L2924/01013 , H01L2924/01014 , H01L2924/10253 , H01L2924/10323 , H01L2924/1033 , H01L2924/10334 , H01L2924/10344 , H01L2924/10346 , H01L2924/12032 , H01L2924/12036 , H01L2924/12041 , H01L2924/1306 , H01L2924/19104 , H01L2924/30107 , H01L2924/00 , H01L2924/00014
摘要: One exemplary disclosed embodiment comprises a two-terminal stacked-die package including a diode, such as a silicon diode, stacked atop a III-nitride transistor, such that a cathode of the diode resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a drain of the III-nitride transistor, and a second terminal of the package is coupled to an anode of the diode. In this manner, devices such as cascoded rectifiers may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.
摘要翻译: 一个示例性的公开的实施例包括二端子堆叠管芯封装,其包括二极管,例如硅二极管,堆叠在III族氮化物晶体管的顶部,使得二极管的阴极位于III的源极上并与其电耦合 氮化晶体管。 封装的第一端子耦合到III族氮化物晶体管的漏极,并且封装的第二端子耦合到二极管的阳极。 以这种方式,诸如级联整流器的器件可以以堆叠的管芯形式封装,与常规封装相比,导致减小的寄生电感和电阻,改善的散热,更小的外形尺寸以及更低的制造成本。
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公开(公告)号:US20120223321A1
公开(公告)日:2012-09-06
申请号:US13053556
申请日:2011-03-22
申请人: Heny Lin , Jason Zhang , Alberto Guerra
发明人: Heny Lin , Jason Zhang , Alberto Guerra
IPC分类号: H01L29/12
CPC分类号: H01L25/074 , H01L23/49562 , H01L23/49575 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/69 , H01L24/72 , H01L24/73 , H01L29/16 , H01L29/2003 , H01L29/772 , H01L29/778 , H01L2224/0603 , H01L2224/2919 , H01L2224/32145 , H01L2224/32245 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48145 , H01L2224/48247 , H01L2224/49111 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06568 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/10253 , H01L2924/10323 , H01L2924/1033 , H01L2924/10334 , H01L2924/10344 , H01L2924/10346 , H01L2924/1306 , H01L2924/15787 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/85399 , H01L2224/05599
摘要: One exemplary disclosed embodiment comprises a three-terminal stacked-die package including a field effect transistor (FET), such as a silicon FET, stacked atop a III-nitride transistor, such that a drain of the FET resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a gate of the FET, a second terminal of the package is coupled to a drain of the III-nitride transistor. A third terminal of the package is coupled to a source of the FET. In this manner, devices such as cascoded switches may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.
摘要翻译: 一个示例性的公开的实施例包括三端堆叠管芯封装,其包括堆叠在III族氮化物晶体管顶部的场效应晶体管(FET),例如硅FET,使得FET的漏极驻留在电耦合到 III族氮化物晶体管的源极。 封装的第一端子耦合到FET的栅极,封装的第二端子耦合到III族氮化物晶体管的漏极。 封装的第三端子耦合到FET的源极。 以这种方式,诸如级联开关的器件可以以堆叠的管芯形式被封装,从而与常规封装相比,减小了寄生电感和电阻,改善的散热,更小的外形尺寸和更低的制造成本。
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公开(公告)号:US07042730B2
公开(公告)日:2006-05-09
申请号:US10631879
申请日:2003-07-31
申请人: Bertrand Vaysse , Heny Lin , Thanh Van Tran , Ajit Dubhashi
发明人: Bertrand Vaysse , Heny Lin , Thanh Van Tran , Ajit Dubhashi
IPC分类号: H05K7/20
CPC分类号: H01L24/49 , H01L24/48 , H01L25/072 , H01L2224/0603 , H01L2224/48091 , H01L2224/48227 , H01L2224/49111 , H01L2224/49113 , H01L2224/49175 , H01L2224/73265 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01029 , H01L2924/014 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/351 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要: A power module including a power circuit having heat generating power devices including one or more heatsinks not isolated from the power devices by an insulating body.
摘要翻译: 一种功率模块,包括具有发热功率器件的电源电路,所述发电功率器件包括通过绝缘体不与所述功率器件隔离的一个或多个散热器。
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公开(公告)号:US08847408B2
公开(公告)日:2014-09-30
申请号:US13053556
申请日:2011-03-22
申请人: Heny Lin , Jason Zhang , Alberto Guerra
发明人: Heny Lin , Jason Zhang , Alberto Guerra
IPC分类号: H01L25/18 , H01L23/495 , H01L23/00 , H01L29/20 , H01L29/778
CPC分类号: H01L25/074 , H01L23/49562 , H01L23/49575 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/69 , H01L24/72 , H01L24/73 , H01L29/16 , H01L29/2003 , H01L29/772 , H01L29/778 , H01L2224/0603 , H01L2224/2919 , H01L2224/32145 , H01L2224/32245 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48145 , H01L2224/48247 , H01L2224/49111 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06568 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/10253 , H01L2924/10323 , H01L2924/1033 , H01L2924/10334 , H01L2924/10344 , H01L2924/10346 , H01L2924/1306 , H01L2924/15787 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/85399 , H01L2224/05599
摘要: One exemplary disclosed embodiment comprises a three-terminal stacked-die package including a field effect transistor (FET), such as a silicon FET, stacked atop a III-nitride transistor, such that a drain of the FET resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a gate of the FET, a second terminal of the package is coupled to a drain of the III-nitride transistor. A third terminal of the package is coupled to a source of the FET. In this manner, devices such as cascoded switches may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.
摘要翻译: 一个示例性的公开的实施例包括三端堆叠管芯封装,其包括堆叠在III族氮化物晶体管顶部的场效应晶体管(FET),例如硅FET,使得FET的漏极驻留在电耦合到 III族氮化物晶体管的源极。 封装的第一端子耦合到FET的栅极,封装的第二端子耦合到III族氮化物晶体管的漏极。 封装的第三端子耦合到FET的源极。 以这种方式,诸如级联开关的器件可以以堆叠的管芯形式被封装,从而与常规封装相比,减小了寄生电感和电阻,改善的散热,更小的外形尺寸和更低的制造成本。
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公开(公告)号:US20050280998A1
公开(公告)日:2005-12-22
申请号:US10871246
申请日:2004-06-18
申请人: Heny Lin , Bertrand Vaysse , Fabio Necco
发明人: Heny Lin , Bertrand Vaysse , Fabio Necco
CPC分类号: H05K7/209 , H01L2224/45124 , H01L2224/48091 , H01L2224/49111 , H01L2224/73265 , H01L2924/13091 , H01L2924/00014 , H01L2924/00
摘要: A power module which includes heatsinks made of AlSiC and power semiconductor devices directly mounted thereon.
摘要翻译: 一种功率模块,其包括由AlSiC制成的散热器和直接安装在其上的功率半导体器件。
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