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    POWER ON RESET METHOD FOR RESISTIVE MEMORY STORAGE DEVICE
    2.
    发明申请
    POWER ON RESET METHOD FOR RESISTIVE MEMORY STORAGE DEVICE 审中-公开

    公开(公告)号：US20190221260A1

    公开(公告)日：2019-07-18

    申请号：US16181372

    申请日：2018-11-06

    Applicant: Winbond Electronics Corp.

    Inventor： Ping-Kun Wang ,  Shao-Ching Liao ,  Yu-Ting Chen ,  Ming-Che Lin ,  Chien-Min Wu ,  Chia-Hua Ho

    IPC: G11C13/00

    CPC classification number: G11C13/0038 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0064 ,  G11C2013/0045

    Abstract: A power on reset method for a resistive memory storage device is provided and includes performing a forming procedure on a memory cell of the resistive memory storage device. The forming procedure includes applying at least one forming voltage and at least one reset voltage to the memory cell. The forming procedure further includes a thermal step. The step of applying at least one reset voltage to the memory cell may be preformed before or after the thermal step. After one forming voltage is applied, if the memory cell passes verification, the next forming voltage is not applied to the memory cell. After the thermal step, if the memory cell passes verification, the next forming voltage is not applied to the memory cell. In addition, after one reset voltage is applied, if the memory cell passes verification, the next reset voltage is not applied to the memory cell.

    Memory storage apparatus and forming method of resistive memory device
    4.
    发明授权
    Memory storage apparatus and forming method of resistive memory device 有权

    公开(公告)号：US10658036B2

    公开(公告)日：2020-05-19

    申请号：US16045749

    申请日：2018-07-26

    Applicant: Winbond Electronics Corp.

    Inventor： Shao-Ching Liao ,  Ping-Kun Wang ,  Ming-Che Lin ,  Min-Chih Wei ,  Chia-Hua Ho ,  Chien-Min Wu

    IPC: G11C11/00 ,  G11C13/00 ,  H01L45/00 ,  G11C7/04

    Abstract: A forming method of a resistive memory device is provided. The forming method includes: conducting a forming procedure to apply a forming voltage to the resistive memory device such that the resistive memory device changes from a high resistive state to a low resistive state and measuring a first current of the resistive memory device; performing a thermal step on the resistive memory device and measuring a second current of the resistive memory device; and comparing the second current to the first current and determining to apply a first voltage signal or a second voltage signal to the resistive memory device or to finish the forming procedure according to a comparison result of the first current and the second current. In addition, a memory storage apparatus including a resistive memory device is also provided.

    MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    存储器件及其制造方法

    公开(公告)号：US20170018709A1

    公开(公告)日：2017-01-19

    申请号：US14918567

    申请日：2015-10-21

    Applicant: Winbond Electronics Corp.

    Inventor： Bo-Lun Wu ,  Chia-Hua Ho ,  Ting-Ying Shen ,  Meng-Hung Lin

    IPC: H01L45/00 ,  H01L27/24

    CPC classification number: H01L25/18 ,  H01L27/0248 ,  H01L27/101 ,  H01L27/1052 ,  H01L27/2418 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1608 ,  H01L45/1675

    Abstract: The invention provides a memory device and a manufacturing method thereof. The memory device includes a substrate, a capacitor, a protection device, a first metal interconnect, and a second metal interconnect. The capacitor is located on the substrate of a first region. The protection device is located in the substrate of a second region. The capacitor includes a plurality of bottom electrodes, a top electrode, and a capacitor dielectric layer. The top electrode has a first portion and a second portion, wherein the second portion is extended to the second region. The capacitor dielectric layer is located between the bottom electrodes and the top electrode. The first metal interconnect is located between the capacitor and the substrate. The second metal interconnect is located between the second portion of the top electrode and the protection device. The top electrode is electrically connected to the protection device through the second metal interconnect.

    Abstract translation: 本发明提供了一种存储器件及其制造方法。 存储器件包括衬底，电容器，保护器件，第一金属互连和第二金属互连。 电容器位于第一区域的基板上。 保护装置位于第二区域的基板中。 电容器包括多个底部电极，顶部电极和电容器电介质层。 顶部电极具有第一部分和第二部分，其中第二部分延伸到第二区域。 电容器介电层位于底部电极和顶部电极之间。 第一金属互连位于电容器和基板之间。 第二金属互连位于顶部电极的第二部分和保护装置之间。 顶部电极通过第二金属互连电连接到保护装置。

    RESISTIVE RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME
    7.
    发明申请
    RESISTIVE RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME 有权
    电阻随机存取存储器及其制作方法

    公开(公告)号：US20150287915A1

    公开(公告)日：2015-10-08

    申请号：US14476748

    申请日：2014-09-04

    Applicant: Winbond Electronics Corp.

    Inventor： Shuo-Che Chang ,  Chia-Hua Ho

    IPC: H01L45/00

    CPC classification number: H01L45/146 ,  H01L45/06 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/1608

    Abstract: A resistive random access memory includes a first electrode layer, a second electrode layer, and a stacked structure disposed between the first electrode layer and the second electrode layer. The stacked structure includes a conductive layer and a resistance variable layer. The material of the conductive layer includes HfOx, the material of the resistance variable layer includes HfOy, and x

    Abstract translation: 电阻式随机存取存储器包括第一电极层，第二电极层和布置在第一电极层和第二电极层之间的堆叠结构。 层叠结构包括导电层和电阻变化层。 导电层的材料包括HfO x，电阻变化层的材料包括HfOy和x

    MEMORY STORAGE APPARATUS AND FORMING METHOD OF RESISTIVE MEMORY DEVICE
    9.
    发明申请
    MEMORY STORAGE APPARATUS AND FORMING METHOD OF RESISTIVE MEMORY DEVICE 审中-公开

    公开(公告)号：US20190035459A1

    公开(公告)日：2019-01-31

    申请号：US16045749

    申请日：2018-07-26

    Applicant: Winbond Electronics Corp.

    Inventor： Shao-Ching Liao ,  Ping-Kun Wang ,  Ming-Che Lin ,  Min-Chih Wei ,  Chia-Hua Ho ,  Chien-Min Wu

    IPC: G11C13/00 ,  H01L45/00

    Abstract: A forming method of a resistive memory device is provided. The forming method includes: conducting a forming procedure to apply a forming voltage to the resistive memory device such that the resistive memory device changes from a high resistive state to a low resistive state and measuring a first current of the resistive memory device; performing a thermal step on the resistive memory device and measuring a second current of the resistive memory device; and comparing the second current to the first current and determining to apply a first voltage signal or a second voltage signal to the resistive memory device or to finish the forming procedure according to a comparison result of the first current and the second current. In addition, a memory storage apparatus including a resistive memory device is also provided.

    RESISTIVE MEMORY APPARATUS AND SETTING METHOD FOR RESISTIVE MEMORY CELL THEREOF
    10.
    发明申请
    RESISTIVE MEMORY APPARATUS AND SETTING METHOD FOR RESISTIVE MEMORY CELL THEREOF 审中-公开

    公开(公告)号：US20190006007A1

    公开(公告)日：2019-01-03

    申请号：US15729676

    申请日：2017-10-11

    Applicant: Winbond Electronics Corp.

    Inventor： Ping-Kun Wang ,  Shao-Ching Liao ,  Ming-Che Lin ,  Min-Chih Wei ,  Chia-Hua Ho ,  Chien-Min Wu

    IPC: G11C13/00

    Abstract: A resistive memory apparatus and a setting method for a resistive memory cell thereof are provided. The setting method includes: performing a first setting operation on the resistive memory cell, and performing a first verifying operation on the resistive memory cell after the first setting operation is finished; determining whether to perform a first resetting operation on the resistive memory cell according to a verifying result of the first verifying operation, and performing a second verifying operation on the resistive memory cell after the first resetting operation is determined to be performed and is finished; and determining whether to perform a second resetting operation on the resistive memory cell according to a verifying result of the second verifying operation, and performing a third verifying operation on the resistive memory cell after the second resetting operation is determined to be performed and is finished.

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