公开(公告)号：US20050196683A1

公开(公告)日：2005-09-08

申请号：US11056402

申请日：2005-02-14

申请人： Wolfgang Henke ,  Gerhard Kunkel

发明人： Wolfgang Henke ,  Gerhard Kunkel

IPC分类号： G02B27/14 ,  G03C5/00 ,  G03F1/00 ,  G03F9/00

CPC分类号： G02B27/14 ,  G03C5/00 ,  G03F1/32

摘要： A first and a second phase-shifting, semitransparent layer are formed on a substrate. The layers are patterned lithographically to form first elevated structure elements on the substrate with a first degree of transmission and second structure elements with a second degree of transmission, where the second degree of transmission is different from the first degree of transmission. Memory products can be produced with high resolution and high dimensional accuracy when the structure elements are transferred to a semiconductor substrate, by virtue of dense structure arrangements being represented by the structure elements with a high degree of transmission of more than 30% and, on the same mask, isolated structure arrangements having a low density being represented by the structure elements with a lower degree of transmission.

摘要翻译： 在基板上形成第一和第二相移半透明层。 这些层被光刻地图案化以形成具有第一传播程度的第一高度结构元件和具有第二传输度的第二结构元件，其中第二传播距离与第一传播程度不同。 当结构元件被转移到半导体衬底时，由于结构元件以高度透过率超过30％的结构元件表示的密集结构布置，可以以高分辨率和高尺寸精度制造存储器产品，并且在 具有低密度的相同的掩模，隔离结构布置由具有较低透射度的结构元件表示。

公开(公告)号：US07462426B2

公开(公告)日：2008-12-09

申请号：US11056402

申请日：2005-02-14

申请人： Wolfgang Henke ,  Gerhard Kunkel

发明人： Wolfgang Henke ,  Gerhard Kunkel

IPC分类号： G03F1/00 ,  G03C5/00

CPC分类号： G02B27/14 ,  G03C5/00 ,  G03F1/32

摘要： A first and a second phase-shifting, semitransparent layer are formed on a substrate. The layers are patterned lithographically to form first elevated structure elements on the substrate with a first degree of transmission and second structure elements with a second degree of transmission, where the second degree of transmission is different from the first degree of transmission. Memory products can be produced with high resolution and high dimensional accuracy when the structure elements are transferred to a semiconductor substrate, by virtue of dense structure arrangements being represented by the structure elements with a high degree of transmission of more than 30% and, on the same mask, isolated structure arrangements having a low density being represented by the structure elements with a lower degree of transmission.

摘要翻译： 在基板上形成第一和第二相移半透明层。 这些层被光刻地图案化以形成具有第一传播程度的第一高度结构元件和具有第二传输度的第二结构元件，其中第二传播距离与第一传播程度不同。 当结构元件被转移到半导体衬底时，由于结构元件以高度透过率超过30％的结构元件表示的密集结构布置，可以以高分辨率和高尺寸精度制造存储器产品，并且在 具有低密度的相同的掩模，隔离结构布置由具有较低透射度的结构元件表示。

公开(公告)号：US08362537B2

公开(公告)日：2013-01-29

申请号：US13360965

申请日：2012-01-30

申请人： Gerhard Kunkel ,  Peter Baars

发明人： Gerhard Kunkel ,  Peter Baars

IPC分类号： H01L27/108

CPC分类号： H01L29/66666 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10891 ,  H01L29/7827

摘要： One embodiment relates to an integrated circuit that includes a memory array of pillars arranged in rows and columns. The pillars are separated from one another by row trenches and column trenches. The column trenches include a pair of parallel column trenches. A first trench of the pair includes two parallel bit lines coupled to pillars adjacent to the first trench. A second trench of the pair is free of bit lines. Other methods, devices, and systems are also disclosed.

摘要翻译： 一个实施例涉及一种集成电路，其包括以行和列排列的柱的存储器阵列。 柱子通过行沟槽和柱沟槽彼此分开。 列沟槽包括一对平行的柱沟槽。 该对的第一沟槽包括耦合到邻近第一沟槽的柱的两个平行位线。 该对的第二个沟槽没有位线。 还公开了其它方法，装置和系统。

公开(公告)号：US20060193531A1

公开(公告)日：2006-08-31

申请号：US11066638

申请日：2005-02-25

申请人： William Roberts ,  Gerhard Kunkel ,  Patrick Lomtscher ,  Karl Schumacher

发明人： William Roberts ,  Gerhard Kunkel ,  Patrick Lomtscher ,  Karl Schumacher

IPC分类号： G06K9/40 ,  G06K9/00

CPC分类号： G03F7/70283 ,  G03F7/706 ,  G03F7/70641

摘要： A system for analyzing images of a blazed phase grating sample includes an interface configured to receive images of sample points of a blazed phase grating sample obtained by an inspection system, a memory for storing the images, and a processor. Each image is named according to a sequential naming protocol that associates each image to a location on the blazed phase grating sample. The processor is configured to load the images from the memory, convert image data for each sample point to intensity values by pixel, determine a best focus by azimuth for each sample point based on the intensity values, and calculate parameters from the blazed phase grating sample based on the best focus by azimuth for each sample point.

摘要翻译： 用于分析闪耀相位光栅样本的图像的系统包括被配置为接收由检查系统获得的闪耀相位光栅样本的采样点的图像，用于存储图像的存储器和处理器的接口的接口。 每个图像根据顺序命名协议命名，将每个图像与闪耀的相位光栅样本上的一个位置相关联。 处理器被配置为从存储器加载图像，将每个采样点的图像数据逐个像素转换为强度值，基于强度值确定每个采样点的方位角的最佳焦点，并从闪耀的相位光栅样本中计算参数 基于每个采样点的方位角的最佳焦点。

公开(公告)号：US07074529B2

公开(公告)日：2006-07-11

申请号：US10787118

申请日：2004-02-27

申请人： Shahid Butt ,  Gerhard Kunkel

发明人： Shahid Butt ,  Gerhard Kunkel

IPC分类号： G01F9/00

CPC分类号： G03F1/32 ,  G03F1/26 ,  G03F7/70325

摘要： The relative surface area sizes of portions having distinct phase-shift and transmission of light of a pattern on a phase-shift mask substantially obey the condition that the product of surface area and transmission of the electrical field strength is the same for all of the portions. Then, frequency doubling occurs due to vanishing zero order diffraction orders and in the case of high-transition attenuated phase-shift masks a large first order diffraction amplitude reveals an even an improved as compared with conventional phase-shift masks. Two-dimensional matrix-like structures particularly on attenuated or halftone phase-shift masks can be arranged to image high-density patterns on a semiconductor wafer. The duty cycles of pattern matrices can be chosen being different from one in two orthogonal directions nevertheless leading to frequency doubling.

摘要翻译： 在相移掩模上具有明显的相移和图案的光的透射的部分的相对表面积大小基本上遵循对于所有部分的表面积和电场强度透射率的乘积相同的条件 。 然后，由于零阶衍射级消失而发生倍频，并且在高转变衰减相移掩模的情况下，与常规相移掩模相比，大的一级衍射幅度显示出均匀的改善。 特别是在衰减或半色调相移掩模上的二维矩阵状结构可以被布置成对半导体晶片上的高密度图案进行成像。 可以选择模式矩阵的占空比不同于两个正交方向上的一个，但是导致倍频。

公开(公告)号：US06727989B1

公开(公告)日：2004-04-27

申请号：US09597123

申请日：2000-06-20

申请人： Xiaoming Yin ,  Christopher Gould ,  Gerhard Kunkel

发明人： Xiaoming Yin ,  Christopher Gould ,  Gerhard Kunkel

IPC分类号： G01B1100

CPC分类号： G03F7/70633

摘要： In an overlay measurement mark comprising an inner box and an outer box located at a predetermined area on a mask through which patterns are formed on a semiconductor device, the improvement of an overlay mark that extends the overlay measurement range comprising: in-focused marks means printed at an optimal or ideal focal plane level from an illumination source, and de-focused marks means located at a different focus level from the optimal focal plane to provide image placement shift of the de-focused marks larger than that of the in-focused marks means to enable measurement of the shift of de-focused marks that are not attributable to a mechanical alignment error to be determined with greater accuracy.

摘要翻译： 在覆盖测量标记中，包括位于掩模上的预定区域的内盒和外箱，通过图形形成在半导体器件上的预定区域，扩展重叠测量范围的重叠标记的改进包括：聚焦内标记装置 以最佳或理想的焦平面级别从照明源打印，以及去焦点标记装置，其位于与最佳焦平面不同的聚焦水平上，以提供去焦点标记的图像放置位移大于聚焦点 标记意味着能够更准确地确定不归因于机械对准误差的脱焦标记的偏移的测量。

公开(公告)号：US06558883B2

公开(公告)日：2003-05-06

申请号：US09801413

申请日：2001-03-08

申请人： Oliver Genz ,  Jurgen Preuninger ,  Gerhard Kunkel

发明人： Oliver Genz ,  Jurgen Preuninger ,  Gerhard Kunkel

IPC分类号： G03F720

CPC分类号： G03F7/70358 ,  G03F7/70725

摘要： A method and apparatus (100) for patterning the surface of a semiconductor wafer (130). A stage (148) is coupled to a motor (150) that is adapted to move the stage (148) and a semiconductor wafer (130) in a horizontal direction at a first speed A. A mask (140) is disposed above the semiconductor wafer (130), the mask (140) being coupled to a motor (142) that is adapted to move the mask (140) in a horizontal direction at a second speed B. The ratio of the first and second speeds is different than the magnification factor, which may be other than 1:1 if a lens (120) is used. The mask (140) and the wafer (130) may be moved in the same horizontal direction simultaneously during the exposure process at different speeds B and A, respectively, to provide a magnification or demagnification of the mask (140) pattern onto the wafer (130) surface.

公开(公告)号：US6083788A

公开(公告)日：2000-07-04

申请号：US277669

申请日：1999-03-26

申请人： Jenny Lian ,  Gerhard Kunkel

发明人： Jenny Lian ,  Gerhard Kunkel

IPC分类号： H01L27/105 ,  H01L21/02 ,  H01L21/768 ,  H01L21/8242 ,  H01L21/8246

CPC分类号： H01L27/1085 ,  H01L21/768 ,  H01L27/10852 ,  H01L28/60 ,  H01L28/55

摘要： A DRAM memory cell structure of a Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) and a stacked capacitor and a method for forming same facilitates low resistance contact between the source/drain of the transistor and a lower electrode of the capacitor. The method in its preferred embodiment uses platinum for the bottom electrode of the capacitor without the need for a diffusion barrier between it and a doped polysilicon plug used to contact the MOSFET. To this end, the formation of the contact is after the deposition of the high dielectric material, such as barium strontium titanate, used to form the dielectric of the capacitor. Also the bottom electrode of the capacitor is partially offset with respect to the polysilicon plug.

摘要翻译： 金属氧化物半导体场效应晶体管（MOSFET）和堆叠电容器的DRAM存储单元结构及其形成方法有利于晶体管的源/漏与电容器的下电极之间的低电阻接触。 在其优选实施例中的方法使用铂作为电容器的底部电极，而不需要在其与用于接触MOSFET的掺杂多晶硅插塞之间的扩散阻挡层。 为此，接触的形成是用于形成电容器的电介质的高介电材料（例如钛酸钡锶）​​的沉积之后。 此外，电容器的底部电极相对于多晶硅插塞部分偏移。

公开(公告)号：US20060194130A1

公开(公告)日：2006-08-31

申请号：US11065931

申请日：2005-02-25

申请人： William Roberts ,  Gerhard Kunkel ,  Patrick Lomtscher ,  Karl Schumacher

发明人： William Roberts ,  Gerhard Kunkel ,  Patrick Lomtscher ,  Karl Schumacher

IPC分类号： G03B27/00 ,  G03C5/00 ,  G03B27/42

CPC分类号： G03F7/70258 ,  G03F7/70283 ,  G03F7/706

摘要： An exposure tool includes an illumination source, a blazed phase grating reticle, a reticle stage holding the blazed phase grating reticle, a lens system including at least one adjustable lens element, a wafer stage holding a sample, and a controller. The controller is configured to control the illumination source and the position of the blazed phase grating reticle and the lens system relative to the wafer stage to expose the sample to generate a blazed phase grating sample. The controller is configured to adjust the at least one adjustable lens element to compensate for aberrations of the lens system based on feedback generated from analyzing images of the blazed phase grating sample.

摘要翻译： 曝光工具包括照明源，闪耀相位光栅掩模版，保持闪耀相位光栅掩模版的掩模版台，包括至少一个可调透镜元件的透镜系统，保持样品的晶片台和控制器。 控制器被配置为控制照明源和闪耀相位光栅掩模版和透镜系统相对于晶片台的位置以暴露样品以产生闪耀的相位光栅样本。 控制器被配置为基于从分析闪耀相位光栅样本的图像产生的反馈来调整至少一个可调透镜元件以补偿透镜系统的像差。

公开(公告)号：US06566219B2

公开(公告)日：2003-05-20

申请号：US09957937

申请日：2001-09-21

申请人： Gerhard Kunkel ,  Shahid Butt ,  Ramachandra Divakaruni ,  Armin M. Reith ,  Munir D. Naeem

发明人： Gerhard Kunkel ,  Shahid Butt ,  Ramachandra Divakaruni ,  Armin M. Reith ,  Munir D. Naeem

IPC分类号： H01L21475

CPC分类号： H01L27/10864 ,  H01L27/1087 ,  H01L27/10891

摘要： A method of forming a trench can be used in the fabrication of dynamic random access memory (DRAM) cells. In one aspect, a first layer of a first material (e.g., polysilicon) is formed over a semiconductor region (e.g., a silicon substrate). The first layer is patterned to remove portions of the first material. A second material (e.g., oxide) can then be deposited to fill the portions where the first material was removed. After removing the remaining portions of the first layer of first material, a trench can be etched in the semiconductor region. The trench would be substantially aligned to the second material.

摘要翻译： 形成沟槽的方法可用于制造动态随机存取存储器（DRAM）单元。 在一个方面，在半导体区域（例如，硅衬底）上形成第一材料（例如，多晶硅）的第一层。 图案化第一层以去除第一材料的部分。 然后可以沉积第二材料（例如，氧化物）以填充去除第一材料的部分。 在去除第一材料的第一层的剩余部分之后，可以在半导体区域中蚀刻沟槽。 沟槽将基本上对准第二材料。