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公开(公告)号：US20110141795A1
公开(公告)日：2011-06-16
申请号：US13031080
申请日：2011-02-18
申请人： Yasurou MATSUZAKI , Takaaki SUZUKI , Masafumi YAMAZAKI , Kenichi KAWASAKI , Shinnosuke KAMATA , Ayako SATO , Masato MATSUMIYA
发明人： Yasurou MATSUZAKI , Takaaki SUZUKI , Masafumi YAMAZAKI , Kenichi KAWASAKI , Shinnosuke KAMATA , Ayako SATO , Masato MATSUMIYA
IPC分类号： G11C11/24 , G11C8/16 , G11C11/406
CPC分类号： G11C8/16 , G06F13/1605 , G11C7/1039 , G11C7/1075 , G11C7/1078 , G11C7/22 , G11C8/18 , G11C11/24 , G11C11/406 , G11C11/40603 , G11C11/40615 , G11C11/409 , G11C11/4093 , G11C2207/107 , G11C2207/108
摘要： A semiconductor memory device includes a plurality of N external ports, each of which receives commands, and an internal circuit which performs at least N access operations during a minimum interval of the commands that are input into one of the external ports.
摘要翻译： 半导体存储器件包括多个N个外部端口，每个N个外部端口接收命令;以及内部电路，其在输入到一个外部端口的命令的最小间隔期间执行至少N次访问操作。
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公开(公告)号：US20120058257A1
公开(公告)日：2012-03-08
申请号：US13295151
申请日：2011-11-14
IPC分类号： B05D5/12
CPC分类号： H01G4/008 , H01G4/005 , H01G4/2325 , Y10T29/417 , Y10T29/43 , Y10T29/435
摘要： A laminated electronic component is configured to include substrate plating films disposed on outer surfaces of an electronic component main body through direct plating such that external terminal electrodes are connected to exposed portions of internal conductors (internal electrodes), and the average particle diameter of metal particles defining the substrate plating film is at least about 1.0 μm. The external terminal electrode includes at least one layer of an upper plating film disposed on the substrate plating film. The metal particles defining the substrate plating film are Cu particles.
摘要翻译： 层叠电子部件被配置为包括通过直接电镀设置在电子部件主体的外表面上的基板镀膜，使得外部端子电极与内部导体（内部电极）的露出部分连接，金属粒子的平均粒径 限定衬底镀膜至少约1.0μm。 外部端子电极包括设置在基板镀膜上的至少一层上镀层。 限定衬底镀膜的金属颗粒是Cu颗粒。
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公开(公告)号：US20110267097A1
公开(公告)日：2011-11-03
申请号：US13184214
申请日：2011-07-15
申请人： Kenichi KAWASAKI
发明人： Kenichi KAWASAKI
IPC分类号： H03K19/003
CPC分类号： H03K19/0016 , G01R31/31721 , G06F1/3203 , G06F1/324 , G06F1/3287 , Y02D10/126 , Y02D10/171
摘要： A semiconductor device whose operational state is switched between a test state and a normal operational state according to a logical value of a signal input from the outside is provided. The semiconductor device includes a first power line, a second power line, a switch that is controlled by a signal line to couple/isolate the first power line to/from the second power line, a control circuit that outputs a control signal, and a state switching circuit that drives the signal line to couple/isolate the first power line to/from the second power line according to a logical value of the control signal when the input signal is one of logical values, whereas the state switching circuit drives the signal line to couple the first power line to the second power line when the first signal is the other logical value.
摘要翻译： 提供了根据从外部输入的信号的逻辑值，在测试状态和正常操作状态之间切换操作状态的半导体器件。 半导体器件包括第一电源线，第二电源线，由信号线控制以将第一电力线与第二电力线耦合/隔离的开关，输出控制信号的控制电路和 状态切换电路，当所述输入信号为逻辑值之一时，根据所述控制信号的逻辑值驱动所述信号线将所述第一电力线与所述第二电力线耦合/隔离，而所述状态切换电路驱动所述信号 当第一信号是另一个逻辑值时，将第一电力线耦合到第二电力线。
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公开(公告)号：US20110260783A1
公开(公告)日：2011-10-27
申请号：US13036976
申请日：2011-02-28
申请人： Kenichi KAWASAKI
发明人： Kenichi KAWASAKI
IPC分类号： G05F1/10
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3287 , G06F1/3296 , Y02D10/126 , Y02D10/171 , Y02D10/172 , Y10T307/707
摘要： A semiconductor device includes a plurality of internal circuits, a plurality of low drop output regulators, and a power management unit. The plurality of low drop output regulators are configured to reduce a power source voltage applied from an outside and generate supply voltages which are to be supplied to the plurality of internal circuits. The power management unit is configured to change a voltage value of the power source voltage in accordance with a state of combination of voltage values of the plurality of supply voltages generated by the plurality of low drop output regulators.
摘要翻译： 半导体器件包括多个内部电路，多个低压降输出调节器和电源管理单元。 多个低压降输出调节器被配置为减少从外部施加的电源电压，并且产生要提供给多个内部电路的电源电压。 电源管理单元被配置为根据由多个低压降输出调节器产生的多个电源电压的电压值的组合的状态来改变电源电压的电压值。
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公开(公告)号：US20110234045A1
公开(公告)日：2011-09-29
申请号：US13050977
申请日：2011-03-18
申请人： Akihiro MOTOKI , Syunsuke TAKEUCHI , Makoto OGAWA , Seiichi NISHIHARA , Kenichi KAWASAKI , Shuji MATSUMOTO
发明人： Akihiro MOTOKI , Syunsuke TAKEUCHI , Makoto OGAWA , Seiichi NISHIHARA , Kenichi KAWASAKI , Shuji MATSUMOTO
CPC分类号： H01G4/248 , B32B18/00 , B32B37/18 , B32B2307/202 , B32B2315/02 , B32B2457/00 , C23C18/40 , H01G4/005 , H01G4/012 , H01G4/12 , H01G4/228 , H01G4/30
摘要： In a method of forming a plating layer for an external terminal electrode by applying, for example, copper plating to an end surface of a component main body with respective ends of internal electrodes exposed, and then applying a heat treatment at a temperature of about 1000° C. or more in order to improve the adhesion strength and moisture resistance of the external terminal electrode, the plating layer may be partially melted to decrease the bonding strength of the plating layer. In the step of applying a heat treatment at a temperature of about 1000° C. or more to a component main body with plating layers formed thereon, the average rate of temperature increase from room temperature to the temperature of about 1000° C. or more is set to about 100° C./minute or more. This average rate of temperature increase maintains a moderate eutectic state in the plating layer and ensures a sufficient bonding strength of the plating layer.
摘要翻译： 在形成外部端子电极用镀层的方法中，例如通过对内部电极的两端露出的部件主体的端面进行镀铜，然后在约1000℃的温度下进行热处理 ℃以上，为了提高外部端子电极的粘合强度和耐湿性，可以使镀层部分熔融，降低镀层的接合强度。 在其上形成有镀层的组件主体上，在约1000℃以上的温度下进行热处理的步骤中，平均温度从室温升高至约1000℃以上的温度 设定为约100℃/分钟以上。 该平均升温速率在镀层中保持中等的共晶状态，并确保镀层的充分的接合强度。
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公开(公告)号：US20090303655A1
公开(公告)日：2009-12-10
申请号：US12405399
申请日：2009-03-17
CPC分类号： H01G4/30 , H01G4/005 , H01G4/12 , H01G4/232 , Y10T29/435
摘要： A ceramic electronic component includes a ceramic body and a plurality of external electrodes disposed at a surface of the ceramic body. The external electrodes include a plating layer containing glass particles each coated with a metal film. The plating layer is formed by co-deposition of a plating metal and the metal-coated glass particles.
摘要翻译： 陶瓷电子部件包括陶瓷体和设置在陶瓷体的表面的多个外部电极。 外部电极包括含有各自涂覆有金属膜的玻璃颗粒的镀层。 镀层通过电镀金属和金属涂覆的玻璃颗粒的共沉积形成。
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公开(公告)号：US20090091370A1
公开(公告)日：2009-04-09
申请号：US12244242
申请日：2008-10-02
申请人： Kenichi KAWASAKI
发明人： Kenichi KAWASAKI
CPC分类号： H03J3/20
摘要： The semiconductor intergrated circuit comprises: a circuit that executes a predetermined process and a switching circuit that selects a power impedance, The switching circuit selects the power impedance, in accordance with a variation in voltage supplied to the circuit, so that a resonant frequency of the semiconductor integrated circuit is different from a operation frequency of the circuit.
摘要翻译： 半导体集成电路包括：执行预定处理的电路和选择功率阻抗的开关电路。开关电路根据提供给电路的电压变化来选择功率阻抗，使得谐振频率 半导体集成电路与电路的工作频率不同。
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8.发明申请公开(公告)号：US20080239617A1
公开(公告)日：2008-10-02
申请号：US12055372
申请日：2008-03-26
申请人： Akihiro MOTOKI , Kenichi KAWASAKI , Makoto OGAWA , Shigeyuki KURODA , Shunsuke TAKEUCHI , Hideyuki KASHIO
发明人： Akihiro MOTOKI , Kenichi KAWASAKI , Makoto OGAWA , Shigeyuki KURODA , Shunsuke TAKEUCHI , Hideyuki KASHIO
摘要： A method for manufacturing a laminated ceramic capacitor includes a step of preparing a laminate which has a first principal surface, a second principal surface, a first end surface, a second end surface, a first side surface, and a second side surface and which includes insulating layers and internal electrodes having end portions exposed at the first or second end surface; a step of forming external electrodes on the first and second end surfaces such that plating deposits are formed on the exposed end portions of the internal electrodes so as to be connected to each other; and a step of forming thick end electrodes electrically connected to the external electrodes such that a conductive paste is applied onto edge portions of the first and second principal surfaces and first and second side surfaces of the laminate and then baked.
摘要翻译： 层压陶瓷电容器的制造方法包括：制备具有第一主表面，第二主表面，第一端面，第二端面，第一侧表面和第二侧表面的层压体的步骤， 绝缘层和具有在第一或第二端面露出的端部的内部电极; 在所述第一和第二端面上形成外部电极的步骤，使得在所述内部电极的所述暴露端部上形成电镀沉积物以彼此连接; 以及形成与外部电极电连接的厚端电极的步骤，使得将导电浆料施加到层压体的第一和第二主表面和第一和第二侧表面的边缘部分上，然后烘烤。
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9.发明申请Wireless transmission system, wireless communication device, and wireless communication method 有权无线传输系统，无线通信设备和无线通信方式公开(公告)号：US20110051780A1
公开(公告)日：2011-03-03
申请号：US12805552
申请日：2010-08-05
申请人： Kenichi KAWASAKI
发明人： Kenichi KAWASAKI
IPC分类号： H04B1/00
CPC分类号： H04L27/04 , H04B1/40 , H04L27/122 , H04L27/20 , H04L27/365
摘要： A wireless transmission system includes: a communication unit for transmission; and a communication unit for reception. The communication units for transmission and reception are housed in a housing of the same electronic apparatus, or the communication unit for transmission is housed in a housing of first electronic apparatus and the communication unit for reception is housed in a housing of second electronic apparatus and a wireless signal transmission path enabling wireless information transmission between the communication units is formed between the communication units when the first and the second electronic apparatus are disposed at given positions to be integrated with each other. The communication unit for transmission includes a first carrier signal generating unit and a first frequency converter, and the communication unit for reception includes a second carrier signal generating unit, and a second frequency converter.
摘要翻译： 无线传输系统包括：用于传输的通信单元; 以及用于接收的通信单元。 用于发送和接收的通信单元被容纳在同一电子设备的壳体中，或者用于传输的通信单元容纳在第一电子设备的壳体中，并且用于接收的通信单元容纳在第二电子设备的壳体和 当第一和第二电子设备被布置在彼此集成的给定位置时，在通信单元之间形成能够实现通信单元之间的无线信息传输的无线信号传输路径。 用于传输的通信单元包括第一载波信号生成单元和第一频率转换器，并且用于接收的通信单元包括第二载波信号生成单元和第二频率转换器。
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公开(公告)号：US20100118467A1
公开(公告)日：2010-05-13
申请号：US12616844
申请日：2009-11-12
IPC分类号： H01G4/228
CPC分类号： H01G4/232 , H01G4/2325 , H01G4/30
摘要： In a laminated ceramic electronic component, external terminal electrodes include plating films directly covering exposed portions of internal electrodes on end surfaces of a ceramic element assembly. On the boundaries between the end surfaces and principal surfaces of the ceramic element assembly, substantially rounded corners are provided, and the plating films are arranged such that the ends of the plating films stop at the corners and do not project from the principal surfaces.
摘要翻译： 在层叠陶瓷电子部件中，外部端子电极包括直接覆盖陶瓷元件组件的端面上的内部电极的露出部分的电镀膜。 在陶瓷元件组件的端面和主面之间的边界上，设置大致圆角，并且镀膜被布置成使得镀膜的端部停止在角部并且不从主表面突出。
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