Apparatus and method for recording and reproducing digital signal in
synchronization blocks
    1.
    发明授权
    Apparatus and method for recording and reproducing digital signal in synchronization blocks 失效
    用于在同步块中记录和再现数字信号的装置和方法

    公开(公告)号:US5655050A

    公开(公告)日:1997-08-05

    申请号:US659623

    申请日:1996-06-06

    摘要: A digital signal recording apparatus for recording digital signal in synchronization blocks includes a generator for generating a synchronization pattern for indicating the beginning of each synchronization block, a generator for generating an ID data for indicating the sequence of the synchronization blocks, a generator for generating an ID parity for checking the ID data, a generator for generating additional information signal, which is a track width data, a generator for generating audio and video signals. Above data are applied to a pattern generator for generating track data comprising plural consecutive normal synchronization blocks immediately preceded by two mini-synchronization blocks and immediately followed by one mini-synchronization block. Each mini-synchronization block includes the synchrionization pattern, ID data, ID parity, and additional information signal. Each normal synchronization block includes the synchronization pattern, ID data, ID parity, and audio and video signal.

    摘要翻译: 用于在同步块中记录数字信号的数字信号记录装置包括用于产生用于指示每个同步块的开始的同步模式的发生器,用于产生用于指示同步块的序列的ID数据的发生器,用于生成 用于检查ID数据的ID奇偶校验,用于产生作为轨道宽度数据的附加信息信号的发生器,用于产生音频和视频信号的发生器。 上述数据被应用于模式发生器,用于产生包括紧接在两个小型同步块之前的多个连续正常同步块的跟踪数据,并且紧随其后的是一个小型同步块。 每个小型同步块包括同步模式,ID数据,ID奇偶校验和附加信息信号。 每个正常同步块包括同步模式,ID数据,ID奇偶校验以及音频和视频信号。

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    8.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号:US20120193726A1

    公开(公告)日:2012-08-02

    申请号:US13500863

    申请日:2009-10-06

    摘要: A semiconductor device including an n-channel-type MISFET (Qn) having an Hf-containing insulating film (5), which is a high dielectric constant gate insulating film containing hafnium, a rare-earth element, and oxygen as main components, and a gate electrode (GE1), which is a metal gate electrode, is manufactured. The Hf-containing insulating film (5) is formed by forming a first Hf-containing film containing hafnium and oxygen as main components, a rare-earth containing film containing a rare-earth element as a main component, and a second Hf-containing film containing hafnium and oxygen as main components sequentially from below and then causing these to react with one another.

    摘要翻译: 包括具有含Hf的绝缘膜(5)的n沟道型MISFET(Qn)的半导体器件,其是含有铪,稀土元素和氧作为主要成分的高介电常数栅极绝缘膜,以及 制造作为金属栅电极的栅电极(GE1)。 含Hf绝缘膜(5)通过形成含有铪和氧作为主要成分的第一含Hf膜,含有稀土元素作为主要成分的稀土类膜,第二Hf含 从下面顺序地含有铪和氧作为主要成分的膜,然后使它们彼此反应。

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    9.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
    半导体器件及其制造方法

    公开(公告)号:US20100102395A1

    公开(公告)日:2010-04-29

    申请号:US12572646

    申请日:2009-10-02

    摘要: Provided is a semiconductor device capable of having a single metal/dual high-k structure with a good shape and having flat band voltages suited for nMOS and pMOS, respectively. The semiconductor device according to the one embodiment of the present invention has a first conductivity type MOSFET and a second conductivity type MOSFET. The first and second conductivity type MOSFETs are each equipped with a first insulating film formed over a semiconductor substrate, a second insulating film formed over the first insulating film and made of an insulating material having a higher dielectric constant than the first insulating film, and a gate electrode formed over the second insulating film and having, as a lower layer of the gate electrode, a metal layer containing a material which diffuses into the second insulating film to control a work function thereof. The second conductivity type MOSFET is equipped further with a diffusion barrier film formed between the first insulating film and the second insulating film to prevent diffusion of a work-function controlling material into the interface of the first insulating film.

    摘要翻译: 提供了能够分别具有适合于nMOS和pMOS的具有良好形状并具有平坦带电压的单个金属/双高k结构的半导体器件。 根据本发明的一个实施例的半导体器件具有第一导电型MOSFET和第二导电型MOSFET。 第一导电型MOSFET和第二导电型MOSFET分别配置有形成在半导体基板上的第一绝缘膜,形成在第一绝缘膜上并且由具有比第一绝缘膜高的介电常数的绝缘材料制成的第二绝缘膜, 栅电极形成在第二绝缘膜上,并且具有作为栅电极的下层的含有扩散到第二绝缘膜中以控制其功函的材料的金属层。 第二导电型MOSFET还具有形成在第一绝缘膜和第二绝缘膜之间的扩散阻挡膜,以防止功函数控制材料扩散到第一绝缘膜的界面中。

    COPPER ALLOY MATERIAL AND METHOD OF MAKING SAME
    10.
    发明申请
    COPPER ALLOY MATERIAL AND METHOD OF MAKING SAME 失效
    铜合金材料及其制备方法

    公开(公告)号:US20100037996A1

    公开(公告)日:2010-02-18

    申请号:US12603804

    申请日:2009-10-22

    IPC分类号: C22F1/08

    CPC分类号: C22C9/06 C22C9/04 C22F1/08

    摘要: A copper alloy material having: 1.0 to 5.0 mass % of Ni; 0.2 to 1.0 mass % of Si; 1.0 to 5.0 mass % of Zn; 0.1 to 0.5 mass % of Sn; 0.003 to 0.3 mass % of P; and the balance consisting of Cu and an unavoidable impurity. The mass ratio between Ni and each of Si, Zn and Sn is to be Ni/Si=4 to 6, Zn/Ni=0.5 or more, and Sn/Ni=0.05 to 0.2.

    摘要翻译: 具有1.0〜5.0质量%的Ni的铜合金材料; Si:0.2〜1.0质量% 1.0〜5.0质量%的Zn; Sn:0.1〜0.5质量% 0.003〜0.3质量% 余量由Cu和不可避免的杂质组成。 Ni与Si,Zn,Sn的质量比为Ni / Si = 4〜6,Zn / Ni = 0.5以上,Sn / Ni = 0.05〜0.2。