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    Semiconductor storage device and method of fabricating same
    1.
    发明授权
    Semiconductor storage device and method of fabricating same 有权
    半导体存储装置及其制造方法

    公开(公告)号：US09293508B2

    公开(公告)日：2016-03-22

    申请号：US14349386

    申请日：2011-10-07

    申请人： Yoshitaka Sasago ,  Masaharu Kinoshita

    发明人： Yoshitaka Sasago ,  Masaharu Kinoshita

    IPC分类号： H01L21/00 ,  H01L27/24 ,  H01L45/00

    CPC分类号： H01L27/2481 ,  H01L27/2409 ,  H01L27/2454 ,  H01L45/06 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/144 ,  H01L45/1683

    摘要： A memory cell array having such a structure that can be realized with a simpler process and ideal for realizing a higher density is provided. Memory cells have a structure in which channel layers (88p and 89p) are formed on the side surfaces of each of a plurality of stacked structures which extends in the Y direction and is periodically formed in the X direction with a gate insulator film layer (9) interposed, and a resistance-change material layer (7) is formed so as to be electrically connected to two adjacent channel layers of the channel layers. Due to such a structure, it is not necessary to perform such a very difficult step that processes the resistance-change material and the silicons collectively and it is possible to provide the memory cell array with a simpler process.

    摘要翻译： 提供具有能够以更简单的处理实现并且实现更高密度的理想的具有这种结构的存储单元阵列。 存储单元具有这样的结构，其中沟道层（88p和89p）形成在多个层叠结构中的每一个在Y方向上延伸并且沿X方向周期性地形成的栅极绝缘膜层（9 ），并且形成电阻变化材料层（7），以电连接到沟道层的两个相邻沟道层。 由于这样的结构，不需要进行这样一个非常困难的步骤，即整体地处理电阻变化材料和硅，并且可以以更简单的工艺来提供存储单元阵列。

    Semiconductor device
    3.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US07996735B2

    公开(公告)日：2011-08-09

    申请号：US12469778

    申请日：2009-05-21

    申请人： Motoyasu Terao ,  Satoru Hanzawa ,  Hitoshi Kume ,  Minoru Ogushi ,  Yoshitaka Sasago ,  Masaharu Kinoshita ,  Norikatsu Takaura

    发明人： Motoyasu Terao ,  Satoru Hanzawa ,  Hitoshi Kume ,  Minoru Ogushi ,  Yoshitaka Sasago ,  Masaharu Kinoshita ,  Norikatsu Takaura

    IPC分类号： G11C29/00

    CPC分类号： G11C13/0064 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0069 ,  G11C29/028 ,  G11C29/50 ,  G11C29/50008 ,  G11C2013/0054 ,  G11C2213/72

    摘要： To realize a fast and highly reliable phase-change memory system of low power consumption, a semiconductor device includes: a memory device which includes a first memory array having a first area including a plurality of first memory cells and a second area including a plurality of second memory cells; a controller coupled to the memory device to issue a command to the memory device; and a condition table for storing a plurality of trial writing conditions. The controller performs trial writing in the plurality of second memory cells a plurality of times based on the plurality of trial writing conditions stored in the condition table, and determines writing conditions in the plurality of first memory cells based on a result of the trial writing. The memory device performs writing in the plurality of first memory cells based on the writing conditions instructed from the controller.

    摘要翻译： 为了实现低功耗的快速且高度可靠的相变存储器系统，半导体器件包括：存储器件，其包括具有包括多个第一存储器单元的第一区域的第一存储器阵列和包括多个第一存储器单元的第二区域 第二存储单元; 控制器，其耦合到所述存储器设备以向所述存储器设备发出命令; 以及用于存储多个试写条件的条件表。 控制器基于存储在条件表中的多个试写条件，在多个第二存储单元中执行多次尝试写入，并且基于试写的结果来确定多个第一存储单元中的写入条件。 存储器件基于从控制器指示的写入条件在多个第一存储器单元中执行写入。

    SEMICONDUCTOR STORAGE DEVICE AND METHOD OF FABRICATING SAME
    4.
    发明申请
    SEMICONDUCTOR STORAGE DEVICE AND METHOD OF FABRICATING SAME 有权
    半导体存储器件及其制造方法

    公开(公告)号：US20140246646A1

    公开(公告)日：2014-09-04

    申请号：US14349386

    申请日：2011-10-07

    申请人： Yoshitaka Sasago ,  Masaharu Kinoshita

    发明人： Yoshitaka Sasago ,  Masaharu Kinoshita

    IPC分类号： H01L27/24

    CPC分类号： H01L27/2481 ,  H01L27/2409 ,  H01L27/2454 ,  H01L45/06 ,  H01L45/1226 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/144 ,  H01L45/1683

    摘要： A memory cell array having such a structure that can be realized with a simpler process and ideal for realizing a higher density is provided. Memory cells have a structure in which channel layers (88p and 89p) are formed on the side surfaces of each of a plurality of stacked structures which extends in the Y direction and is periodically formed in the X direction with a gate insulator film layer (9) interposed, and a resistance-change material layer (7) is formed so as to be electrically connected to two adjacent channel layers of the channel layers. Due to such a structure, it is not necessary to perform such a very difficult step that processes the resistance-change material and the silicons collectively and it is possible to provide the memory cell array with a simpler process.

    摘要翻译： 提供具有能够以更简单的处理实现并且实现更高密度的理想的具有这种结构的存储单元阵列。 存储单元具有这样的结构，其中沟道层（88p和89p）形成在多个层叠结构中的每一个在Y方向上延伸并且沿X方向周期性地形成的栅极绝缘膜层（9 ），并且形成电阻变化材料层（7），以电连接到沟道层的两个相邻沟道层。 由于这样的结构，不需要进行这样一个非常困难的步骤，即整体地处理电阻变化材料和硅，并且可以以更简单的工艺来提供存储单元阵列。

    Nonvolatile memory device and method of manufacturing the same
    5.
    发明授权
    Nonvolatile memory device and method of manufacturing the same 有权
    非易失性存储器件及其制造方法

    公开(公告)号：US08604456B2

    公开(公告)日：2013-12-10

    申请号：US13366544

    申请日：2012-02-06

    申请人： Masaharu Kinoshita ,  Yoshitaka Sasago ,  Norikatsu Takaura

    发明人： Masaharu Kinoshita ,  Yoshitaka Sasago ,  Norikatsu Takaura

    IPC分类号： H01L45/00

    CPC分类号： H01L45/144 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2213/72 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1293 ,  H01L45/1675 ,  Y10S438/90

    摘要： Provided is a nonvolatile memory device including a phase-change memory configured with cross-point memory cells in which memory elements formed of a phase-change material and selection elements formed with a diode are combined. A memory cell is configured with a memory element formed of a phase-change material and a selection element formed with a diode having a stacked structure of a first polycrystalline silicon film, a second polycrystalline silicon film, and a third polycrystalline silicon film. The memory cells are arranged at intersection points of a plurality of first metal wirings extending along a first direction with a plurality of third metal wirings extending along a second direction orthogonal to the first direction. An interlayer film is formed between adjacent selection elements and between adjacent memory elements, and voids are formed in the interlayer film provided between the adjacent memory elements.

    摘要翻译： 本发明提供一种非易失性存储装置，其包括：配置有交叉点存储单元的相变存储器，其中由相变材料形成的存储元件和由二极管形成的选择元件组合。 存储单元配置有由相变材料形成的存储元件和由具有第一多晶硅膜，第二多晶硅膜和第三多晶硅膜的堆叠结构的二极管形成的选择元件。 存储单元布置在沿着第一方向延伸的多个第一金属布线的交点和沿着与第一方向正交的第二方向延伸的多个第三金属布线。 在相邻的选择元件之间和相邻的存储元件之间形成中间膜，并且在设置在相邻的存储元件之间的层间膜中形成空隙。

    Semiconductor storage device and method for manufacturing same
    10.
    发明授权
    Semiconductor storage device and method for manufacturing same 有权
    半导体存储装置及其制造方法

    公开(公告)号：US08563961B2

    公开(公告)日：2013-10-22

    申请号：US13515435

    申请日：2010-12-13

    申请人： Yoshitaka Sasago ,  Akio Shima ,  Satoru Hanzawa ,  Takashi Kobayashi ,  Masaharu Kinoshita ,  Norikastsu Takaura

    发明人： Yoshitaka Sasago ,  Akio Shima ,  Satoru Hanzawa ,  Takashi Kobayashi ,  Masaharu Kinoshita ,  Norikastsu Takaura

    IPC分类号： H01L47/00

    CPC分类号： H01L45/1666 ,  H01L27/224 ,  H01L27/2409 ,  H01L27/2454 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1206 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/1641 ,  H01L45/1675 ,  H01L45/1683

    摘要： Disclosed are a semiconductor storage device and a method for manufacturing the semiconductor storage device, whereby the bit cost of memory using a variable resistance material is reduced. The semiconductor storage device has: a substrate; a first word line (2) which is provided above the substrate; a first laminated body, which is disposed above the first word line (2), and which has the N+1 (N≧1) number of first inter-gate insulating layers (11-15) and the N number of first semiconductor layers (21p-24p) alternately laminated in the height direction of the substrate; a first bit line (3), which extends in the direction that intersects the first word line (2), and which is disposed above the laminated body; a first gate insulating layer (9) which is provided on the side surface of the N+1 number of the first inter-gate insulating layers (11-15) and those of the N number of the first semiconductor layers (21p-24p); a first channel layer (8p) which is provided on the side surface of the first gate insulating layer (9); and a first variable resistance material layer (7) which is provided on the side surface of the first channel layer. The first variable material layer (7) is in a region where the first word line (2) and the first bit line (3) intersect each other. Furthermore, a polysilicon diode (PD) is used as a selection element.

    摘要翻译： 公开了一种半导体存储装置和用于制造半导体存储装置的方法，由此降低了使用可变电阻材料的存储器的位成本。 半导体存储装置具有：基板; 设置在基板上方的第一字线（2） 第一层叠体，其设置在第一字线（2）的上方，并且具有N + 1（N> = 1）个第一栅极间绝缘层（11-15）和N个第一半导体 层（21p-24p）在基板的高度方向交替层叠; 第一位线（3），其在与所述第一字线（2）相交的方向上延伸，并且位于所述层叠体的上方; 设置在N + 1个第一栅极绝缘层（11-15）的侧表面和N个第一半导体层（21p-24p）的侧表面上的第一栅极绝缘层（9） ; 设置在第一栅极绝缘层（9）的侧面上的第一沟道层（8p）; 以及设置在第一沟道层的侧表面上的第一可变电阻材料层（7）。 第一可变材料层（7）在第一字线（2）和第一位线（3）彼此相交的区域中。 此外，使用多晶硅二极管（PD）作为选择元件。