Method of fabricating long wavelength vertical-cavity surface-emitting lasers
    1.
    发明授权
    Method of fabricating long wavelength vertical-cavity surface-emitting lasers 失效
    制造长波长垂直腔表面发射激光器的方法

    公开(公告)号:US06727109B2

    公开(公告)日:2004-04-27

    申请号:US10210668

    申请日:2002-07-31

    IPC分类号: H01L2100

    摘要: The present invention relates to a method of fabricating vertical-cavity surface emitting lasers being watched as a light source for long wavelength communication. The present invention includes forming a layer having a high resistance near the surface by implanting heavy ions such as silicon (Si), so that the minimum current injection diameter is made very smaller unlike implantation of a proton. Further, the present invention includes regrowing crystal so that current can flow the epi surface in parallel to significantly reduce the resistance up to the current injection part formed by silicon (Si) ions. Therefore, the present invention can not only effectively reduce the current injection diameter but also significantly reduce the resistance of a device to reduce generation of a heat. Further, the present invention can further improve dispersion of a heat using InP upon regrowth and thus improve the entire performance of the device.

    摘要翻译: 本发明涉及一种垂直腔表面发射激光器的制造方法,该激光器被视为用于长波长通信的光源。 本发明包括通过注入诸如硅(Si)的重离子在表面附近形成具有高电阻的层,使得最小电流注入直径不像植入质子那样非常小。 此外,本发明包括再生晶体,使得电流可以平行地流动外延表面,以显着降低直到由硅(Si)离子形成的电流注入部分的电阻。 因此,本发明不仅可以有效地降低电流注入直径,而且可以显着降低器件的电阻以减少发热。 此外,本发明可以进一步改善在再生后使用InP的散热分散,从而提高装置的整体性能。

    Semiconductor optical device having current-confined structure
    2.
    发明授权
    Semiconductor optical device having current-confined structure 有权
    具有限流结构的半导体光学器件

    公开(公告)号:US07394104B2

    公开(公告)日:2008-07-01

    申请号:US11698418

    申请日:2007-01-25

    IPC分类号: H01L27/15

    摘要: Provided is a semiconductor optical device having a current-confined structure. The device includes a first semiconductor layer of a first conductivity type which is formed on a semiconductor substrate and includes one or more material layers, a second semiconductor layer which is formed on the first semiconductor layer and includes one or more material layers, and a third semiconductor layer of a second conductivity type which is formed on the second semiconductor layer and includes one or more material layers. One or more layers among the first semiconductor layer, the second semiconductor, and the third semiconductor layer have a mesa structure. A lateral portion of at least one of the material layers constituting the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer is recessed, and the recess is partially or wholly filled with an oxide layer, a nitride layer or a combination of them. The semiconductor optical device having the current-confined region is mechanically reliable, highly thermally conductive, and commercially preferable and can be used in a wavelength range for optical communications.

    摘要翻译: 提供了具有限流结构的半导体光学器件。 该器件包括:第一导电类型的第一半导体层,其形成在半导体衬底上并且包括一个或多个材料层;第二半导体层,形成在第一半导体层上并包括一个或多个材料层;第三半导体层, 第二导电类型的半导体层,其形成在第二半导体层上并且包括一个或多个材料层。 第一半导体层,第二半导体和第三半导体层中的一层或多层具有台面结构。 构成第一半导体层,第二半导体层和第三半导体层的至少一个材料层的侧面部分被凹入,并且凹部被部分地或全部地填充有氧化物层,氮化物层或者 他们。 具有电流限制区域的半导体光学器件是机械可靠的,高导热性的,并且是商业上优选的,并且可以用于光通信的波长范围。

    Semiconductor optical device having current-confined structure

    公开(公告)号:US07230276B2

    公开(公告)日:2007-06-12

    申请号:US10699127

    申请日:2003-10-30

    IPC分类号: H01L27/15

    摘要: Provided is a semiconductor optical device having a current-confined structure. The device includes a first semiconductor layer of a first conductivity type which is formed on a semiconductor substrate and includes one or more material layers, a second semiconductor layer which is formed on the first semiconductor layer and includes one or more material layers, and a third semiconductor layer of a second conductivity type which is formed on the second semiconductor layer and includes one or more material layers. One or more layers among the first semiconductor layer, the second semiconductor, and the third semiconductor layer have a mesa structure. A lateral portion of at least one of the material layers constituting the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer is recessed, and the recess is partially or wholly filled with an oxide layer, a nitride layer or a combination of them. The semiconductor optical device having the current-confined region is mechanically reliable, highly thermally conductive, and commercially preferable and can be used in a wavelength range for optical communications.

    Method for fabricating multi-channel array optical device
    4.
    发明授权
    Method for fabricating multi-channel array optical device 有权
    制造多通道阵列光学器件的方法

    公开(公告)号:US06475818B1

    公开(公告)日:2002-11-05

    申请号:US09498507

    申请日:2000-02-04

    IPC分类号: G01R3126

    摘要: A method for fabricating a multi-channel array optical device having uniform spacing between different wavelengths and for having precise wavelengths by accomplishing wavelength adjustment and by the forming of mirror layers simultaneously through a multi-layer binary mask and a selective oxidization process. This method is especially useful for fabricating multi-channel array optical devices including multi-channel passive filters and multi-channel surface emitting laser arrays. The method includes forming a plurality of semiconductor mirror layers on a semiconductor substrate; forming an oxidization protective layer on the plurality of semiconductor mirror layers; selectively removing the oxidization protective layer by using a binary mask to expose the semiconductor mirror layer which will adjust a wavelength; oxidizing the exposed semiconductor mirror layer.

    摘要翻译: 一种通过实现波长调整和通过多层二进制掩模和选择性氧化过程同时形成镜层来制造具有不同波长之间具有均匀间隔并且具有精确波长的多通道阵列光学器件的方法。 该方法对于制造包括多通道无源滤波器和多通道表面发射激光器阵列的多通道阵列光学器件尤其有用。 该方法包括在半导体衬底上形成多个半导体镜层; 在所述多个半导体镜层上形成氧化保护层; 通过使用二元掩模选择性地去除氧化保护层以暴露将调节波长的半导体镜层; 氧化暴露的半导体镜层。

    Method and apparatus for modeling source-drain current of thin film transistor
    5.
    发明授权
    Method and apparatus for modeling source-drain current of thin film transistor 有权
    薄膜晶体管源漏电流建模方法及设备

    公开(公告)号:US08095343B2

    公开(公告)日:2012-01-10

    申请号:US12201457

    申请日:2008-08-29

    IPC分类号: G06F17/11

    CPC分类号: G06F17/5036

    摘要: Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT.

    摘要翻译: 提供了一种用于建模TFT的源极 - 漏极电流的方法和装置。 该方法包括接收样本数据,样本数据包括样本输入值和样本输出值; 根据样本数据调整建模变量; 根据调整后的建模变量计算当前模型值; 当所计算的当前模型值与样本输出值之间的差小于预定阈值时,通过将调整的建模变量应用于当前模型来拟合当前模型; 将实际输入数据应用于拟合的当前模型; 并输出与实际输入数据对应的结果值,其中当前模型是用于预测TFT的源极 - 漏极电流的模型。

    Silicon-based light emitting diode for enhancing light extraction efficiency and method of fabricating the same
    6.
    发明授权
    Silicon-based light emitting diode for enhancing light extraction efficiency and method of fabricating the same 有权
    用于提高光提取效率的硅基发光二极管及其制造方法

    公开(公告)号:US07772587B2

    公开(公告)日:2010-08-10

    申请号:US12096764

    申请日:2006-03-14

    IPC分类号: H01L29/06 H01L21/00

    摘要: Due to the indirect transition characteristic of silicon semiconductors, the light extraction efficiency of a silicon-based light emitting diode is lower than that of a compound semiconductor-based light emitting diode. For this reason, there are difficulties in practically using and commercializing silicon-based light emitting diodes developed so far. Provided is a silicon-based light emitting including: a substrate with a lower electrode layer on a lower surface thereof; a lower doped layer that is formed on an upper surface of the substrate and supplies carriers to an emitting layer; the emitting layer that is a silicon semiconductor layer including silicon quantum dots or nanodots formed on the lower doped layer and has a light-emitting characteristic; an upper doped layer that is formed on the emitting layer and supplies carriers to the emitting layer; an upper electrode layer formed on the upper doped layer; and a surface structure including a surface pattern formed on the upper electrode layer, a surface structure including an upper electrode pattern and an upper doped pattern formed by patterning the upper electrode layer and the upper doped layer, or a surface structure including the surface pattern, the upper electrode pattern, and upper doped pattern, wherein the surface structure enhances the light extraction efficiency of light emitted from the emitting layer according to geometric optics.

    摘要翻译: 由于硅半导体的间接跃迁特性,硅基发光二极管的光提取效率低于基于化合物半导体的发光二极管的光提取效率。 因此,实际上使用和商业化目前为止开发的硅基发光二极管存在困难。 本发明提供一种硅基发光体,具有:下表面具有下电极层的基板; 下部掺杂层,其形成在所述衬底的上表面上并将载体提供给发光层; 所述发光层是包含形成在所述下掺杂层上的硅量子点或纳米点的具有发光特性的硅半导体层; 上部掺杂层,其形成在所述发光层上并将载流子提供给所述发光层; 形成在上掺杂层上的上电极层; 以及包括形成在上电极层上的表面图案的表面结构,包括通过图案化上电极层和上掺杂层形成的上电极图案和上掺杂图案的表面结构,或包括表面图案的表面结构, 上电极图案和上掺杂图案,其中表面结构根据几何光学增强了从发光层发射的光的光提取效率。

    Schottky barrier tunnel single electron transistor and method of manufacturing the same
    8.
    发明授权
    Schottky barrier tunnel single electron transistor and method of manufacturing the same 有权
    肖特基势垒隧道单电子晶体管及其制造方法

    公开(公告)号:US07605065B2

    公开(公告)日:2009-10-20

    申请号:US11839704

    申请日:2007-08-16

    IPC分类号: H01L21/28 H01L21/44

    摘要: Provided are a Schottky barrier tunnel single electron transistor and a method of manufacturing the same that use a Schottky barrier formed between metal and semiconductor by replacing a source and a drain with silicide as a reactant of silicon and metal, instead of a conventional method of manufacturing a single electron transistor (SET) that includes source and drain regions by implanting dopants such that an artificial quantum dot is formed in a channel region. As a result, it does not require a conventional PADOX process to form a quantum dot for a single electron transistor (SET), height and width of a tunneling barrier can be artificially adjusted by using silicide materials that have various Schottky junction barriers, and it is possible to improve current driving capability of the single electron transistor (SET).

    摘要翻译: 提供了一种肖特基势垒隧道单电子晶体管及其制造方法,其替代传统的制造方法,而是用硅化物替代源极和漏极作为硅和金属的反应物,从而形成金属和半导体之间形成的肖特基势垒 单电子晶体管(SET),其通过注入掺杂剂而包括源极和漏极区域,使得在沟道区域中形成人造量子点。 结果,不需要传统的PADOX工艺来形成单电子晶体管(SET)的量子点,隧道势垒的高度和宽度可以通过使用具有各种肖特基结屏障的硅化物材料进行人工调整,而且 可以提高单电子晶体管(SET)的电流驱动能力。