摘要:
A stress detection circuit includes a function block and a detection signal generation circuit. The function block outputs a first voltage such that the first voltage is varied depending on an extent that the function block is stressed. The detection signal generation circuit generates a stress detection signal based on the first voltage and a second voltage during a test mode. The stress detection signal represents integration of the function block, and a level of the second voltage corresponds to a level of the first voltage before the function block is stressed.
摘要:
Provided is a time-domain voltage comparator including a voltage-time converter. The voltage-time converter includes a conversion unit and an output unit. The conversion unit includes a first MOS transistor which shifts a voltage level of the first detection node according to an external first voltage signal, and a second MOS transistor which shifts a voltage level of the second detection node according to an external second voltage signal. The output unit generates first and second output signals in response to voltages of the first and second detection nodes. The output unit determines a shifted time of the first output signal according to a voltage level of the first detection node and determines a shifted time of the second output signal according to a voltage level of the second detection node.
摘要:
A memory controller includes an I/O circuit, a read latency detector and a clock domain synchronizer. The I/O circuit transmits a first signal to a semiconductor memory device, receives a reflected signal returned from the semiconductor memory device, and delays the reflected signal in response to a delay selection signal to generate a second signal. The reflected signal is provided by reflection of the first signal from the semiconductor memory device. The read latency detector generates the first signal in response to a system clock signal, and generates a read latency signal in response to the system clock signal, a hold signal, and the second signal. The clock domain synchronizer generates the delay selection signal and the hold signal in response to the system clock signal and the second signal.
摘要翻译:存储器控制器包括I / O电路,读延迟检测器和时钟域同步器。 I / O电路将第一信号发送到半导体存储器件,接收从半导体存储器件返回的反射信号,并响应于延迟选择信号延迟反射信号以产生第二信号。 反射信号由来自半导体存储器件的第一信号的反射提供。 读延迟检测器响应于系统时钟信号产生第一信号,并且响应于系统时钟信号,保持信号和第二信号而产生读等待时间信号。 时钟域同步器响应于系统时钟信号和第二信号产生延迟选择信号和保持信号。
摘要:
A semiconductor device, a method related to the semiconductor device, and a printed circuit board are disclosed. The semiconductor device includes a chip, a package including a plurality of power voltage terminals and a plurality of ground voltage terminals, wherein the chip is disposed in the package. The semiconductor device further includes an impedance circuit connected between a DC component power voltage terminal and a ground voltage, wherein the DC component power voltage terminal is one of the plurality of power voltage terminals, and an AC component interrupter connected between the DC component power voltage terminal and a power voltage. Both the AC component and a DC component of the power voltage are applied to each of the power voltage terminals except the DC component second power voltage terminal, and the ground voltage is applied to each of the ground voltage terminals.
摘要:
This invention relates to a process for controlling the molecular weight distribution of high 1,4-cis polybutadiene and more particularly, to a process of easily controlling the molecular weight distribution of polybutadiene which is concerned directly with the physical properties such as processability, in such a manner that preparation of high 1,4-cis polybutadiene is made available via polymerization of 1,3-butadiene in the presence of Ziegler-Natta catalyst, adding carboxylic acid represented by following formula I for the controlling of the molecular weight distribution of polybutadiene based on the contents of carboxylic acid, may be easily controlled, without any alternation in the 1,4-cis contents. ##STR1## Wherein R is selected from the group consisting of alkyl, cycloalkyl and arylalkyl groups substituted or unsubstituted with at least one or more halogen atoms, or alkyl, cycloalkyl and arylalkyl groups with at least one or more double bonds containing from 5 to 20 carbon atoms.
摘要:
A transceiver for controlling a swing width of an output voltage includes a transmitter and a receiver for receiving an output voltage of a transmitter. The transmitter includes a first signal converter that outputs changed data generated by changing a voltage level of data in response to a mode control signal for selecting a test mode or a normal mode, an output voltage control circuit for controlling a voltage level of an output node of the transmitter in response to the changed data, and a first termination circuit for supplying a changed power supply voltage generated by changing a voltage level of a power supply voltage of the output node of the transmitter, or is turned off, in response to a test mode enable signal or the changed data. The receiver includes a second termination circuit that operates as a resistor having a resistance value that varies in response to the test mode enable signal or a test mode disable signal.
摘要:
An output circuit having a variable swing level of a terminated output data signal is disclosed. The output circuit includes a control circuit configured to generate a first control signal and a second control signal in response to a voltage swing level selection signal and an output enable signal. The output circuit further includes an output driving circuit configured to, in response to the first and second control signals, perform on-die termination in an input mode and configured to control swing level of a signal output from the output circuit in an output mode.
摘要:
A data transceiver system may include an error corrector. The error corrector may include a plurality of delay units, each delay unit being configured to delay a corresponding data signal among a plurality of data signals by a time in response to a corresponding delay code among a plurality of delay codes and outputting the delayed data signal, an error detector configured to receive the plurality of delay codes, determine whether an error has occurred, and output an error signal according to the determination in a data frame lock operation, and a delay controller configured to set initial values of the plurality of delay codes to a predetermined value, vary and output each of the plurality of delay codes in response to a lock signal, and reset initial values the plurality of delay codes in response to the error signal in the data frame lock operation.
摘要:
The present invention provides a method for preparing a copolymer useful for the manufacture of tires by coupling the ends of a living polymer, obtained from copolymerization of a diene monomers in the presence of an organolithium initiator and a hydrocarbon solvent, with a multi-reactive polysiloxane compound, and then completing the reaction or subsequently modifying the remaining uncoupled ends of the polymer with an amine compound. The use of the copolymer thus obtained for tire production improves the affinity to silica and greatly enhances the dynamic properties required for tires, such as wet traction and rolling resistance.
摘要:
A bubble error rejecter includes a cascade of front and rear voting sections for correcting bubble errors spanning multiple bits from interpolation. The front voting section generates first correction codes from first thermometer codes determined from preamplified signals. The rear voting section generates second correction codes from the first correction codes and second thermometer codes determined from interpolation of the preamplified signals.