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公开(公告)号:US09153462B2
公开(公告)日:2015-10-06
申请号:US12964097
申请日:2010-12-09
申请人: Yu-Liang Lin , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou
发明人: Yu-Liang Lin , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou
IPC分类号: H01L21/687 , H01L21/67
CPC分类号: H01L21/67051 , H01L21/68728
摘要: A device and system for thin wafer cleaning is disclosed. A preferred embodiment comprises a spin chuck having at least three holding clamps. A thin wafer with a wafer frame is mounted on the spin chuck through a tape layer. When the holding clamps are unlocked, there is no interference with the removal and placement of the wafer frame. On the other hand, when the holding clamps are locked, the holding clamps are brought into contact with the outer edge of the wafer frame so as to prevent the wafer frame from moving laterally. Furthermore, the shape of the holding clamps in a locked position is capable of preventing the wafer frame from moving vertically.
摘要翻译: 公开了用于薄晶片清洁的装置和系统。 优选实施例包括具有至少三个保持夹具的旋转卡盘。 具有晶片框架的薄晶片通过带层安装在旋转卡盘上。 当保持夹具解锁时,不会干扰晶片框架的移除和放置。 另一方面,当保持夹具被锁定时,保持夹具与晶片框架的外边缘接触,以防止晶片框架横向移动。 此外,保持夹具处于锁定位置的形状能够防止晶片框架垂直移动。
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公开(公告)号:US08722540B2
公开(公告)日:2014-05-13
申请号:US12841874
申请日:2010-07-22
申请人: Yu-Liang Lin , Weng-Jin Wu , Jing-Cheng Lin
发明人: Yu-Liang Lin , Weng-Jin Wu , Jing-Cheng Lin
IPC分类号: H01L21/302 , H01L21/461
CPC分类号: H01L21/6835 , H01L2221/68327 , H01L2221/6834
摘要: A method includes bonding a wafer on a carrier through an adhesive, and performing a thinning process on the wafer. After the step of performing the thinning process, a portion of the adhesive not covered by the wafer is removed, while the portion of the adhesive covered by the wafer is not removed.
摘要翻译: 一种方法包括通过粘合剂将晶片接合在载体上,并在晶片上进行稀化处理。 在进行稀化处理的步骤之后,去除未被晶片覆盖的粘合剂的一部分,同时由晶片覆盖的粘合剂部分未被除去。
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公开(公告)号:US20120145204A1
公开(公告)日:2012-06-14
申请号:US12964097
申请日:2010-12-09
申请人: Yu-Liang Lin , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou
发明人: Yu-Liang Lin , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou
CPC分类号: H01L21/67051 , H01L21/68728
摘要: A device and system for thin wafer cleaning is disclosed. A preferred embodiment comprises a spin chuck having at least three holding clamps. A thin wafer with a wafer frame is mounted on the spin chuck through a tape layer. When the holding clamps are unlocked, there is no interference with the removal and placement of the wafer frame. On the other hand, when the holding clamps are locked, the holding clamps are brought into contact with the outer edge of the wafer frame so as to prevent the wafer frame from moving laterally. Furthermore, the shape of the holding clamps in a locked position is capable of preventing the wafer frame from moving vertically.
摘要翻译: 公开了用于薄晶片清洁的装置和系统。 优选实施例包括具有至少三个保持夹具的旋转卡盘。 具有晶片框架的薄晶片通过带层安装在旋转卡盘上。 当保持夹具解锁时,不会干扰晶片框架的移除和放置。 另一方面,当保持夹具被锁定时,保持夹具与晶片框架的外边缘接触,以防止晶片框架横向移动。 此外,保持夹具处于锁定位置的形状能够防止晶片框架垂直移动。
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公开(公告)号:US09299594B2
公开(公告)日:2016-03-29
申请号:US12844113
申请日:2010-07-27
申请人: Yu-Liang Lin , Weng-Jin Wu , Jing-Cheng Lin
发明人: Yu-Liang Lin , Weng-Jin Wu , Jing-Cheng Lin
IPC分类号: H01L21/67 , H01L21/683 , H01L21/66 , H01L23/00 , H01L25/065
CPC分类号: H01L21/6835 , H01L21/67092 , H01L21/67109 , H01L21/6836 , H01L22/12 , H01L22/26 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/73 , H01L24/81 , H01L25/0652 , H01L2221/68327 , H01L2221/6834 , H01L2224/0401 , H01L2224/05009 , H01L2224/0557 , H01L2224/06181 , H01L2224/13 , H01L2224/13025 , H01L2224/131 , H01L2224/13147 , H01L2224/16146 , H01L2224/73204 , H01L2224/81005 , H01L2224/81191 , H01L2224/81192 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2225/06548 , H01L2924/00014 , H01L2924/14 , H01L2924/1461 , H01L2924/3511 , H01L2924/014 , H01L2224/81 , H01L2924/00 , H01L2224/05552
摘要: The embodiments described provide apparatus and methods for bonding wafers to carriers with the surface contours of plates facing the substrates or carriers are modified either by re-shaping, by using height adjusters, by adding shim(s), or by zoned temperature control. The modified surface contours of such plates compensate the effects that may cause the non-planarity of bonded substrates.
摘要翻译: 所描述的实施例提供了将晶片接合到载体上的装置和方法,其中面向基板或载体的板的表面轮廓通过重新成形,通过使用高度调节器,通过添加垫片或通过分区的温度控制来改变。 这种板的改进的表面轮廓补偿可能导致键合衬底的非平面性的影响。
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公开(公告)号:US20120021604A1
公开(公告)日:2012-01-26
申请号:US12841874
申请日:2010-07-22
申请人: Yu-Liang Lin , Weng-Jin Wu , Jing-Cheng Lin
发明人: Yu-Liang Lin , Weng-Jin Wu , Jing-Cheng Lin
IPC分类号: H01L21/306 , H01L21/302 , H01L21/3065
CPC分类号: H01L21/6835 , H01L2221/68327 , H01L2221/6834
摘要: A method includes bonding a wafer on a carrier through an adhesive, and performing a thinning process on the wafer. After the step of performing the thinning process, a portion of the adhesive not covered by the wafer is removed, while the portion of the adhesive covered by the wafer is not removed.
摘要翻译: 一种方法包括通过粘合剂将晶片接合在载体上,并在晶片上进行稀化处理。 在进行稀化处理的步骤之后,去除未被晶片覆盖的粘合剂的一部分,同时由晶片覆盖的粘合剂部分未被除去。
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公开(公告)号:US09418876B2
公开(公告)日:2016-08-16
申请号:US13224575
申请日:2011-09-02
申请人: Jing-Cheng Lin , Weng-Jin Wu , Shih Ting Lin , Cheng-Lin Huang , Szu Wei Lu , Shin-Puu Jeng , Chen-Hua Yu
发明人: Jing-Cheng Lin , Weng-Jin Wu , Shih Ting Lin , Cheng-Lin Huang , Szu Wei Lu , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: H01L21/00 , H01L21/56 , H01L21/683 , H01L25/065 , H01L23/00
CPC分类号: H01L21/78 , H01L21/561 , H01L21/563 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L24/16 , H01L25/0652 , H01L2221/68327 , H01L2224/16235 , H01L2224/73204 , H01L2224/81005 , H01L2224/81193 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2224/81
摘要: A method of fabricating a three-dimensional integrated circuit comprises attaching a wafer to a carrier, mounting a plurality of semiconductor dies on top of the wafer to form a wafer stack. The method further comprises forming a molding compound layer on top of the wafer, attaching the wafer stack to a tape frame and dicing the wafer stack to separate the wafer stack into a plurality of individual packages.
摘要翻译: 制造三维集成电路的方法包括将晶片附着到载体上,将多个半导体管芯安装在晶片的顶部上以形成晶片堆叠。 该方法还包括在晶片的顶部上形成模塑复合层,将晶片堆叠连接到胶带框架上,并切割晶片堆叠以将晶片堆叠分离成多个单独的封装。
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公开(公告)号:US08896136B2
公开(公告)日:2014-11-25
申请号:US12827563
申请日:2010-06-30
申请人: Chen-Yu Tsai , Shih-Hui Wang , Chien-Ming Chiu , Chia-Ho Chen , Fang Wen Tsai , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人: Chen-Yu Tsai , Shih-Hui Wang , Chien-Ming Chiu , Chia-Ho Chen , Fang Wen Tsai , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: H01L23/544 , H01L29/40 , H01L23/48 , H01L23/52 , H01L21/76 , H01L21/00 , H01L21/4763 , H01L21/44 , H01L21/683
CPC分类号: H01L23/481 , H01L21/30604 , H01L21/6835 , H01L21/76831 , H01L21/76877 , H01L21/76898 , H01L23/544 , H01L2221/68327 , H01L2223/54426 , H01L2224/13
摘要: In accordance with an embodiment, a structure comprises a substrate having a first area and a second area; a through substrate via (TSV) in the substrate penetrating the first area of the substrate; an isolation layer over the second area of the substrate, the isolation layer having a recess; and a conductive material in the recess of the isolation layer, the isolation layer being disposed between the conductive material and the substrate in the recess.
摘要翻译: 根据实施例,结构包括具有第一区域和第二区域的基板; 穿过基板的第一区域的贯穿基板通孔(TSV); 在所述衬底的所述第二区域上方的隔离层,所述隔离层具有凹部; 以及在所述隔离层的所述凹部中的导电材料,所述隔离层设置在所述凹部中的所述导电材料和所述基板之间。
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公开(公告)号:US08846499B2
公开(公告)日:2014-09-30
申请号:US12858211
申请日:2010-08-17
申请人: Ying-Ching Shih , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人: Ying-Ching Shih , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: H01L21/30
CPC分类号: G07F17/3213 , B32B17/10 , B32B37/1207 , B32B37/182 , B32B37/185 , B32B2457/14 , H01L21/6835 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381
摘要: A composite carrier structure for manufacturing semiconductor devices is provided. The composite carrier structure utilizes multiple carrier substrates, e.g., glass or silicon substrates, coupled together by interposed adhesive layers. The composite carrier structure may be attached to a wafer or a die for, e.g., backside processing, such as thinning processes. In an embodiment, the composite carrier structure comprises a first carrier substrate having through-substrate vias formed therethrough. The first substrate is attached to a second substrate using an adhesive such that the adhesive may extend into the through-substrate vias.
摘要翻译: 提供了一种用于制造半导体器件的复合载体结构。 复合载体结构利用多个载体衬底,例如玻璃或硅衬底,通过插入的粘合剂层耦合在一起。 复合载体结构可以附接到晶片或模具,用于例如背面处理,例如变薄处理。 在一个实施例中,复合载体结构包括具有贯穿其中形成的贯通基板通孔的第一载体基板。 使用粘合剂将第一衬底附接到第二衬底,使得粘合剂可以延伸到贯穿衬底通孔中。
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公开(公告)号:US20130056865A1
公开(公告)日:2013-03-07
申请号:US13224575
申请日:2011-09-02
申请人: Jing-Cheng Lin , Weng-Jin Wu , Shih Ting Lin , Cheng-Lin Huang , Szu Wei Lu , Shin-Puu Jeng , Chen-Hua Yu
发明人: Jing-Cheng Lin , Weng-Jin Wu , Shih Ting Lin , Cheng-Lin Huang , Szu Wei Lu , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: H01L21/78 , H01L23/498
CPC分类号: H01L21/78 , H01L21/561 , H01L21/563 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L24/16 , H01L25/0652 , H01L2221/68327 , H01L2224/16235 , H01L2224/73204 , H01L2224/81005 , H01L2224/81193 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2224/81
摘要: A method of fabricating a three-dimensional integrated circuit comprises attaching a wafer to a carrier, mounting a plurality of semiconductor dies on top of the wafer to form a wafer stack. The method further comprises forming a molding compound layer on top of the wafer, attaching the wafer stack to a tape frame and dicing the wafer stack to separate the wafer stack into a plurality of individual packages.
摘要翻译: 制造三维集成电路的方法包括将晶片附着到载体上,将多个半导体管芯安装在晶片的顶部上以形成晶片堆叠。 该方法还包括在晶片的顶部上形成模塑复合层,将晶片堆叠连接到胶带框架上,并切割晶片堆叠以将晶片堆叠分离成多个单独的封装。
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公开(公告)号:US20120045611A1
公开(公告)日:2012-02-23
申请号:US12858211
申请日:2010-08-17
申请人: Ying-Ching Shih , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人: Ying-Ching Shih , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号: H01L23/12 , B32B3/24 , B32B3/26 , B32B38/10 , H01L21/50 , B32B37/02 , B32B37/12 , B32B17/06 , B32B7/12
CPC分类号: G07F17/3213 , B32B17/10 , B32B37/1207 , B32B37/182 , B32B37/185 , B32B2457/14 , H01L21/6835 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381
摘要: A composite carrier structure for manufacturing semiconductor devices is provided. The composite carrier structure utilizes multiple carrier substrates, e.g., glass or silicon substrates, coupled together by interposed adhesive layers. The composite carrier structure may be attached to a wafer or a die for, e.g., backside processing, such as thinning processes. In an embodiment, the composite carrier structure comprises a first carrier substrate having through-substrate vias formed therethrough. The first substrate is attached to a second substrate using an adhesive such that the adhesive may extend into the through-substrate vias.
摘要翻译: 提供了一种用于制造半导体器件的复合载体结构。 复合载体结构利用多个载体衬底,例如玻璃或硅衬底,通过插入的粘合剂层耦合在一起。 复合载体结构可以附接到晶片或模具,用于例如背面处理,例如变薄处理。 在一个实施例中,复合载体结构包括具有贯穿其中形成的贯通基板通孔的第一载体基板。 使用粘合剂将第一衬底附接到第二衬底,使得粘合剂可以延伸到贯穿衬底通孔中。
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