利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

26 条记录 (耗时 0.019 秒)

    Method for metal gate N/P patterning
    3.
    发明授权
    Method for metal gate N/P patterning 有权
    金属栅极N / P图案化方法

    公开(公告)号：US08048810B2

    公开(公告)日：2011-11-01

    申请号：US12696252

    申请日：2010-01-29

    申请人： Fang Wen Tsai ,  Jim Cy Huang ,  Shun Wu Lin ,  Li-Shiun Chen ,  Kuang-Yuan Hsu

    发明人： Fang Wen Tsai ,  Jim Cy Huang ,  Shun Wu Lin ,  Li-Shiun Chen ,  Kuang-Yuan Hsu

    IPC分类号： H01L2/311

    CPC分类号： G03F7/20 ,  H01L21/28

    摘要： A method for fabricating a integrated circuit is disclosed. An exemplary method includes providing a substrate; forming a hard mask layer over the substrate; forming a patterned photoresist layer over the hard mask layer, such that portions of the hard mask layer are exposed; performing a dry etching process to remove the exposed portions of the hard mask layer; removing the patterned photoresist layer using at least one of a nitrogen plasma ashing and a hydrogen plasma ashing; and performing a wet etching process to remove remaining portions of the hard mask layer.

    摘要翻译： 公开了一种用于制造集成电路的方法。 一种示例性方法包括提供基底; 在衬底上形成硬掩模层; 在所述硬掩模层上形成图案化的光致抗蚀剂层，使得所述硬掩模层的部分被暴露; 执行干蚀刻工艺以去除硬掩模层的暴露部分; 使用氮等离子体灰化和氢等离子体灰化中的至少一种去除图案化的光致抗蚀剂层; 并进行湿式蚀刻处理以去除硬掩模层的剩余部分。

    METHOD FOR METAL GATE N/P PATTERNING
    4.
    发明申请
    METHOD FOR METAL GATE N/P PATTERNING 有权
    金属门N / P图案的方法

    公开(公告)号：US20110189847A1

    公开(公告)日：2011-08-04

    申请号：US12696252

    申请日：2010-01-29

    申请人： Fang Wen Tsai ,  Jim C.Y. Huang ,  Shun Wu Lin ,  Li-Shiun Chen ,  Kuang-Yuan Hsu

    发明人： Fang Wen Tsai ,  Jim C.Y. Huang ,  Shun Wu Lin ,  Li-Shiun Chen ,  Kuang-Yuan Hsu

    IPC分类号： H01L21/28 ,  G03F7/20

    CPC分类号： G03F7/20 ,  H01L21/28

    摘要： A method for fabricating a integrated circuit is disclosed. An exemplary method includes providing a substrate; forming a hard mask layer over the substrate; forming a patterned photoresist layer over the hard mask layer, such that portions of the hard mask layer are exposed; performing a dry etching process to remove the exposed portions of the hard mask layer; removing the patterned photoresist layer using at least one of a nitrogen plasma ashing and a hydrogen plasma ashing; and performing a wet etching process to remove remaining portions of the hard mask layer.

    摘要翻译： 公开了一种用于制造集成电路的方法。 一种示例性方法包括提供基底; 在衬底上形成硬掩模层; 在所述硬掩模层上形成图案化的光致抗蚀剂层，使得所述硬掩模层的部分被暴露; 执行干蚀刻工艺以去除硬掩模层的暴露部分; 使用氮等离子体灰化和氢等离子体灰化中的至少一种去除图案化的光致抗蚀剂层; 并进行湿式蚀刻处理以去除硬掩模层的剩余部分。

    REPLACEMENT GATE FinFET DEVICES AND METHODS FOR FORMING THE SAME
    5.
    发明申请
    REPLACEMENT GATE FinFET DEVICES AND METHODS FOR FORMING THE SAME 有权
    替换栅极FinFET器件及其形成方法

    公开(公告)号：US20110183508A1

    公开(公告)日：2011-07-28

    申请号：US12693504

    申请日：2010-01-26

    申请人： Bor-Wen Chan ,  Fang Wen Tsai

    发明人： Bor-Wen Chan ,  Fang Wen Tsai

    IPC分类号： H01L21/28

    CPC分类号： H01L29/66795 ,  H01L29/66545

    摘要： A structure and method for replacement metal gate technology is provided for use in conjunction with semiconductor fins or other devices. An opening is formed in a dielectric by removing a sacrificial gate material such as polysilicon. The surfaces of the semiconductor fin within which a transistor channel is formed, are exposed in the opening. A replacement metal gate is formed by forming a diffusion barrier layer within the opening and over a gate dielectric material, the diffusion barrier layer formation advantageously followed by an in-situ plasma treatment operation. The treatment operation utilizes at least one of argon and hydrogen and cures surface defects in the diffusion barrier layer enabling the diffusion barrier layer to be formed to a lesser thickness. The treatment operation decreases resistivity, densifies and alters the atomic ratio of the diffusion barrier layer, and is followed by metal deposition.

    摘要翻译： 提供了用于替代金属栅极技术的结构和方法，用于与半导体鳍片或其它器件结合使用。 通过去除诸如多晶硅的牺牲栅极材料在电介质中形成开口。 在其中形成晶体管沟道的半导体鳍片的表面在开口中露出。 通过在开口内部和栅极电介质材料上形成扩散阻挡层形成替代金属栅极，扩散阻挡层形成有利地进行原位等离子体处理操作。 处理操作利用氩和氢中的至少一种，并固化扩散阻挡层中的表面缺陷，使得扩散阻挡层能够形成较小的厚度。 处理操作降低电阻率，致密化并改变扩散阻挡层的原子比，随后进行金属沉积。

    DOUBLE TREATMENT ON HARD MASK FOR GATE N/P PATTERNING
    6.
    发明申请
    DOUBLE TREATMENT ON HARD MASK FOR GATE N/P PATTERNING 有权
    用于门盖N / P图案的硬掩模的双重处理

    公开(公告)号：US20100068875A1

    公开(公告)日：2010-03-18

    申请号：US12370276

    申请日：2009-02-12

    申请人： Matt Yeh ,  Fang Wen Tsai ,  Chi-Chun Chen

    发明人： Matt Yeh ,  Fang Wen Tsai ,  Chi-Chun Chen

    IPC分类号： H01L21/3205 ,  H01L21/311

    CPC分类号： H01L21/823842 ,  H01L21/32139 ,  H01L29/517 ,  H01L29/66545

    摘要： The present disclosure provides a method that includes providing a semiconductor substrate having a first region and a second region, forming first and second gate stacks over the first and second regions, respectively, the first and second gate stacks each including a dummy gate electrode, removing the dummy gate electrodes from the first and second gate stacks, respectively, thereby forming trenches, forming a metal layer to partially fill the trenches, forming an oxide layer over the metal layer filling a remaining portion of the trenches, applying a first treatment to the oxide layer, forming a patterned photoresist layer on the oxide layer overlying the first region, applying a second treatment to the oxide layer overlying the second region, etching the oxide layer overlying the second region, etching the first metal layer overlying the second region, removing the patterned photoresist layer, and removing the oxide layer overlying the first region.

    摘要翻译： 本公开提供了一种方法，其包括提供具有第一区域和第二区域的半导体衬底，分别在所述第一和第二区域上形成第一和第二栅极堆叠，所述第一和第二栅极堆叠各自包括伪栅电极，去除 分别从第一和第二栅极堆叠的虚拟栅电极，从而形成沟槽，形成金属层以部分地填充沟槽，在填充沟槽的剩余部分的金属层上形成氧化物层，对第一处理施加到 在覆盖第一区域的氧化物层上形成图案化的光致抗蚀剂层，对覆盖第二区域的氧化层施加第二处理，蚀刻覆盖第二区域的氧化物层，蚀刻覆盖第二区域的第一金属层，去除 图案化的光致抗蚀剂层，以及去除覆盖在第一区域上的氧化物层。

    Replacement gate FinFET devices and methods for forming the same
    10.
    发明授权
    Replacement gate FinFET devices and methods for forming the same 有权
    替代栅极FinFET器件及其形成方法

    公开(公告)号：US08513107B2

    公开(公告)日：2013-08-20

    申请号：US12693504

    申请日：2010-01-26

    申请人： Bor-Wen Chan ,  Fang Wen Tsai

    发明人： Bor-Wen Chan ,  Fang Wen Tsai

    IPC分类号： H01L21/3205 ,  H01L21/4763

    CPC分类号： H01L29/66795 ,  H01L29/66545

    摘要： A structure and method for replacement metal gate technology is provided for use in conjunction with semiconductor fins or other devices. An opening is formed in a dielectric by removing a sacrificial gate material such as polysilicon. The surfaces of the semiconductor fin within which a transistor channel is formed, are exposed in the opening. A replacement metal gate is formed by forming a diffusion barrier layer within the opening and over a gate dielectric material, the diffusion barrier layer formation advantageously followed by an in-situ plasma treatment operation. The treatment operation utilizes at least one of argon and hydrogen and cures surface defects in the diffusion barrier layer enabling the diffusion barrier layer to be formed to a lesser thickness. The treatment operation decreases resistivity, densifies and alters the atomic ratio of the diffusion barrier layer, and is followed by metal deposition.

    摘要翻译： 提供了用于替代金属栅极技术的结构和方法，用于与半导体鳍片或其它器件结合使用。 通过去除诸如多晶硅的牺牲栅极材料在电介质中形成开口。 在其中形成晶体管沟道的半导体鳍片的表面在开口中露出。 通过在开口内部和栅极电介质材料上形成扩散阻挡层形成替代金属栅极，扩散阻挡层形成有利地进行原位等离子体处理操作。 处理操作利用氩和氢中的至少一种，并固化扩散阻挡层中的表面缺陷，使得扩散阻挡层能够形成较小的厚度。 处理操作降低电阻率，致密化并改变扩散阻挡层的原子比，随后进行金属沉积。