公开(公告)号：US06580287B2

公开(公告)日：2003-06-17

申请号：US10099806

申请日：2002-03-13

申请人： Hsien-Wen Hsu ,  Yu-Shen Lin ,  Chun-Hsiung Hung ,  Ho-Chun Liou

发明人： Hsien-Wen Hsu ,  Yu-Shen Lin ,  Chun-Hsiung Hung ,  Ho-Chun Liou

IPC分类号： H03K19003

CPC分类号： H02M3/07

摘要： A voltage-boosting generator for reducing the effects due to operating voltage variation and temperature change. The generator comprises a delay line circuit and a voltage boosting circuit. The delay line circuit is used to perform a time delay according to an initial boosting signal and to produce a control signal. The voltage boosting circuit is used to boosted voltage according to the control signal.

摘要翻译： 一种电压升压发生器，用于降低由于工作电压变化和温度变化引起的影响。 发电机包括延迟线电路和升压电路。 延迟线电路用于根据初始升压信号执行时间延迟并产生控制信号。 升压电路根据控制信号用于升压。

公开(公告)号：US07149121B2

公开(公告)日：2006-12-12

申请号：US11043550

申请日：2005-01-26

申请人： Yu-Shen Lin ,  Hsien-Wen Hsu

发明人： Yu-Shen Lin ,  Hsien-Wen Hsu

IPC分类号： G11C16/06

CPC分类号： G11C16/349 ,  G11C16/10 ,  G11C16/16 ,  G11C16/3436

摘要： A nonvolatile memory array is associated with counting memory that stores data on a number of times a particular threshold state is reached in the associated nonvolatile memory. The aging physical characteristics of the nonvolatile memory can be compensated by adjusting the operating conditions of the nonvolatile memory. The operating conditions vary depending on the data stored in the counting memory.

摘要翻译： 非易失性存储器阵列与在相关联的非易失性存储器中达到特定阈值状态的次数存储数据的计数存储器相关联。 可以通过调整非易失性存储器的工作条件来补偿非易失性存储器的老化物理特性。 操作条件取决于存储在计数存储器中的数据。

公开(公告)号：US20060164887A1

公开(公告)日：2006-07-27

申请号：US11043550

申请日：2005-01-26

申请人： Yu-Shen Lin ,  Hsien-Wen Hsu

发明人： Yu-Shen Lin ,  Hsien-Wen Hsu

IPC分类号： G11C16/04

CPC分类号： G11C16/349 ,  G11C16/10 ,  G11C16/16 ,  G11C16/3436

摘要： A nonvolatile memory array is associated with counting memory that stores data on a number of times a particular threshold state is reached in the associated nonvolatile memory. The aging physical characteristics of the nonvolatile memory can be compensated by adjusting the operating conditions of the nonvolatile memory. The operating conditions vary depending on the data stored in the counting memory.

摘要翻译： 非易失性存储器阵列与在相关联的非易失性存储器中达到特定阈值状态的次数存储数据的计数存储器相关联。 可以通过调整非易失性存储器的工作条件来补偿非易失性存储器的老化物理特性。 操作条件取决于存储在计数存储器中的数据。

公开(公告)号：US08308596B2

公开(公告)日：2012-11-13

申请号：US12606774

申请日：2009-10-27

申请人： Der-Min Tsay ,  Hsin-Pao Chen ,  Hsien-Wen Hsu ,  Chih-Wei Huang

发明人： Der-Min Tsay ,  Hsin-Pao Chen ,  Hsien-Wen Hsu ,  Chih-Wei Huang

IPC分类号： F16H35/02 ,  F16H37/12

CPC分类号： F16H37/12 ,  F16H35/02 ,  Y10T74/19186

摘要： A transmission mechanism with intermittent output movement includes an output shaft rotatably mounted to first and second cams and a sun gear mounted to the output shaft. A first rocker includes a first planet gear meshed with the sun gear and first and second rollers rotatably mounted on opposite sides of the first planet gear and respectively in contact with the first and second cams. A second rocker includes a second planet gear meshed with the sun gear. An end of a first connecting rod is mounted to the first rocker. An end of a second connecting rod is mounted to the second rocker. Two ends of a link are rotatably mounted to the other ends of the first and second connecting rods. A planet gear carrier is mounted to an input shaft coaxial to the input shaft and includes an end rotatably mounted to the first rocker.

摘要翻译： 具有间歇输出运动的传动机构包括可旋转地安装到第一和第二凸轮的输出轴和安装到输出轴的太阳齿轮。 第一摇杆包括与太阳齿轮啮合的第一行星齿轮和可旋转地安装在第一行星齿轮的相对侧上且分别与第一和第二凸轮接触的第一和第二辊。 第二摇臂包括与太阳齿轮啮合的第二行星齿轮。 第一连杆的端部安装在第一摇臂上。 第二连杆的端部安装在第二摇臂上。 连杆的两端可旋转地安装在第一和第二连杆的另一端上。 行星齿轮架被安装到与输入轴同轴的输入轴上，并包括可旋转地安装到第一摇杆上的端部。

公开(公告)号：US20090039497A1

公开(公告)日：2009-02-12

申请号：US11933758

申请日：2007-11-01

申请人： Wen-Kun Yang ,  Hsien-Wen Hsu

发明人： Wen-Kun Yang ,  Hsien-Wen Hsu

IPC分类号： H01L23/48 ,  H01L21/00

CPC分类号： H01L23/3114 ,  H01L23/3157 ,  H01L23/562 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/01087

摘要： The present invention provides a semiconductor device package, comprising a die having a back surface and an active surface formed thereon; an adhesive layer formed on the back surface of the die; a protection substrate formed on the adhesive layer; and a plurality of bumps formed on the active surface of the die for electrically connection. The present invention further provides a method for forming a semiconductor device package, comprising providing a plurality of die having a back surface and an active surface on a wafer; forming an adhesive layer on the back surface of the die; forming a protection substrates on the adhesive layer; forming a plurality of bumps on the active surface of each die; and dicing the plurality of die into individual die for singulation.

公开(公告)号：US20080084759A1

公开(公告)日：2008-04-10

申请号：US11987240

申请日：2007-11-28

申请人： Chi-Ling Chu ,  Hsien-Wen Hsu ,  Jian-Yuan Shen

发明人： Chi-Ling Chu ,  Hsien-Wen Hsu ,  Jian-Yuan Shen

IPC分类号： G11C16/06

CPC分类号： G11C16/28 ,  G11C16/3418 ,  G11C16/3436

摘要： A nitride trapping memory device includes a comparator, a bias unit, a memory cell, a cycling cell, a compensation cell and a control unit. The comparator has a reference voltage. The bias unit is for outputting a bias voltage to the comparator, and the comparator outputs a bit value according to comparison of the bias voltage and the reference voltage. The memory cell is connected to the bias unit via a first switch. The cycling cell is connected to the bias unit via a second switch. The compensation cell is connected to the bias unit via a third switch. The control unit is for controlling the cycling cell and the compensation cell according to the bit value.

摘要翻译： 氮化物捕获存储器件包括比较器，偏置单元，存储单元，循环单元，补偿单元和控制单元。 比较器具有参考电压。 偏置单元用于向比较器输出偏置电压，并且比较器根据偏置电压和参考电压的比较输出位值。 存储单元经由第一开关连接到偏置单元。 循环电池通过第二开关连接到偏置单元。 补偿单元经由第三开关连接到偏置单元。 控制单元用于根据位值控制循环单元和补偿单元。

公开(公告)号：US20080029877A1

公开(公告)日：2008-02-07

申请号：US11869154

申请日：2007-10-09

申请人： Wen-Kun Yang ,  Chun Hui Yu ,  Jui-Hsien Chang ,  Hsien-Wen Hsu

发明人： Wen-Kun Yang ,  Chun Hui Yu ,  Jui-Hsien Chang ,  Hsien-Wen Hsu

IPC分类号： H01L23/48

CPC分类号： H01L23/562 ,  H01L21/78 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01094 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2924/00

摘要： The present invention provides a semiconductor device package singulation method. The method comprises printing a photo epoxy layer on the back surface of a substrate of a wafer for marking the scribe lines to be diced. Then etching is performed through the substrate along the marks in the photo epoxy layer. Dicing the panel into individual package with a typical art designing knife, the step not only avoids the roughness on the edge of each die, but also decrease the cost of singulation process.

摘要翻译： 本发明提供一种半导体器件封装分割方法。 该方法包括在晶片的基板的背面上印刷光环氧树脂层，以标记要切割的划线。 然后沿着光环氧树脂层中的标记通过基板进行蚀刻。 通过典型的美术设计刀将面板切割成单独的包装，该步骤不仅避免了每个模具边缘的粗糙度，而且降低了切割过程的成本。

公开(公告)号：US07262999B2

公开(公告)日：2007-08-28

申请号：US10997114

申请日：2004-11-24

申请人： Jian-Yuan Shen ,  Hsien-Wen Hsu ,  Chi-Ling Chu

发明人： Jian-Yuan Shen ,  Hsien-Wen Hsu ,  Chi-Ling Chu

IPC分类号： G11C16/06 ,  G11C16/04

CPC分类号： G11C16/349 ,  G11C16/0475

摘要： An ultra cycling nitride read only memory (NROM) device is coupled to a NROM array such that both bits of the ultra cycling NROM device will be erased when all NROM devices of the NROM array are erased. The ultra cycling NROM device is then programmed at its right bit. A threshold voltage difference will be obtained for the ultra cycling NROM device for the un-programmed left bit. Next, a cycling number is obtained based on the threshold voltage difference for the ultra cycling NROM device. A threshold voltage shift can be found based on the cycling number for the NROM array. Finally, an erase voltage will be calculated according to the threshold voltage shift for the NROM array. If the NROM array is programmed again, the erase voltage will be applied to un-programmed NROM devices of the NROM array to further reduce the threshold voltages.

摘要翻译： 超循环氮化物只读存储器（NROM）器件耦合到NROM阵列，使得当NROM阵列的所有NROM器件被擦除时，超循环NROM器件的两个位将被擦除。 然后在其右侧编程超循环NROM设备。 对于非编程左位的超循环NROM器件，将获得阈值电压差。 接下来，基于超循环NROM装置的阈值电压差来获得循环次数。 可以基于NROM阵列的循环次数找到阈值电压偏移。 最后，将根据NROM阵列的阈值电压偏移计算擦除电压。 如果NROM阵列再次被编程，则擦除电压将被施加到NROM阵列的未编程的NROM器件，以进一步降低阈值电压。

公开(公告)号：US08269444B2

公开(公告)日：2012-09-18

申请号：US12755414

申请日：2010-04-06

申请人： Chien-Chung Tseng ,  Hsien-Wen Hsu ,  Chien-Jen Hsieh

发明人： Chien-Chung Tseng ,  Hsien-Wen Hsu ,  Chien-Jen Hsieh

IPC分类号： H02P6/00 ,  H02P6/18

CPC分类号： H02P6/182

摘要： A system and a method for controlling a sensorless motor are disclosed, where the system includes a motor driver and a zero-crossing detector. The motor driver can drive the sensorless motor. The zero-crossing detector can detect a zero-crossing point when the voltage of one motor coil of the sensorless motor is in a blanking period.

摘要翻译： 公开了一种用于控制无传感器电动机的系统和方法，其中系统包括电动机驱动器和过零检测器。 电机驱动器可以驱动无传感器电机。 当无传感器电机的一个电机线圈的电压处于消隐期间时，过零检测器可以检测过零点。

公开(公告)号：US07525185B2

公开(公告)日：2009-04-28

申请号：US11725827

申请日：2007-03-19

申请人： Wen-Kun Yang ,  Diann-Fang Lin ,  Tung-Chuan Wang ,  Hsien-Wen Hsu ,  Chih-Ming Chen

发明人： Wen-Kun Yang ,  Diann-Fang Lin ,  Tung-Chuan Wang ,  Hsien-Wen Hsu ,  Chih-Ming Chen

IPC分类号： H01L23/02

CPC分类号： H01L23/3128 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a semiconductor device package having multi-chips with side-by-side configuration comprising a substrate with die receiving through holes, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. A first die having first bonding pads and a second die having second bonding pads are respectively disposed within the die receiving through holes. The first adhesion material is formed under the first and second die and the substrate, and the second adhesion material is filled in the gap between the first and second die and sidewall of the die receiving though holes of the substrate. Further, bonding wires are formed to couple between the first bonding pads and the first contact pads, between the second bonding pads and the first contact pads. A dielectric layer is formed on the bonding wires, the first and second die and the substrate. A build up layer is form on the lower surface of substrate and the back side of first and second die.

摘要翻译： 本发明提供一种具有并排配置的多芯片的半导体器件封装，包括：具有通孔的基板，其中，所述基板具有通孔，连接通孔结构和上表面上的第一接触焊盘;以及第二接触焊盘， 基质。 具有第一接合焊盘的第一管芯和具有第二接合焊盘的第二管芯分别设置在管芯接收通孔内。 第一粘合材料形成在第一模具和第二模具和基板之下，并且第二粘合材料填充在第一和第二模具之间的间隙中以及接收基板的贯穿孔的模具的侧壁。 此外，形成接合线以在第二接合焊盘和第一接触焊盘之间在第一接合焊盘和第一接触焊盘之间耦合。 在接合线，第一和第二管芯和基板上形成介电层。 在基板的下表面和第一和第二模具的背面上形成堆积层。