公开(公告)号：US20100117073A1

公开(公告)日：2010-05-13

申请号：US12612021

申请日：2009-11-04

申请人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Tetsunori MARUYAMA ,  Yuki IMOTO ,  Yuji ASANO ,  Junichi KOEZUKA

发明人： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Tetsunori MARUYAMA ,  Yuki IMOTO ,  Yuji ASANO ,  Junichi KOEZUKA

IPC分类号： H01L29/786 ,  H01L21/34

CPC分类号： H01L29/66742 ,  C04B35/58 ,  C04B2235/3284 ,  C04B2235/3286 ,  H01L27/1225 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869

摘要： In a thin film transistor which uses an oxide semiconductor, buffer layers containing indium, gallium, zinc, oxygen, and nitrogen are provided between the oxide semiconductor layer and the source and drain electrode layers.

摘要翻译： 在使用氧化物半导体的薄膜晶体管中，在氧化物半导体层和源极和漏极电极层之间设置包含铟，镓，锌，氧和氮的缓冲层。

公开(公告)号：US20100109058A1

公开(公告)日：2010-05-06

申请号：US12609032

申请日：2009-10-30

申请人： Junichiro SAKATA ,  Tetsunori MARUYAMA ,  Yuki IMOTO ,  Yuji ASANO ,  Junichi KOEZUKA

发明人： Junichiro SAKATA ,  Tetsunori MARUYAMA ,  Yuki IMOTO ,  Yuji ASANO ,  Junichi KOEZUKA

IPC分类号： H01L29/78 ,  H01B1/06 ,  B05D5/12 ,  C23C14/34

CPC分类号： C23C14/5846 ,  C04B35/58 ,  C04B2235/3284 ,  C04B2235/3286 ,  C23C14/0057 ,  C23C14/0676 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869

摘要： An electrode formed using a transparent conductive oxide is likely to be crystallized by heat treatment performed in the manufacturing process of a semiconductor device. In the case of a thin film element using an electrode having a significantly uneven surface due to crystallization, a short circuit is likely to occur and thus reliability of the element is degraded. An object is to provide a light-transmitting conductive oxynitride which is not crystallized even if subjected to heat treatment and a manufacturing method thereof. It is found that an oxynitride containing indium, gallium, and zinc, to which hydrogen atoms are added as impurities, is a light-transmitting conductive film which is not crystallized even if heated at 350° C. and the object is achieved.

摘要翻译： 使用透明导电氧化物形成的电极可能通过在半导体器件的制造过程中进行的热处理而结晶化。 在使用由于结晶而具有显着不平坦表面的电极的薄膜元件的情况下，可能发生短路，因此元件的可靠性降低。 本发明的目的是提供即使经受热处理也不结晶的透光导电氮氧化物及其制造方法。 发现含有氢原子作为杂质的含有铟，镓和锌的氮氧化物是透光性导电膜，即使在350℃下加热也不会结晶，实现了目的。

公开(公告)号：US20100301329A1

公开(公告)日：2010-12-02

申请号：US12787813

申请日：2010-05-26

申请人： Yuji ASANO ,  Junichi KOEZUKA

发明人： Yuji ASANO ,  Junichi KOEZUKA

IPC分类号： H01L29/786 ,  H01L21/36

CPC分类号： H01L29/66969 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/02667 ,  H01L21/465 ,  H01L21/47635 ,  H01L21/477 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

摘要： An object is to provide a thin film transistor using an oxide semiconductor layer, in which contact resistance between the oxide semiconductor layer and source and drain electrode layers is reduced and electric characteristics are stabilized. Another object is to provide a method for manufacturing the thin film transistor. A thin film transistor using an oxide semiconductor layer is formed in such a manner that buffer layers having higher conductivity than the oxide semiconductor layer are formed over the oxide semiconductor layer, source and drain electrode layers are formed over the buffer layers, and the oxide semiconductor layer is electrically connected to the source and drain electrode layers with the buffer layers interposed therebetween. In addition, the buffer layers are subjected to reverse sputtering treatment and heat treatment in a nitrogen atmosphere, whereby the buffer layers having higher conductivity than the oxide semiconductor layer are obtained.

摘要翻译： 目的是提供一种使用氧化物半导体层的薄膜晶体管，其中氧化物半导体层和源极和漏极电极层之间的接触电阻减小并且电特性稳定。 另一个目的是提供制造薄膜晶体管的方法。 使用氧化物半导体层的薄膜晶体管形成为在氧化物半导体层上形成具有比氧化物半导体层更高的导电性的缓冲层，在缓冲层上形成源极和漏极层，并且氧化物半导体 层与源极和漏极电极层电连接，缓冲层插入其间。 此外，缓冲层在氮气气氛中进行反溅射处理和热处理，由此获得具有比氧化物半导体层更高的导电性的缓冲层。

公开(公告)号：US20100252832A1

公开(公告)日：2010-10-07

申请号：US12748521

申请日：2010-03-29

申请人： Yuji ASANO ,  Junichi KOEZUKA

发明人： Yuji ASANO ,  Junichi KOEZUKA

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/66969 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/477 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/7869 ,  H01L29/78696

摘要： An object is to provide a thin film transistor using an oxide semiconductor layer, in which contact resistance between the oxide semiconductor layer and source and drain electrode layers is reduced and electric characteristics are stabilized. The thin film transistor is formed in such a manner that a buffer layer including a high-resistance region and low-resistance regions is formed over an oxide semiconductor layer, and the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the low-resistance region of the buffer layer interposed therebetween.

摘要翻译： 目的是提供一种使用氧化物半导体层的薄膜晶体管，其中氧化物半导体层和源极和漏极电极层之间的接触电阻减小并且电特性稳定。 薄膜晶体管形成为在氧化物半导体层上形成包括高电阻区域和低电阻区域的缓冲层，并且氧化物半导体层和源极和漏极电极层彼此接触 其中缓冲层的低电阻区域插入其间。

公开(公告)号：US20100252827A1

公开(公告)日：2010-10-07

申请号：US12748520

申请日：2010-03-29

申请人： Yuji ASANO ,  Junichi KOEZUKA

发明人： Yuji ASANO ,  Junichi KOEZUKA

IPC分类号： H01L29/786 ,  H01L21/34

CPC分类号： H01L29/7869 ,  C04B35/58 ,  C04B2235/3284 ,  C04B2235/3286 ,  H01L27/1225 ,  H01L29/66969 ,  H01L29/78618

摘要： An object is to provide a thin film transistor including an oxide semiconductor layer, in which the contact resistance between the oxide semiconductor layer and source and drain electrode layers is reduced and whose electric characteristics are stabilized. Another object is to provide a method for manufacturing the thin film transistor. The thin film transistor including an oxide semiconductor layer is formed in such a manner that buffer layers whose conductivity is higher than that of the oxide semiconductor layer are formed and the oxide semiconductor layer and the source and drain electrode layers are electrically connected to each other through the buffer layers. In addition, the buffer layers whose conductivity is higher than that of the oxide semiconductor layer are subjected to reverse sputtering treatment and heat treatment in a nitrogen atmosphere.

摘要翻译： 目的是提供一种薄膜晶体管，其包括氧化物半导体层，其中氧化物半导体层与源极和漏极电极层之间的接触电阻降低并且其电特性稳定。 另一个目的是提供制造薄膜晶体管的方法。 包括氧化物半导体层的薄膜晶体管形成为形成电导率高于氧化物半导体层的缓冲层的方式，并且氧化物半导体层和源极和漏极电极层通过 缓冲层。 此外，在氮气气氛中对导电率高于氧化物半导体层的缓冲层进行反溅射处理和热处理。

公开(公告)号：US20100163874A1

公开(公告)日：2010-07-01

申请号：US12641446

申请日：2009-12-18

申请人： Jun KOYAMA ,  Junichiro SAKATA ,  Tetsunori MARUYAMA ,  Yuki IMOTO ,  Yuji ASANO ,  Junichi KOEZUKA

发明人： Jun KOYAMA ,  Junichiro SAKATA ,  Tetsunori MARUYAMA ,  Yuki IMOTO ,  Yuji ASANO ,  Junichi KOEZUKA

IPC分类号： H01L27/06

CPC分类号： H01L27/1255 ,  H01L27/12 ,  H01L27/1225 ,  H01L27/127 ,  H01L28/20 ,  H01L29/24 ,  H01L29/78606 ,  H01L29/7869

摘要： The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.

摘要翻译： 通过使用含有氢化合物如硅烷（SiH 4）和氨（NH 3）的气体的等离子体CVD形成的氮化硅层910设置在与用于电阻器354的氧化物半导体层905上并直接接触，并且氮化硅 在用于薄膜晶体管355的氧化物半导体层906上设置层910，氧化硅层909用作阻挡层。 因此，与氧化物半导体层906相比，在氧化物半导体层905中引入更高浓度的氢。结果，使用于电阻器354的氧化物半导体层905的电阻比氧化物半导体层的电阻低 906用于薄膜晶体管355。

公开(公告)号：US20110266654A1

公开(公告)日：2011-11-03

申请号：US13088592

申请日：2011-04-18

申请人： Kazutaka KURIKI ,  Mikio YUKAWA ,  Yuji ASANO

发明人： Kazutaka KURIKI ,  Mikio YUKAWA ,  Yuji ASANO

IPC分类号： H01L29/02 ,  H01L21/02

CPC分类号： H01M4/386 ,  C30B25/005 ,  C30B29/06 ,  C30B29/62 ,  C30B33/02 ,  H01G11/06 ,  H01G11/22 ,  H01G11/26 ,  H01G11/28 ,  H01G11/30 ,  H01G11/46 ,  H01G11/50 ,  H01G11/68 ,  H01G11/70 ,  H01L21/02532 ,  H01L21/02587 ,  H01L21/0262 ,  H01L28/82 ,  H01M4/0428 ,  H01M4/134 ,  H01M4/1395 ,  H01M4/382 ,  H01M4/661 ,  H01M4/667 ,  H01M10/0525 ,  H01M10/0569 ,  H01M10/0583 ,  H01M12/08 ,  H01M2300/0037 ,  Y02E60/13 ,  Y02P70/54 ,  Y02T10/7011 ,  Y02T10/7022

摘要： Provided is a method for manufacturing a power storage device in which a crystalline silicon layer including a whisker-like crystalline silicon region is formed as an active material layer over a current collector by a low-pressure CVD method in which heating is performed using a deposition gas containing silicon. The power storage device includes the current collector, a mixed layer formed over the current collector, and the crystalline silicon layer functioning as the active material layer formed over the mixed layer. The crystalline silicon layer includes a crystalline silicon region and a whisker-like crystalline silicon region including a plurality of protrusions which project over the crystalline silicon region. With the protrusions, the surface area of the crystalline silicon layer functioning as the active material layer can be increased.

摘要翻译： 提供一种蓄电装置的制造方法，其中通过低压CVD法在集电体上形成包括晶须状结晶硅区域的结晶硅层作为活性物质层，其中使用沉积物进行加热 含硅气体。 蓄电装置包括集电体，在集电体上形成的混合层，以及用作在混合层上形成的活性物质层的结晶硅层。 晶体硅层包括晶体硅区域和晶须状结晶硅区域，其包括在晶体硅区域上突出的多个突起。 利用突起，可以增加用作活性物质层的结晶硅层的表面积。

公开(公告)号：US20120132902A1

公开(公告)日：2012-05-31

申请号：US13295469

申请日：2011-11-14

申请人： Yuki IMOTO ,  Yuji ASANO ,  Tetsunori MARUYAMA

发明人： Yuki IMOTO ,  Yuji ASANO ,  Tetsunori MARUYAMA

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/7869 ,  H01L21/823456 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/66742 ,  H01L29/66969 ,  H01L51/0554

摘要： A normally-off transistor having an oxide semiconductor layer in a channel formation layer is provided. The transistor comprises: a first oxide semiconductor layer functioning as a channel formation region; a source electrode layer and a drain electrode layer which overlap with the first oxide semiconductor layer; a gate insulating layer which is provided over and in contact with the first oxide semiconductor layer, the source electrode layer, and the drain electrode layer; a second oxide semiconductor layer which is provided over and in contact with the gate insulating layer and overlaps with the first oxide semiconductor layer; and a gate electrode layer provided over the second oxide semiconductor layer. A manufacturing method thereof is also disclosed.

摘要翻译： 提供了在通道形成层中具有氧化物半导体层的常关晶体管。 晶体管包括：用作沟道形成区域的第一氧化物半导体层; 源极电极层和与第一氧化物半导体层重叠的漏电极层; 栅极绝缘层，设置在第一氧化物半导体层上，与源极电极层和漏极电极层接触; 第二氧化物半导体层，设置在栅极绝缘层上并与栅极绝缘层接触并与第一氧化物半导体层重叠; 以及设置在所述第二氧化物半导体层上的栅电极层。 还公开了其制造方法。