公开(公告)号：US07785929B2

公开(公告)日：2010-08-31

申请号：US12054682

申请日：2008-03-25

申请人： Zigmund Ramirez Camacho ,  Abelardo Jr. Hadap Advincula ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Abelardo Jr. Hadap Advincula ,  Henry Descalzo Bathan ,  Lionel Chien Hui Tay

IPC分类号： H01L21/44

CPC分类号： H01L23/49575 ,  H01L23/3135 ,  H01L23/49537 ,  H01L23/49551 ,  H01L24/48 ,  H01L24/49 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： The present invention provides a mountable integrated circuit package system comprising: providing an inner integrated circuit package including a first external interconnect having a shoulder; connecting an intraconnect between a second external interconnect and the shoulder; and forming an outer encapsulation over the inner integrated circuit package, the intraconnect, and partially exposing the first external interconnect on a top encapsulation side of the outer encapsulation and the second external interconnect on a bottom encapsulation side of the outer encapsulation.

摘要翻译： 本发明提供一种可安装的集成电路封装系统，包括：提供内部集成电路封装，其包括具有肩部的第一外部互连; 连接第二外部互连和肩部之间的连接; 以及在所述内部集成电路封装上形成外部封装，在所述外部封装的底部封装侧上将所述外部封装的顶部封装侧上的所述第一外部互连和所述第二外部互连部分地暴露于所述第一外部互连。

公开(公告)号：US08957515B2

公开(公告)日：2015-02-17

申请号：US11936516

申请日：2007-11-07

申请人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Abelardo Jr. Hadap Advincula ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Abelardo Jr. Hadap Advincula ,  Lionel Chien Hui Tay

IPC分类号： H01L23/48 ,  H01L23/495 ,  H01L21/48 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L23/49548 ,  H01L21/4832 ,  H01L23/3107 ,  H01L23/49541 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit package system includes: forming an array of external interconnects with an intersecting region between the external interconnects; removing the intersecting region for forming an isolation hole between the external interconnects; mounting an integrated circuit die over the external interconnects; connecting an internal interconnect between the integrated circuit die and the external interconnects; and forming a package encapsulation over the integrated circuit die with the external interconnects partially exposed.

摘要翻译： 集成电路封装系统包括：形成具有外部互连之间的相交区域的外部互连阵列; 去除用于在外部互连之间形成隔离孔的交叉区域; 在外部互连上安装集成电路管芯; 连接集成电路管芯和外部互连件之间的内部互连; 以及在所述集成电路管芯上形成封装封装，所述外部互连部分露出。

公开(公告)号：US09059074B2

公开(公告)日：2015-06-16

申请号：US12055526

申请日：2008-03-26

申请人： Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan ,  Abelardo Jr. Hadap Advincula

发明人： Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan ,  Abelardo Jr. Hadap Advincula

IPC分类号： H01L23/02 ,  H01L23/00 ,  H01L21/56 ,  H01L21/683 ,  H01L23/31 ,  H01L23/495 ,  H01L29/04

CPC分类号： H01L24/19 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/49524 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/24247 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00

摘要： An integrated circuit package system includes: mounting an integrated circuit die adjacent to a lead; forming a first encapsulation around and exposing the integrated circuit die and the lead; and forming a planar interconnect between the integrated circuit die and the lead with the planar interconnect on the first encapsulation.

摘要翻译： 集成电路封装系统包括：将集成电路模具安装在与引线相邻的位置; 围绕并暴露集成电路管芯和引线而形成第一封装; 以及在所述第一封装上利用所述平面互连件在所述集成电路管芯和所述引线之间形成平面互连。

公开(公告)号：US08258614B2

公开(公告)日：2012-09-04

申请号：US11938371

申请日：2007-11-12

申请人： Zigmund Ramirez Camacho ,  Jairus Legaspi Pisigan ,  Abelardo Jr. Hadap Advincula ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Jairus Legaspi Pisigan ,  Abelardo Jr. Hadap Advincula ,  Lionel Chien Hui Tay

IPC分类号： H01L23/06

CPC分类号： H01L25/03 ,  H01L21/561 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/05553 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An integrated circuit package system comprising: providing a substrate having a cavity; sealing a package over the cavity of the substrate; and forming an encapsulant over the package and a portion of the substrate substantially preventing the encapsulant from forming in the cavity.

摘要翻译： 一种集成电路封装系统，包括：提供具有空腔的衬底; 将封装密封在衬底的空腔上; 以及在所述封装上形成密封剂，并且所述衬底的一部分基本上防止所述密封剂在所述空腔中形成。

公开(公告)号：US08115287B2

公开(公告)日：2012-02-14

申请号：US12635699

申请日：2009-12-10

申请人： Zigmund Ramirez Camacho ,  Abelardo Jr. Hadap Advincula ,  Erwin Aguas Sangalang ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Abelardo Jr. Hadap Advincula ,  Erwin Aguas Sangalang ,  Lionel Chien Hui Tay

IPC分类号： H01L23/495

CPC分类号： H01L24/32 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/29 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A method of manufacture of an integrated circuit packaging system includes: forming outer leads having outer terminal sections, the outer terminal sections having an upper terminal and a bottom terminal; forming inner leads having inner terminal sections wider than a distance between the outer terminal sections of the outer leads, and the inner terminal sections have an upper terminal and a bottom terminal; connecting an integrated circuit to the inner leads and the outer leads; and encapsulating the integrated circuit, the inner leads, and the outer leads with an encapsulation while leaving the upper terminals and the bottom terminals of the outer terminal sections and the upper terminals and bottom terminals of the inner terminal sections exposed from the encapsulation.

摘要翻译： 一种集成电路封装系统的制造方法，包括：形成具有外端子部的外引线，所述外端子部具有上端子和底端; 形成具有比所述外引线的外端子部分的间隔宽的内端子部的内引线，所述内端子部具有上端子和底端子; 将集成电路连接到内引线和外引线; 并且封装集成电路，内部引线和外部引线，同时使外部端子部分的上部端子和底部端子以及内部端子部分的上部端子和底部端子从封装露出。

公开(公告)号：US20100140789A1

公开(公告)日：2010-06-10

申请号：US12331416

申请日：2008-12-09

申请人： Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Zigmund Ramirez Camacho ,  Abelardo Jr. Hadap Advincula

发明人： Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Zigmund Ramirez Camacho ,  Abelardo Jr. Hadap Advincula

IPC分类号： H01L23/495 ,  H01L21/00

CPC分类号： H01L23/49548 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/4952 ,  H01L23/49531 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/05553 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/06568 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a lead; mounting an inner package so that the lead is peripheral to the inner package, and the inner package having a connection pad; forming an exposed terminal interconnect on the connection pad; and encapsulating the inner package, and partially encapsulating the exposed terminal interconnect with an encapsulation.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供引线; 安装内部封装，使得引线是内部封装的周边，并且内部封装具有连接焊盘; 在连接焊盘上形成暴露的端子互连; 并封装内部封装，并用封装部分地封装暴露的端子互连。

公开(公告)号：US20110140252A1

公开(公告)日：2011-06-16

申请号：US12635699

申请日：2009-12-10

申请人： Zigmund Ramirez Camacho ,  Abelardo Jr. Hadap Advincula ,  Erwin Aguas Sangalang ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Abelardo Jr. Hadap Advincula ,  Erwin Aguas Sangalang ,  Lionel Chien Hui Tay

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L24/32 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/29 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A method of manufacture of an integrated circuit packaging system includes: forming outer leads having outer terminal sections, the outer terminal sections having an upper terminal and a bottom terminal; forming inner leads having inner terminal sections wider than a distance between the outer terminal sections of the outer leads, and the inner terminal sections have an upper terminal and a bottom terminal; connecting an integrated circuit to the inner leads and the outer leads; and encapsulating the integrated circuit, the inner leads, and the outer leads with an encapsulation while leaving the upper terminals and the bottom terminals of the outer terminal sections and the upper terminals and bottom terminals of the inner terminal sections exposed from the encapsulation.

摘要翻译： 一种集成电路封装系统的制造方法，包括：形成具有外端子部的外引线，所述外端子部具有上端子和底端; 形成具有比所述外引线的外端子部分的间隔宽的内端子部的内引线，所述内端子部具有上端子和底端子; 将集成电路连接到内引线和外引线; 并且封装集成电路，内部引线和外部引线，同时使外部端子部分的上部端子和底部端子以及内部端子部分的上部端子和底部端子从封装露出。

公开(公告)号：US08067825B2

公开(公告)日：2011-11-29

申请号：US11863700

申请日：2007-09-28

申请人： Abelardo Jr. Hadap Advincula ,  Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Jairus Legaspi Pisigan

发明人： Abelardo Jr. Hadap Advincula ,  Zigmund Ramirez Camacho ,  Henry Descalzo Bathan ,  Jairus Legaspi Pisigan

IPC分类号： H01L23/495

CPC分类号： H01L23/49575 ,  H01L23/49503 ,  H01L24/28 ,  H01L24/29 ,  H01L24/31 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/05554 ,  H01L2224/2919 ,  H01L2224/29288 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit package system includes providing die; forming leads adjacent the die; forming a die paddle adjacent the leads with the die thereover; and forming a cavity for isolating one of the die and a die attach segment of the die paddle.

摘要翻译： 集成电路封装系统包括提供裸片; 在模具附近形成引线; 在其上与模具形成邻近引线的芯片; 以及形成用于隔离所述管芯和所述管芯焊盘的管芯附接部分中的一个的腔。