公开(公告)号：US20100225369A1

公开(公告)日：2010-09-09

申请号：US12278269

申请日：2007-02-02

申请人： Mustafa Badaroglu

发明人： Mustafa Badaroglu

IPC分类号： H03L7/06 ,  H03K3/017

CPC分类号： H03K5/131 ,  H03K5/133 ,  H03K7/04 ,  H04B1/7183

摘要： The disclosure relates to a device comprising at least one delay line for applying a variable delay to a clock signal and a controller for controlling the variable delay of the delay line. Each delay line comprises a plurality of concatenated delay banks which provide different delay values with respect to each other, a bypass parallel over each of said the delay banks, and switching elements associated with each of the delay banks for selecting either the respective delay bank or the respective bypass. Each of the delay banks is provided with a delay bank status indicator for indicating propagation of the clock signal through the delay bank towards the controller. The controller is provided for taking the indicated propagation of the clock signal into account upon setting said switching elements. Devices according to this disclosure are, amongst other uses, suited for use in Ultra Wide Band (UWB) receiving or transmitting devices, in particular those devices, designed for low power consumption, by enabling power on and off switching of parts of such devices as analog to digital converters and integrators, during timing windows.

摘要翻译： 本公开涉及一种包括至少一个用于向时钟信号施加可变延迟的延迟线的装置和用于控制延迟线的可变延迟的控制器。 每个延迟线包括多个级联延迟组，它们相对于彼此提供不同的延迟值，在每个延迟组上并联的旁路，以及与每个延迟组相关联的开关元件，用于选择相应的延迟组或 相应的旁路。 延迟组中的每一个具有用于指示时钟信号通过延迟组向控制器传播的延迟组状态指示符。 设置控制器用于在设置所述开关元件时考虑所指示的时钟信号的传播。 根据本公开的设备除了其它用途之外，适用于超宽带（UWB）接收或发射设备，特别是那些设计用于低功耗的设备，通过启用和关闭这些设备的部件的电源切换 模数转换器和积分器。

公开(公告)号：US20100032812A1

公开(公告)日：2010-02-11

申请号：US11643235

申请日：2006-12-21

申请人： Sherif Sedky ,  Ann Witvrouw

发明人： Sherif Sedky ,  Ann Witvrouw

IPC分类号： H01L29/161 ,  H01L21/20

CPC分类号： B81C1/00666 ,  B81C2201/0169

摘要： A method is provided for controlling the average stress and the strain gradient in structural silicon germanium layers as used in micromachined devices. The method comprises depositing a single silicon germanium layer on a substrate and annealing a predetermined part of the deposited silicon germanium layer. The process parameters of the depositing and/or annealing steps are selected such that a predetermined average stress and a predetermined strain gradient are obtained in the predetermined part of the silicon germanium layer. Preferably a plasma assisted deposition technique is used for depositing the silicon germanium layer, and a pulsed excimer laser is used for local annealing, with a limited thermal penetration depth. Structural silicon germanium layers for surface micromachined structures can be formed at temperatures substantially below 400° C., which offers the possibility of post-processing micromachined structures on top of a substrate comprising electronic circuitry such as CMOS circuitry. Such structural silicon germanium layers may be also be formed at temperatures not exceeding 210° C., which allows the integration of silicon germanium based micromachined structures on substrates such as polymer films.

摘要翻译： 提供了一种用于控制在微加工装置中使用的结构硅锗层中的平均应力和应变梯度的方法。 该方法包括在衬底上沉积单个硅锗层并退火沉积的硅锗层的预定部分。 选择沉积和/或退火步骤的工艺参数，使得在硅锗层的预定部分中获得预定的平均应力和预定的应变梯度。 优选地，等离子体辅助沉积技术用于沉积硅锗层，并且将脉冲准分子激光器用于具有有限的热穿透深度的局部退火。 用于表面微加工结构的结构硅锗层可以在基本上低于400℃的温度下形成，这提供了在包括诸如CMOS电路的电子电路的衬底之上的后处理微机械加工结构的可能性。 这种结构硅锗层也可以在不超过210℃的温度下形成，这允许将硅锗微加工结构集成在诸如聚合物膜的基底上。

公开(公告)号：US20090301557A1

公开(公告)日：2009-12-10

申请号：US11855988

申请日：2007-09-14

申请人： Guido Agostinelli ,  Guy Beaucarne ,  Patrick Choulat

发明人： Guido Agostinelli ,  Guy Beaucarne ,  Patrick Choulat

IPC分类号： H01L31/0216 ,  H01L31/02

CPC分类号： H01L31/02167 ,  H01L31/022425 ,  H01L31/18 ,  H01L31/1868 ,  Y02E10/50 ,  Y02P70/521

摘要： A method for the production of a photovoltaic device, for instance a solar cell, is disclosed. In one aspect, the method comprises providing a substrate having a front main surface and a rear surface. The method further comprises depositing a dielectric layer on the rear surface, wherein the dielectric layer has a thickness larger than about 100 nm. The method further comprises depositing a passivation layer comprising hydrogenated SiN on top of the dielectric layer and forming back contacts through the dielectric layer and the passivation layer. In another aspect, corresponding photovoltaic devices, for instance solar cell devices, are also disclosed.

摘要翻译： 公开了一种用于生产例如太阳能电池的光伏器件的方法。 一方面，该方法包括提供具有前主表面和后表面的基底。 该方法还包括在后表面上沉积介电层，其中介电层的厚度大于约100nm。 该方法还包括在电介质层的顶部上沉积包括氢化SiN的钝化层，并通过介电层和钝化层形成后接触。 在另一方面，还公开了相应的光伏器件，例如太阳能电池器件。

公开(公告)号：US20090262043A1

公开(公告)日：2009-10-22

申请号：US12413432

申请日：2009-03-27

申请人： Xavier Rottenberg ,  Stefan Pauwen

发明人： Xavier Rottenberg ,  Stefan Pauwen

IPC分类号： H01Q1/00 ,  H02N11/00 ,  H01H59/00

CPC分类号： H02N1/006 ,  H01P1/127

摘要： Systems and methods for controlling a micro electromechanical device using power actuation are disclosed. The disclosed micro electromechanical systems comprise at least one electrostatically actuatable micro electromechanical device and an actuation device. The micro electromechanical device comprises a first conductor and a second conductor having a moveable portion which in use may be attracted by the first conductor as a result of a predetermined actuation power. The actuation device comprises a high frequency signal generator for generating at least part of the actuation power by means of a predetermined high frequency signal with a frequency higher than the mechanical resonance frequency of the moveable portion of the micro electromechanical device.

摘要翻译： 公开了使用动力驱动来控制微机电装置的系统和方法。 所公开的微机电系统包括至少一个静电致动微机电装置和致动装置。 微机电装置包括第一导体和具有可移动部分的第二导体，该可移动部分在预定的致动能量的作用下可被第一导体吸引。 致动装置包括高频信号发生器，用于通过具有高于微机电装置的可移动部分的机械共振频率的预定高频信号产生至少一部分致动功率。

公开(公告)号：US20090195424A1

公开(公告)日：2009-08-06

申请号：US12162814

申请日：2007-01-31

申请人： Geert Van Der Plas ,  Pierluigi Nuzzo ,  Fernando De Bernardinis

发明人： Geert Van Der Plas ,  Pierluigi Nuzzo ,  Fernando De Bernardinis

IPC分类号： H03M1/12 ,  H03M1/10

CPC分类号： H03M1/1061 ,  H03M1/0607 ,  H03M1/0809 ,  H03M1/361

摘要： The present invention is related to an analogue-to-digital (A/D) converter comprising at least two voltage comparator devices. Each of the voltage comparator devices is arranged for being fed with a same input signal and for generating an own internal voltage reference. The two internal voltage references are different. Each voltage comparator is arranged for generating an output signal indicative of a bit position of a digital approximation of said input signal.

摘要翻译： 本发明涉及包括至少两个电压比较器装置的模数（A / D）转换器。 每个电压比较器装置被布置成被馈送相同的输入信号并且用于产生自己的内部参考电压。 两个内部参考电压不同。 每个电压比较器被布置用于产生指示所述输入信号的数字近似的位位置的输出信号。

公开(公告)号：US07566634B2

公开(公告)日：2009-07-28

申请号：US11234835

申请日：2005-09-23

申请人： Eric Beyne ,  Bart Swinnen ,  Serge Vanhaelemeersch

发明人： Eric Beyne ,  Bart Swinnen ,  Serge Vanhaelemeersch

IPC分类号： H01L21/00

CPC分类号： H01L21/78 ,  H01L21/3043

摘要： The present invention is related to a method for singulating chips from a stack of layers, such as the layers on a wafer or substrate. The stack of layers includes a front end of line (FEOL) layer upon the substrate layer, with the substrate layer having a first surface and a second surface. The FEOL is positioned on top of the first surface, and a back end of line (BEOL) layer is positioned on top of the FEOL. The method includes etching singulating trenches through the BEOL, through the FEOL and at least partially through the substrate layer, depositing a passivation layer on the stack provided with singulating trenches, whereby the sidewalls of the etched singulating trenches are at least partially passivated. Dicing, such as blade dicing, laser dicing or trench etch dicing is performed, releasing the chip from the stack of layers.

摘要翻译： 本发明涉及一种用于从诸如晶片或基板上的层的层叠单片化芯片的方法。 层叠层包括在衬底层上的前端（FEOL）层，衬底层具有第一表面和第二表面。 FEOL位于第一表面的顶部，并且后端（BEOL）层位于FEOL的顶部。 该方法包括通过BEOL，通过FEOL蚀刻单个沟槽并且至少部分地穿过衬底层，在设置有单个沟槽的堆叠上沉积钝化层，由此蚀刻的单个化沟槽的侧壁至少部分钝化。 执行切割，例如刀片切割，激光切割或沟槽蚀刻切割，从堆叠层释放芯片。

公开(公告)号：US20090183767A1

公开(公告)日：2009-07-23

申请号：US12405445

申请日：2009-03-17

申请人： Dirk Vanderzande ,  Laurence Lutsen ,  Anja Henckens ,  Kristof Colladet

发明人： Dirk Vanderzande ,  Laurence Lutsen ,  Anja Henckens ,  Kristof Colladet

IPC分类号： H01L31/00 ,  C08F28/06

CPC分类号： C08F28/02 ,  C08F28/06 ,  C08F126/06 ,  C08F128/06 ,  C08F228/02 ,  C08F290/14 ,  C08G61/02 ,  C08G61/12 ,  C08G61/126 ,  H01L51/0035 ,  H01L51/0038 ,  Y02E10/549 ,  Y10S428/917

摘要： A technique is described for the preparation of polymers according to a process in which the starting compound of formula (I) is polymerized in the presence of a base in an organic solvent. No end chain controlling agents are required during the polymerisation to obtain soluble precursor polymers. The precursor polymer such obtained comprises structural units of the formula (II). In a next step, the precursor polymer (II) is subjected to a conversion reaction towards a soluble or insoluble conjugated polymer by thermal treatment. The arylene or heteroarylene polymer comprises structural units of the formula III. In this process the dithiocarbamate group acts as a leaving group and permits the formation of a precursor polymer of structural formula (II), which has an average molecular weight from 5000 to 1000000 Dalton and is soluble in common organic solvents. The precursor polymer with structural units of formula (II) is thermally converted to the conjugated polymer with structural formula (III).

公开(公告)号：US07521408B2

公开(公告)日：2009-04-21

申请号：US11301130

申请日：2005-12-12

申请人： Rita Vos ,  Paul Mertens ,  Bernd Kolbesen ,  Albrecht Fester ,  Oliver Doll

发明人： Rita Vos ,  Paul Mertens ,  Bernd Kolbesen ,  Albrecht Fester ,  Oliver Doll

IPC分类号： C11D7/32

CPC分类号： H01L21/02052 ,  C11D3/39 ,  C11D3/3947 ,  C11D7/3281 ,  C11D7/34 ,  C11D11/0047

摘要： The present invention recites a composition comprising a first compound and a second compound. The first compound has the chemical formula ( 1a), wherein m, n and o are independently from each other equal to 2 or 3; wherein p is equal to 1 or 2; R being a chemical group with the chemical formula (1a′), wherein q is equal to 1, 2 or 3; wherein R1, R2 and R3 are independently selected from the group consisting of hydrogen and an organic group. The second compound has the chemical formula (1c). Metal ions can be present in the solution or in an external medium being contacted with the solution. The present invention can be used for cleaning a semiconductor substrate.

摘要翻译： 本发明描述了包含第一化合物和第二化合物的组合物。 第一种化合物具有化学式（1a），其中m，n和o彼此独立地相当于2或3; 其中p等于1或2; R是具有化学式（1a'）的化学基团，其中q等于1,2或3; 其中R1，R2和R3独立地选自氢和有机基团。 第二化合物具有化学式（1c）。 金属离子可以存在于溶液中或在与溶液接触的外部介质中。 本发明可用于清洗半导体衬底。

公开(公告)号：US07508718B2

公开(公告)日：2009-03-24

申请号：US11446538

申请日：2006-06-02

申请人： Arnaud Adrien Furnemont

发明人： Arnaud Adrien Furnemont

IPC分类号： G11C11/34

CPC分类号： G11C16/0475 ,  G11C16/04 ,  G11C16/26 ,  G11C16/349 ,  G11C16/3495 ,  G11C29/50 ,  G11C2029/5002

摘要： A method for determining programming/erase conditions and a method for operating a charge-trapping semiconductor device are disclosed. Programming and erase conditions are determined such that a first net charge distribution variation profile, upon going from programmed to erased state, is substantially the opposite of a second net charge distribution variation profile, upon going from erased to programmed state.

摘要翻译： 公开了一种用于确定编程/擦除条件的方法和用于操作电荷俘获半导体器件的方法。 确定编程和擦除条件，使得当从编程状态到擦除状态时，第一净电荷分布变化曲线在从擦除到编程状态时基本上与第二净电荷分布变化曲线相反。

公开(公告)号：US20090073621A1

公开(公告)日：2009-03-19

申请号：US12209926

申请日：2008-09-12

申请人： Steven Thijs ,  David Eric Tremouilles

发明人： Steven Thijs ,  David Eric Tremouilles

IPC分类号： H02H9/00 ,  G06F17/50

CPC分类号： H01L27/0262 ,  H01L29/0649 ,  H01L29/7391 ,  H01L29/7436 ,  H01L29/861 ,  H03K17/08144 ,  H03K17/305

摘要： A method and apparatus for designing an ESD protection circuit comprising a main ESD device and a triggering device connected to a triggering node of the main ESD device by means of which the main ESD device can be triggered for conducting ESD current at a reduced voltage. The triggering device is located in an initial current path for the ESD current. In this initial current path, there is at least one triggering component which can be triggered from an off-state to an on-state. The triggering speed of this component is considered and its design is optimised in view of increasing its triggering speed. Further shown is an ESD protection circuit in which at least one triggering component is selected to be of a predetermined type for achieving a fast triggering speed, preferably of the gated diode type.

摘要翻译： 一种用于设计ESD保护电路的方法和装置，包括主ESD装置和连接到主ESD装置的触发节点的触发装置，通过该ESD触发装置可以触发主ESD装置以在降低的电压下传导ESD电流。 触发装置位于用于ESD电流的初始电流路径中。 在该初始电流路径中，存在至少一个触发组件，其可以从截止状态触发到导通状态。 考虑到该组件的触发速度，考虑到其触发速度的增加，其设计被优化。 进一步示出了ESD保护电路，其中至少一个触发组件被选择为预定类型，以实现快速的触发速度，优选地是门控二极管类型。