公开(公告)号：US06376285B1

公开(公告)日：2002-04-23

申请号：US09314983

申请日：1999-05-20

申请人： Keith A. Joyner ,  Leland S. Swanson

发明人： Keith A. Joyner ,  Leland S. Swanson

IPC分类号： H01L2100

CPC分类号： H01L21/7627 ,  H01L21/02203 ,  H01L21/02238 ,  H01L21/02258 ,  H01L21/02337 ,  H01L21/3167

摘要： An epitaxial layer of silicon is grown on a layer of partially-oxidized porous silicon, then covered by a capping layer which provides structural support and prevents oxidation of the epitaxial layer. A high-temperature anneal allows the partially oxidized silicon layer to separate into distinct layers of silicon and SiO2, producing a buried oxide layer. This method provides a low cost means of producing silicon-on-insulator (SOI) wafers.

摘要翻译： 硅的外延层在部分氧化的多孔硅层上生长，然后被覆盖层覆盖，该覆盖层提供结构支撑并防止外延层的氧化。 高温退火使得部分氧化的硅层分离成不同的硅层和SiO 2层，产生掩埋氧化物层。 该方法提供了制造绝缘体上硅（SOI）晶片的低成本手段。

公开(公告)号：US5110755A

公开(公告)日：1992-05-05

申请号：US460703

申请日：1990-01-04

申请人： Li-Shu Chen ,  Rathindra N. Ghoshtagore ,  Alfred P. Turley ,  Louis A. Yannone

发明人： Li-Shu Chen ,  Rathindra N. Ghoshtagore ,  Alfred P. Turley ,  Louis A. Yannone

IPC分类号： H01L21/306 ,  H01L21/762

CPC分类号： H01L21/76264 ,  H01L21/306 ,  H01L21/7627

摘要： A process for forming an insulating layer of silicon dioxide in a silicon substrate that surrounds and electrically insulates a semiconductor device is disclosed herein. The process comprises the steps of forming a recess on the outer surface of the silicon substrate that encompasses the site of the semiconductor device by photo-resist patterned reactive ion etching, and then removing silicon on the surface of the resulting recess whose crystal structure has been damaged by the reactive ion etching. Next, dopant atoms are selectively deposited on the surface of the recess so that the surface of the recess might be rendered into a porous layer of silicon when immersed in hydrogen fluoride and subjected to an electrical current. Prior to the porousification step, silicon is epitaxially grown within the walls of the recess to form the site for a semiconductor device. The substrate is then immersed in hydrogen fluoride while a current is conducted through it in order to porousify the silicon between the device island and the rest of the substrate. Finally, the substrate is thermally oxidized in order to render the porous layer of silicon into a insulating layer of silicon dioxide. The provision of such individual insulating layers around each of the devices on the substrate allows the manufacture of a high density and radiation hard semiconductor array that is not susceptible to electrical current leakage between components.

摘要翻译： 本文公开了一种在半导体器件中包围并电绝缘的硅衬底中形成二氧化硅绝缘层的工艺。 该方法包括以下步骤：在硅衬底的外表面上形成通过光致抗蚀剂图案化反应离子蚀刻包围半导体器件的位置的凹槽，然后在晶体结构已经形成的凹槽的表面上除去硅 被反应离子蚀刻损坏。 接下来，掺杂剂原子被选择性地沉积在凹部的表面上，使得当浸入氟化氢中并且经受电流时，凹槽的表面可能变成多孔硅层。 在多孔化步骤之前，在凹槽的壁内外延生长硅以形成半导体器件的部位。 然后将衬底浸入氟化氢中，同时通过电流进行电流以使器件岛和衬底的其余部分之间的硅多孔化。 最后，将基底热氧化，以使硅的多孔层成为二氧化硅的绝缘层。 在衬底上的每个器件周围提供这些单独的绝缘层允许制造不易受组件之间的电流泄漏敏感的高密度和辐射硬的半导体阵列。

公开(公告)号：US5686342A

公开(公告)日：1997-11-11

申请号：US511206

申请日：1995-08-04

申请人： Seoksoo Lee

发明人： Seoksoo Lee

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L21/764 ,  H01L27/08

CPC分类号： H01L21/764 ,  H01L21/76264 ,  H01L21/7627 ,  H01L21/76281 ,  H01L21/76289 ,  Y10S438/96

摘要： A method for insulating semiconductor elements is disclosed. The method includes steps of: forming a 3-layer semiconductor substrate consisting of an upper conductive layer, a high concentration impurity layer, and a lower conductive layer; carrying out a photo etching to remove the upper conductive layer, thereby opening the high concentration impurity layer; dipping the semiconductor substrate into an aqueous HF solution of a certain ratio, and carrying out an anodizing reaction to convert the high concentration impurity layer into a porous silicon layer; and carrying out a wet oxidation to convert the porous silicon layer into a buried oxide layer.

摘要翻译： 公开了绝缘半导体元件的方法。 该方法包括以下步骤：形成由上导电层，高浓度杂质层和下导电层构成的3层半导体衬底; 进行光蚀刻以去除上导电层，从而打开高浓度杂质层; 将半导体衬底浸入一定比例的HF水溶液中，进行阳极氧化反应，将高浓度杂质层转化为多孔硅层; 并进行湿式氧化，将多孔硅层转化成掩埋氧化物层。

公开(公告)号：US4104090A

公开(公告)日：1978-08-01

申请号：US771593

申请日：1977-02-24

申请人： Hans Bernhard Pogge

发明人： Hans Bernhard Pogge

IPC分类号： H01L27/00 ,  H01L21/306 ,  H01L21/316 ,  H01L21/76 ,  H01L21/762 ,  H01L27/04

CPC分类号： H01L21/02238 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02255 ,  H01L21/02271 ,  H01L21/306 ,  H01L21/31612 ,  H01L21/31662 ,  H01L21/76264 ,  H01L21/7627 ,  H01L21/76283 ,  Y10S148/051 ,  Y10S148/131 ,  Y10S205/92

摘要： A process which utilizes an anodized porous silicon technique to form dielectric isolation on one side of a semiconductor device is described. Regions of silicon semiconductor are fully isolated from one another by this technique. The starting wafer typically is predominantly P with a P+ layer thereon. A P or N layer over the P+ layer is formed thereover such as by epitaxial growth. The surface of the silicon is oxidized and a photoresist layer applied thereto. Openings are formed in the photoresist. Openings are formed in the silicon dioxide using the photoresist as a mask and appropriate etching techniques. The openings in the silicon dioxide define the regions to be etched by reactive ion etching. Reactive ion etching is accomplished at least down to the P+ region. The structure is then subjected to the anodic etching technique which preferentially attacks the P+ layer to form porous silicon throughout the P+ layer. The structure is then placed in a thermal oxidation ambient until the porous silicon layer has been fully oxidized to silicon dioxide. The openings through the surface layer are filled up with oxide to fully isolate the P or N surface layer.

摘要翻译： 描述了利用阳极氧化多孔硅技术在半导体器件的一侧上形成绝缘隔离的工艺。 通过这种技术，硅半导体区域彼此完全隔离。 起始晶片通常主要是P上具有P +层的P。 在P +层上形成P或N层，例如通过外延生长。 硅的表面被氧化，并且在其上施加光刻胶层。 在光致抗蚀剂中形成开口。 使用光致抗蚀剂作为掩模和适当的蚀刻技术在二氧化硅中形成开口。 二氧化硅中的开口通过反应离子蚀刻限定待蚀刻的区域。 反应离子蚀刻至少达到P +区域。 然后将该结构进行阳极蚀刻技术，其优先攻击P +层以在整个P +层中形成多孔硅。 然后将该结构置于热氧化环境中，直到多孔硅层已经被完全氧化成二氧化硅。 通过表面层的开口填充有氧化物以完全隔离P或N表面层。

公开(公告)号：US06277703B1

公开(公告)日：2001-08-21

申请号：US09311889

申请日：1999-05-14

申请人： Gabriele Barlocchi ,  Flavio Francesco Villa

发明人： Gabriele Barlocchi ,  Flavio Francesco Villa

IPC分类号： H01L2176

CPC分类号： H01L21/7624 ,  H01L21/76224 ,  H01L21/76264 ,  H01L21/7627 ,  H01L21/76283

摘要： A method including: forming doped regions on a monocrystalline substrate; growing an epitaxial layer; forming trenches in the epitaxial layer extending to the doped regions; anodizing the doped regions in an electro-galvanic cell to form porous silicon regions; oxidizing the porous silicon regions; removing the oxidized porous silicon regions to form a buried air gap; thermally oxidizing the substrate to grow an oxide region from the walls of the buried air gap and the trenches, until the buried air gap and the trenches themselves are filled.

摘要翻译： 一种方法，包括：在单晶衬底上形成掺杂区; 生长外延层; 在延伸到掺杂区域的外延层中形成沟槽; 在电 - 电池中阳极氧化掺杂区以形成多孔硅区; 氧化多孔硅区域; 去除氧化的多孔硅区域以形成掩埋气隙; 热氧化衬底以从掩埋气隙和沟槽的壁生长氧化物区域，直到埋入的气隙和沟槽本身被填充。

公开(公告)号：US5950094A

公开(公告)日：1999-09-07

申请号：US252510

申请日：1999-02-18

申请人： Shih-Chi Lin ,  Hui-ju Yu ,  Yen-Ming Chen ,  Hui-Hua Chang

发明人： Shih-Chi Lin ,  Hui-ju Yu ,  Yen-Ming Chen ,  Hui-Hua Chang

IPC分类号： H01L21/762 ,  H01L21/76

CPC分类号： H01L21/76245 ,  H01L21/76264 ,  H01L21/7627 ,  H01L21/76283 ,  Y10S148/05 ,  Y10S438/96

摘要： The present invention provides a method of fabricating fully dielectric isolated silicon (FDIS) by anodizing a buried doped silicon layer through trenches formed between active areas to form a porous silicon layer; oxidizing the porous silicon layer through the trenches to form a buried oxide layer; and by depositing a dielectric in the trenches. The process begins by forming a buried doped layer in a silicon substrate defining a silicon top layer over the conductive buried doped layer. The silicon top layer and the buried doped layer are patterned to form trenches that extend into but not through the buried doped layer. The trenches define isolated silicon regions. The buried doped layer is anodized to form a porous silicon layer. The porous silicon layer is converted into a buried oxide layer by oxidation. The oxidation step also forms a liner oxide layer on the tops and sidewalls of the isolated silicon regions. Ion species can optionally be implanted into the sidewalls of the isolated silicon regions to form lightly doped regions to act as channel stops. A fill oxide layer is deposited over the buried oxide layer and the liner oxide layer. The fill oxide layer and the liner oxide layer are removed down to the level of the top of the isolated silicon regions thereby exposing a fully dielectric isolated silicon.

摘要翻译： 本发明提供了通过在有源区之间形成的沟槽阳极氧化掩埋掺杂硅层来制造全介电隔离硅（FDIS）的方法，以形成多孔硅层; 通过沟槽氧化多孔硅层以形成掩埋氧化物层; 并通过在沟槽中沉积电介质。 该过程开始于在硅衬底中形成掩埋掺杂层，该衬底在导电掩埋掺杂层上限定硅顶层。 图案化硅顶层和掩埋掺杂层以形成延伸到但不穿过掩埋掺杂层的沟槽。 沟槽定义了隔离的硅区域。 掩埋掺杂层被阳极化以形成多孔硅层。 通过氧化将多孔硅层转化为掩埋氧化物层。 氧化步骤还在隔离硅区域的顶部和侧壁上形成衬垫氧化物层。 可以将离子种类任选地注入到隔离的硅区域的侧壁中以形成轻掺杂区域，以充当通道停止。 填埋氧化物层沉积在掩埋氧化物层和衬里氧化物层上。 将填充氧化物层和衬垫氧化物层去除到分离的硅区域的顶部的水平面，从而暴露完全介电的隔离硅。

公开(公告)号：US5773353A

公开(公告)日：1998-06-30

申请号：US564505

申请日：1995-11-29

申请人： Oh-Joon Kwon ,  Jung-Hee Lee ,  Yong-Hyun Lee

发明人： Oh-Joon Kwon ,  Jung-Hee Lee ,  Yong-Hyun Lee

IPC分类号： H01L21/18 ,  H01L21/762 ,  H01L21/76

CPC分类号： H01L21/76264 ,  H01L21/7627 ,  H01L21/76283 ,  Y10S438/96

摘要： A semiconductor substrate and a method of fabricating the same, and provides which the active area to be formed the active element is defined by the trench filled with any conductive polycrystal silicon in which any portion of a large number of the epitaxial layer is crystally grown on any conductive silicon substrate, and the multi-aperture silicon oxide layer is formed from the metal line to be used to the passive element or the transmitting line outside the trench, so that the interference between the passive element and the semiconductor substrate is prevented, and to attenuate the transmitting signal prevents to be attenuated in the high frequency band operation. Therefore, the semiconductor substrate for a unit active element and the MMIC to be able to operate the high frequency band is manufactured into the silicon, and thus it is advantageous to reduce the cost and enhance the yield. Silicon oxide layer is formed from the metal line to be used to the passive element or the transmitting line outside the trench, so that the interference between the passive element and the semiconductor substrate is prevented, and to attenuate the transmitting signal prevents to be attenuated in the high frequency band operation. Therefore, the semiconductor substrate for a unit active element and the MMIC to be able to operate the high frequency band is manufactured into the silicon, and thus it is advantageous to reduce the cost and enhance the yield.

摘要翻译： 一种半导体衬底及其制造方法，其特征在于，所形成的有源区域由填充有任何导电多晶硅的沟槽限定，其中大量外延层的任何部分在其上生长在 任何导电硅衬底和多孔径氧化硅层由用于沟槽外的无源元件或发射线的金属线形成，从而防止了无源元件与半导体衬底之间的干涉， 衰减发送信号防止在高频带操作中被衰减。 因此，将单位有源元件的半导体衬底和能够操作高频带的MMIC制造成硅，因此有利于降低成本并提高产量。 氧化硅层由用于无源元件或沟槽外部的传输线的金属线形成，从而防止无源元件与半导体衬底之间的干涉，并且衰减发射信号防止衰减 高频段操作。 因此，将单位有源元件的半导体衬底和能够操作高频带的MMIC制造成硅，因此降低成本并提高产量是有利的。

公开(公告)号：US4814287A

公开(公告)日：1989-03-21

申请号：US82212

申请日：1987-08-06

申请人： Toyoki Takemoto ,  Kenji Kawakita ,  Hiroyuki Sakai

发明人： Toyoki Takemoto ,  Kenji Kawakita ,  Hiroyuki Sakai

IPC分类号： H01L27/00 ,  H01L21/74 ,  H01L21/762 ,  H01L21/763 ,  H01L21/8222 ,  H01L21/8236 ,  H01L27/06 ,  H01L27/088 ,  H01L21/76 ,  H01L21/95

CPC分类号： H01L21/743 ,  H01L21/76245 ,  H01L21/76264 ,  H01L21/763 ,  H01L21/7627 ,  H01L21/76281

摘要： A method of manufacturing a semiconductor integrated circuit device of the bipolar type of the MOS type or an integration of the two types having high integration and high performance, in which the circuit includes a first device region of which the side surface and entire region of the lower portion of the active region are made of silicon oxide and a second device region of which the side surface and a part of the lower portion of the active region are made of silicon oxide. According to the present invention, a transistor whose bottom portion is opened and a transistor whose bottom portion is not opened can be freely provided on a substrate, thereby dividing the transistors into a transistor to which a voltage can be supplied from the substrate and a transistor to which the voltage can not be supplied from the substrate, so that the wiring which has been conventionally needed can be reduced. In addition, in such transistors which are completely separated, the parasitic effect with the circumference is completely prevented so that excellent characteristics can be provided.

摘要翻译： 一种制造双极型MOS型半导体集成电路器件的方法或者具有高集成度和高​​性能的两种类型的集成方法，其中电路包括第一器件区域，其中第一器件区域的侧表面和整个区域 有源区的下部由氧化硅制成，其第二器件区的有源区的侧表面和下部的一部分由氧化硅制成。 根据本发明，底部开放的晶体管和其底部未打开的晶体管可以自由地设置在基板上，从而将晶体管分成从基板提供电压的晶体管和晶体管 不能从基板供给电压，从而可以减少传统上需要的布线。 此外，在完全分离的这种晶体管中，完全防止与圆周的寄生效应，从而可以提供优异的特性。

公开(公告)号：US20170179227A1

公开(公告)日：2017-06-22

申请号：US14985520

申请日：2015-12-31

申请人： Hangzhou Silan Microelectronics Co., Ltd. ,  Hangzhou Silan Integrated Circuit Co., Ltd.

发明人： Changjun Zhang ,  Feng Ji ,  Ping Wang ,  Zuyin Chen

IPC分类号： H01L29/06 ,  H01L29/66 ,  H01L21/308 ,  H01L21/225 ,  H01L21/3063 ,  H01L29/861 ,  H01L23/535

CPC分类号： H01L29/0649 ,  H01L21/2253 ,  H01L21/3063 ,  H01L21/3085 ,  H01L21/7627 ,  H01L23/535 ,  H01L29/66136 ,  H01L29/8611 ,  H01L29/8613

摘要： The present disclosure relates to a dielectrically isolated semiconductor device and a method for manufacturing the same. The dielectrically isolated semiconductor device includes a semiconductor substrate, a first semiconductor layer above the semiconductor substrate, a second semiconductor layer above the first semiconductor layer, a semiconductor island in the second semiconductor layer, and a first dielectric isolation layer surrounding a bottom and sidewalls of the semiconductor island. The first dielectric isolation layer includes a first portion which is formed from a portion of the first semiconductor layer and extending along the bottom of the semiconductor island, and a second portion which is formed from a portion of the second semiconductor layer and extending along the sidewalls of the semiconductor island. The dielectrically isolated semiconductor devices needs no an SOI wafer and reduces manufacturing cost.

公开(公告)号：US06376859B1

公开(公告)日：2002-04-23

申请号：US09346763

申请日：1999-07-01

申请人： Leland S. Swanson ,  Keith A. Joyner

发明人： Leland S. Swanson ,  Keith A. Joyner

IPC分类号： H01L2904

CPC分类号： H01L29/16 ,  H01L21/02203 ,  H01L21/02238 ,  H01L21/02258 ,  H01L21/3063 ,  H01L21/31675 ,  H01L21/76245 ,  H01L21/76264 ,  H01L21/7627 ,  H01L21/76283 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/32

摘要： Varying the porosity through the thickness of a porous silicon layer allows conflicting needs to be met by the same layer: a low porosity surface layer allows a high-quality epitaxial layer of silicon to be grown, or can provide structural support, while greater porosity in other portions of the layer increases circuit isolation and provides stress relief between layers.

摘要翻译： 通过多孔硅层的厚度改变孔隙度允许相同层的冲突需要满足：低孔隙率表面层允许硅的高质量外延层生长，或者可以提供结构支撑，同时更大的孔隙率 层的其他部分增加电路隔离并且在层之间提供应力消除。