摘要:
The present disclosure relates to a device and method for measuring wafers. The device comprises: a moving platform, which is used to adjust the location of wafers; a first pre-alignment module and a first image recognition module, which are used to align a first wafer at a first location on the moving platform before measuring the first wafer; a second pre-alignment module and a second image recognition module, which are used to align a second wafer at a second location on the moving platform before measuring the second wafer; and a measurement module, which is used to measure the first wafer and the second wafer at a third location on the moving platform, wherein the first location, second location and third location are different from each other. The embodiments of the present disclosure may improve the measurement efficiency of the device.
摘要:
Semiconductor devices are provided. A semiconductor device includes a first portion of a lower electrode structure on a substrate. The semiconductor device includes a first support pattern being in contact with a first portion of a sidewall of the first portion of the lower electrode structure. The semiconductor device includes a second portion of the lower electrode structure on a second portion of the sidewall of the first portion of the lower electrode structure. The semiconductor device includes an upper electrode on the second portion of the lower electrode structure and on the first support pattern. Moreover, the semiconductor device includes a dielectric layer between the upper electrode and the second portion of the lower electrode structure.
摘要:
An array substrate including a plurality of terminals, a first conductive layer and a second conductive layer, wherein the first conductive layer and the second conductive layer include an insulating layer therebetween, wherein a plurality of first electrode plates and a plurality of second electrode plates are formed in the first conductive layer and the second conductive layer, respectively, the first electrode plates and the second electrode plates are opposite to each other to constitute a capacitor structure, the terminals are provided in the same layer as the first conductive layer or the second conductive layer, or the terminals are provided in the same layer as a third conductive layer between the first conductive layer and the second conductive layer. A method of manufacturing an array substrate and a display device is provided.
摘要:
The disclosure is directed to methods for forming a set of fins from a substrate. One embodiment of the disclosure includes: providing a stack over the substrate, the stack including a first oxide over the substrate, a first nitride over the pad oxide, a second oxide over the first nitride, and a first hardmask over the second oxide; patterning the first hard mask to form a first set of hardmask fins over the second oxide; oxidizing the first set of hardmask fins to convert the first set of hardmask fins into a set of oxide fins; using the set of oxide fins as a mask, etching the second oxide and the first nitride to expose portions of the first oxide thereunder such that remaining portions of the second oxide and the first nitride remain disposed beneath the set of oxide fins thereby defining a set of mask stacks; and using the set of mask stacks as a mask, etching the exposed portions of the first oxide and the substrate thereby forming the set of fins from the substrate.
摘要:
The present invention provides a manufacture method of a TFT array substrate and a TFT array substrate structure, and the TFT array substrate structure comprises a substrate (1), a first metal electrode (2) on the substrate (1), a gate isolation layer (3) positioned on the substrate (1) and completely covering the first metal electrode (2), an island shaped semiconductor layer (4) on the gate isolation layer (3), a second metal electrode (6) on the gate isolation layer (3) and the island shaped semiconductor layer (4), a protecting layer (8) on the second metal electrode (6), a color resist layer (7) on the protecting layer (8), a protecting layer (12) on the color resist layer (7) and a first pixel electrode layer (9) on the protecting layer (12); a via (81) is formed on the protecting layer (8), the color resist layer (7) and the protecting layer (12), and an organic material layer (10) fills the inside of the via (81).
摘要:
To provide a touch panel with reduced disturbance of display and with improved mechanical strength by suppressing variation in the space between a pair of substrates which form the touch panel even when in contact with an object to be detected. A pixel portion including a plurality of pixels is provided between a pair of substrates. Each pixel includes a photosensor portion which detects that the object to be detected is in contact with one of the pair of substrates, and a MEMS portion which generates a mechanical displacement in a direction perpendicular to the pair of substrates when a signal based on a detection result of the photosensor portion is input.
摘要:
A fabricating method and a testing method of a semiconductor device and a mechanical integrity testing apparatus are provided. An object includes a wafer, an insulating layer, and a plurality of conductive posts is provided. A surface of the wafer has a plurality of first blind holes outside chip regions and a plurality of second blind holes inside the chip regions. The insulating layer is between the conductive posts and the walls of the first blind holes and between the conductive posts and the walls of the second blind holes. A mechanical integrity test is performed to test a binding strength between the insulating layer, the conductive posts, and the walls of the first blind holes. The conductive posts in the chip regions are electrically connected to an element after the conductive posts in the first blind holes are qualified in the mechanical integrity test.
摘要:
A composition with improved shelf life for filling small gaps in a semiconductor device is provided. The composition comprises an end-capped silicone polymer. The molecular weight of the end-capped silicone polymer is not varied during storage. In addition, the dissolution rate (DR) of the composition in an alkaline developing solution is maintained at a desired level during storage. That is, the composition is highly stable during storage. Therefore, the composition is suitable for use in a node separation process for the fabrication of a semiconductor capacitor.