Abstract:
A multiple wiring layer interconnection element (100) includes capacitors (110) or other electrical components embedded between a first exposed wiring layer (120) and a second exposed wiring layer (122) of the interconnection element (100). Internal wiring layers (124) and (126) are provided between exposed surfaces (112) of the respective capacitors (110), the internal wiring layers being electrically insulated from the capacitors (110) by dielectric layers (114) and (116), respectively. The internal wiring layers (124), (126) are isolated from each other by an internal dielectric layer (130). Conductive vias (132) provide conductive interconnection between the two internal wiring layers (124, 126). A method of fabricating a multiple wiring layer interconnection element is also provided.
Abstract:
An interconnection element 110 can include a substrate, e.g., a connection substrate, element of a package, circuit panel or microelectronic substrate, e.g., semiconductor chip, the substrate having a plurality of metal conductive elements such as conductive pads 112, contacts, bond pads, traces, or the like exposed at the surface. A plurality of solid metal posts 130 may overlie and project away from respective ones of the conductive elements. An intermetallic layer 121 can be disposed between the posts and the conductive elements, such layer providing electrically conductive interconnection between the posts 130 and the conductive elements 112. Bases of the posts adjacent to the intermetallic layer can be aligned with the intermetallic layer.
Abstract:
An interconnection element (170, 190) is provided for conductive interconnection with another element (172) having at least one of microelectronic devices or wiring thereon. The interconnection element includes a dielectric element (187) having a major surface. A plated metal layer (130, 192) including a plurality of exposed metal posts (130) can project outwardly beyond the major surface (176) of the dielectric element. Some of the metal posts can be electrically insulated from each other by the dielectric element (187). The interconnection element typically includes a plurality of terminals (151) in conductive communication with the metal posts. The terminals can be connected through the dielectric element (187) to the metal posts (130). The posts may be defined by plating a metal (122, 124) onto exposed co-planar surfaces of a mandrel (120) and interior surfaces of openings (102) in a mandrel, after which the mandrel can be removed.
Abstract:
An interconnection element (170) can be formed by- plating a metal layer (124) within holes (106) in an essentially non-metallic layer (104) of a mandrel 120), wherein posts (130) can be plated onto a metal layer (102) exposed within the holes, e.g., a metal layer covering the holes in the non-metallic layer. The tips (160) of the posts can be formed adjacent to ends or bottoms of the blind holes. Terminals (151) can be formed in conductive communication with the conductive posts. The terminals can be connected through a dielectric layer (187) to the conductive posts. At least a portion of the mandrel (120) can then be removed from at least ends of the holes. In this way, the tips (160) of the conductive posts can become raised above a major surface (152), (176) of the interconnection element such that at least the tips of the posts project beyond the major surface.
Abstract:
A microelectronic interconnect element can include a plurality of first metal lines (110) and plurality of second metal lines (110') interleaved with the first metal lines (110). Each of the first and second metal lines has a surface (122), (120') extending within the same reference plane. The first metal lines (110) have surfaces (120) above the reference plane and remote therefrom and the second metal lines (110') have surfaces (122') below the reference plane and remote therefrom. A dielectric layer (114A) can separate a metal line of the first metal lines from an adjacent metal line of the second metal lines.
Abstract:
An interconnect element (130) can include a dielectric layer (116) having a top face (116b) and a bottom face (116a) remote from the top face, a first metal layer defining a plane extending along the bottom face and a second metal layer extending along the top face. One of the first or second metal layers, or both, can include a plurality of conductive traces (132, 134). A plurality of conductive protrusions (112) can extend upwardly from the plane defined by the first metal layer (102) through the dielectric layer (116). The conductive protrusions (112) can have top surfaces (126) at a first height (115) above the first metal layer (132) which may be more than 50% of a height of the dielectric layer. A plurality of conductive vias (128) can extend from the top surfaces (126) of the protrusions (112) to connect the protrusions (112) with the second metal layer.
Abstract:
An interconnect element (2) is provided which includes a dielectric element (4) having a first major surface, a second major surface remote from the first major surface, and a plurality of recesses extending inwardly from the first major surface. A plurality of metal traces (6), (6a) are embedded in the plurality of recesses, the metal traces having outer surfaces substantially co-planar with the first major surface and inner surfaces remote from the outer surfaces. A plurality of posts (8) extend from the inner surfaces of the plurality of metal traces (6), (6a) through the dielectric element (4), the plurality of posts having tops exposed at the second major surface. A multilayer wiring board (12) including a plurality of such interconnect elements (2) is also provided, as, well as various methods for making such interconnect elements and multilayer wiring boards.