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    THREE DIMENSIONAL MEMORY ARRAY WITH SELECT DEVICE
    2.
    发明公开
    THREE DIMENSIONAL MEMORY ARRAY WITH SELECT DEVICE 审中-公开
    与选择设备三维存储阵列

    公开(公告)号：EP3008754A4

    公开(公告)日：2017-03-22

    申请号：EP14811499

    申请日：2014-06-05

    申请人： MICRON TECHNOLOGY INC

    发明人： RAMASWAMY D V NIRMAL ,  SILLS SCOTT E ,  SANDHU GURTEJ S

    IPC分类号： H01L27/24 ,  H01L45/00

    CPC分类号： H01L27/249 ,  H01L27/11578 ,  H01L27/2409 ,  H01L27/2418 ,  H01L27/2427 ,  H01L45/06 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1226 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146

    摘要： Three dimensional memory arrays and methods of forming the same are provided. An example three dimensional memory array can include a stack comprising a plurality of first conductive lines separated from one another by at least an insulation material, and at least one conductive extension arranged to extend substantially perpendicular to the plurality of first conductive lines such that the at least one conductive extension intersects each of the plurality of first conductive lines. Storage element material is arranged around the at least one conductive extension, and a select device is arranged around the storage element material. The storage element material is radially adjacent an insulation material separating the plurality of first conductive lines, and the plurality of materials arranged around the storage element material are radially adjacent each of the plurality of first conductive lines.

    CROSS-POINT MEMORY STRUCTURES, AND METHODS OF FORMING MEMORY ARRAYS
    6.
    发明公开
    CROSS-POINT MEMORY STRUCTURES, AND METHODS OF FORMING MEMORY ARRAYS 有权
    交叉点内存结构和方法来形成存储器阵列

    公开(公告)号：EP2399287A2

    公开(公告)日：2011-12-28

    申请号：EP10744098.4

    申请日：2010-01-19

    申请人： Micron Technology, Inc.

    发明人： SILLS, Scott ,  SANDHU, Gurtej, S.

    IPC分类号： H01L21/8239 ,  H01L27/10 ,  H01L21/027

    CPC分类号： H01L27/2418 ,  H01L27/2463

    摘要： Some embodiments include cross-point memory structures. The structures may include a line of first electrode material extending along a first horizontal direction, a multi-sided container of access device materials over the first electrode material, a memory element material within the multi-sided container, and a line of second electrode material over the memory element material and extending along a second horizontal direction that is orthogonal to the first horizontal direction. Some embodiments include methods of forming memory arrays. The methods may include forming a memory cell stack over a first electrode material, and then patterning the first electrode material and the memory cell stack into a first set of spaced lines extending along a first horizontal direction. Spaced lines of second electrode material may be formed over the first set of spaced lines, and may extend along a second horizontal direction that is orthogonal to the first horizontal direction.

    DAMASCENE PROCESS FOR CARBON MEMORY ELEMENT WITH MIIM DIODE
    7.
    发明公开
    DAMASCENE PROCESS FOR CARBON MEMORY ELEMENT WITH MIIM DIODE 有权
    大马士革步骤中使用MIIM二极管碳存储元件

    公开(公告)号：EP2342752A1

    公开(公告)日：2011-07-13

    申请号：EP09792789.1

    申请日：2009-09-21

    申请人： Sandisk 3D LLC

    发明人： SCHRICKER, April, Dawn ,  SEKAR, Deepak, C. ,  FU, Andy ,  CLARK, Mark

    IPC分类号： H01L27/24 ,  H01L45/00

    CPC分类号： H01L45/1233 ,  H01L27/101 ,  H01L27/1021 ,  H01L27/2418 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/06 ,  H01L45/122 ,  H01L45/144 ,  H01L45/149 ,  H01L45/1683

    摘要： Forming a metal-insulator diode and carbon memory element in a single damascene process is disclosed. A trench having a bottom and a sidewall is formed in an insulator. A first diode electrode is formed in the trench during a single damascene process. A first insulating region comprising a first insulating material is formed in the trench during the single damascene process. A second insulating region comprising a second insulating material is formed in the trench during the single damascene process. A second diode electrode is formed in the trench during the single damascene process. The first insulating region and the second insulating region reside between the first diode electrode and the second diode electrode to form a metal-insulator-insulator-metal (MIIM) diode. A region of carbon is formed in the trench during the single damascene process. At least a portion of the carbon is electrically in series with the MIIM diode.

    NONVOLATILE SEMICONDUCTOR STORAGE DEVICE, AND METHOD FOR MANUFACTURING THE SAME
    8.
    发明公开
    NONVOLATILE SEMICONDUCTOR STORAGE DEVICE, AND METHOD FOR MANUFACTURING THE SAME 有权
    VERFAHREN ZU IHRER HERSTELLUNGNICHTFLÜCHTIGEHALBLEITERSPEICHERAN

    公开(公告)号：EP2234160A1

    公开(公告)日：2010-09-29

    申请号：EP08865349.8

    申请日：2008-12-26

    申请人： Panasonic Corporation

    发明人： The designation of the inventor has not yet been filed

    IPC分类号： H01L27/10 ,  H01L45/00 ,  H01L49/00 ,  H01L49/02

    CPC分类号： H01L27/1021 ,  H01L27/2409 ,  H01L27/2418 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1633

    摘要： A first wire layer (19) including first memory wires (12) is connected to a second wire layer (20) including second memory wires (17) via first contacts (21) penetrating a first interlayer insulating layer (13). The first wire layer (13) is connected to and led out to upper wires (22) via second contacts (26) connected to the second wire layer (20) and penetrating the second interlayer insulating layer (18). The first contacts (21) penetrate semiconductor layer (17b) or insulator layer (17c) of the second wire layer (20).

    摘要翻译： 包括第一存储器线（12）的第一布线层（19）通过穿过第一层间绝缘层（13）的第一触点（21）连接到包括第二存储器布线（17）的第二布线层（20）。 第一导线层（13）经由连接到第二导线层（20）并穿过第二层间绝缘层（18）的第二触点（26）连接并引出到上导线（22）。 第一触点（21）穿透第二导线层（20）的半导体层（17b）或绝缘体层（17c）。

    SEMICONDUCTOR CONSTRUCTIONS, ELECTRONIC SYSTEMS, AND METHODS OF FORMING CROSS-POINT MEMORY ARRAYS
    9.
    发明公开
    SEMICONDUCTOR CONSTRUCTIONS, ELECTRONIC SYSTEMS, AND METHODS OF FORMING CROSS-POINT MEMORY ARRAYS 审中-公开
    HALBLEITERKONSTRUKTIONEN，ELEKTRONISCHE SYSTEME UND VERFAHREN ZUR BILDUNG VON CROSSPOINT-SPEICHERARRAYS

    公开(公告)号：EP2150978A1

    公开(公告)日：2010-02-10

    申请号：EP08733169.0

    申请日：2008-04-08

    申请人： Micron Technology, Inc.

    发明人： MOULI, Chandra

    IPC分类号： H01L27/102 ,  G11C13/00 ,  H01L27/24 ,  H01L21/822 ,  H01L27/06

    CPC分类号： H01L27/1021 ,  G11C13/0002 ,  G11C2213/71 ,  G11C2213/72 ,  G11C2213/74 ,  H01L27/2418 ,  H01L27/2481

    摘要： The present application concerns vertical stacks of memory units (14, 16, 18), with individual memory units each having a memory element (28), a wordline (22), a bitline (24) and at least one diode (26). The memory units may correspond to cross-point memory, and the diodes may correspond to band-gap engineered diodes containing two or more dielectric layers sandwiched between metal layers. Tunneling properties of the dielectric materials and carrier injection properties of the metals may be tailored to engineer desired properties into the diodes. The diodes may be placed between the bitlines and the memory elements, or may be placed between the wordlines and memory elements. Some embodiments include methods of forming cross-point memory arrays. The memory arrays may contain vertical stacks- of memory unit cells, with individual unit cells containing cross-point memory and at least one diode, and adjacent memory units being spaced from one another by a passivation material (20).

    摘要翻译： 一些实施例包括存储器单元的垂直堆叠，其中各个存储器单元各自具有存储元件，字线，位线和至少一个二极管。 存储单元可以对应于交叉点存储器，并且二极管可以对应于包含夹在金属层之间的两个或多个电介质层的带隙工程二极管。 介电材料的隧道性能和金属的载流子注入性能可以被调整为将所需的性质设计到二极管中。 二极管可以放置在位线和存储器元件之间，或者可以放置在字线和存储元件之间。 一些实施例包括形成交叉点存储器阵列的方法。 存储器阵列可以包含存储单元单元的垂直堆叠，其中单个单元单元包含交叉点存储器和至少一个二极管。

    MEMORY STRUCTURES AND RELATED CROSS-POINT MEMORY ARRAYS, ELECTRONIC SYSTEMS, AND METHODS OF FORMING MEMORY STRUCTURES
    10.
    发明公开
    MEMORY STRUCTURES AND RELATED CROSS-POINT MEMORY ARRAYS, ELECTRONIC SYSTEMS, AND METHODS OF FORMING MEMORY STRUCTURES 审中-公开

    公开(公告)号：EP3295483A1

    公开(公告)日：2018-03-21

    申请号：EP16793133

    申请日：2016-04-19

    申请人： MICRON TECHNOLOGY INC

    发明人： SILLS SCOTT E ,  RAMASWAMY D V NIRMAL

    IPC分类号： H01L27/115

    CPC分类号： H01L27/2481 ,  G11C5/025 ,  H01L27/24 ,  H01L27/2418 ,  H01L27/2427 ,  H01L45/06 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/16

    摘要： A memory structure comprises first conductive lines extending in a first direction over portions of a base structure, storage element structures extending in the first direction over the first conductive lines, isolated electrode structures overlying portions of the storage element structures, select device structures extending in a second direction perpendicular to the first direction over the isolated electrode structures, second conductive lines extending in the second direction over the select device structures, additional select device structures extending in the second direction over the second conductive lines, additional isolated electrode structures overlying portions of the additional select device structures, additional storage element structures extending in the first direction over the additional isolated electrode structures, and third conductive lines extending in the first direction over the additional storage element structures. Cross-point memory arrays, electronic systems, and related methods are also described.