公开(公告)号：EP2110853A3

公开(公告)日：2011-10-12

申请号：EP09005275.4

申请日：2009-04-11

申请人： SEMIKRON Elektronik GmbH & Co. KG

发明人： Reusser, Lars ,  Lederer, Marco

IPC分类号： H01L25/07

CPC分类号： H01L23/48 ,  H01L25/072 ,  H01L2924/16195 ,  H01R13/2435

摘要： Die Erfindung beschreibt eine Anordnung in Druckkontaktierung mit einem Leistungshalbleitermodul, bestehend aus einem Gehäuse, mindestens einem elektrisch isolierenden Substrat, mit einer Mehrzahl darauf befindlicher gegeneinander isolierter metallischer Verbindungsbahnen, mit Leistungshalbleiterbauelementen und mit Anschlussleitern, mit einer außerhalb des Gehäuses angeordneten Leiterplatte und mit einem formstabilen Druckstück, welches aus einem Kunststoffformteil und einer Metalleinlage besteht und wobei das Kunststoffformteil mindestens einen Fixiervorsprung mit einer Ausnehmung entlang seiner Hochachse und die Metalleinlage eine entsprechend zugeordnete Aussparung aufweisen.

公开(公告)号：EP2362719A1

公开(公告)日：2011-08-31

申请号：EP10159936.3

申请日：2010-04-14

申请人： Walton Advanced Engineering Inc.

发明人： Yu, Hong-Chi

IPC分类号： H05K1/14 ,  H01L23/34 ,  H01L23/00

CPC分类号： H01R12/716 ,  H01L23/367 ,  H01L23/48 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/16 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01R12/73 ,  H05K1/0203 ,  H05K1/117 ,  H05K3/32 ,  H05K3/368 ,  H05K2201/0311 ,  H05K2201/10159 ,  H05K2201/1031 ,  Y02P70/611

摘要： A high-density integrated circuit module structure comprises at least a substrate (20) and a heat sink (30) wherein the substrates form a reversely-staggered contacting stack structure being formed with substrates electrically contacting heat sinks, and heat conductors (31) on the heat sink having at least one non-flat structure (311), allowing product's functions to be extended within an electronic product's restricted height, a better vibration resistance capability and heat dissipation effect, and simplified assembling procedure with no steps involving junctions between solder balls and a carrier, resulting in improved functions, increased capacity, and reduced manufacturing costs.

摘要翻译： 高密度集成电路模块结构至少包括衬底（20）和散热器（30），其中衬底形成反向交错的接触叠层结构，该结构形成有电接触散热器的衬底，以及热导体 散热器具有至少一个非平坦结构（311），允许产品的功能在电子产品的限制高度内延伸，更好的抗振性能和散热效果，以及简化的组装过程，不涉及焊球之间的接合 和运营商，从而改善功能，增加容量并降低制造成本。

公开(公告)号：EP2339628A1

公开(公告)日：2011-06-29

申请号：EP10195065.7

申请日：2010-12-15

申请人： STMicroelectronics (Rousset) SAS

发明人： Fornara, Pascal ,  Lisart, Mathieu

IPC分类号： H01L23/544

CPC分类号： G06K19/067 ,  H01L23/48 ,  H01L23/544 ,  H01L2223/54433 ,  H01L2223/54446 ,  H01L2924/0002 ,  H01L2924/00

摘要： Circuit intégré, comprenant un moyen de stockage (NVM) non volatil configuré pour stocker de façon secrète un mot numérique dont la valeur forme un code d'identification (CDI) du circuit intégré, des moyens de contrôle (CTML) configurés pour recevoir le mot numérique et pour générer des courants électriques transitoires ou des tensions transitoires dont les caractéristiques dépendent de la valeur du mot numérique, et un réseau électriquement conducteur (REC) configuré pour être parcouru par lesdits courants électriques transitoires ou recevoir lesdites tensions transitoires de façon à générer un champ électromagnétique.

摘要翻译： 该方法包括使用在集成电路内实现的导电网络（REC）产生电磁场，其中网络通过电瞬态电流或接收瞬态电压以产生电磁场。 电压的特性基于形成电路的识别码的数字字的值。 该值以秘密的方式存储在电路的非易失性存储器（NVM）即电子EPROM（EEPROM）中。 分析该字段是否发现代码。 还包括用于包括非易失性存储单元的集成电路的独立权利要求。

公开(公告)号：EP1564839B1

公开(公告)日：2011-06-08

申请号：EP05000752.5

申请日：2005-01-14

申请人： Hitachi, Ltd.

发明人： Hasebe, Takehiko ,  Goto, Yasushi ,  Uesaka, Kouichi ,  Yazawa, Yoshiaki ,  Torigoe, Makoto

IPC分类号： H01Q7/00 ,  H01Q1/22 ,  G06K19/077 ,  H01L23/538

CPC分类号： H01Q1/2225 ,  G06K7/10178 ,  G06K19/07749 ,  G06K19/07756 ,  G06K19/07775 ,  G06K19/07779 ,  G06K19/07783 ,  G06K19/07784 ,  H01L23/48 ,  H01L23/5227 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01Q1/22 ,  H01Q7/00 ,  H01L2924/00

摘要： The present invention intends to prevent the communication distance from becoming shorter with a reduction in size of a coil antenna to the chip size and with a consequent decrease of an induced voltage. According to the present invention there is provided a semiconductor chip (100) having a coil antenna (104, 207) and a circuit surface and adapted to transmit and receive signals by radio to and from an external device. The semiconductor chip has a configuration for increasing an electromagnetic coupling coefficient between the coil antenna and the external device. According to a concrete example thereof, a magnetic material is disposed, the coil antenna is formed by a stacked structure comprising plural conductor layers and insulating layers superimposed one on another, or the coil antenna is disposed outside an external form of a circuit of the semiconductor chip.

公开(公告)号：EP2327093A1

公开(公告)日：2011-06-01

申请号：EP09813617.9

申请日：2009-09-10

申请人： Micron Technology, Inc.

发明人： KEETH, Brent

IPC分类号： H01L23/12 ,  H01L23/48

CPC分类号： G11C5/02 ,  G11C5/06 ,  G11C7/10 ,  G11C7/20 ,  G11C2207/2227 ,  H01L23/12 ,  H01L23/48 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/16145 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/05099

摘要： Some embodiments include apparatus and methods having dice arranged in a stack. The dice include at least a first die and a second die, and a connection coupled to the dice. The connection may be configured to transfer control information to the first die during an assignment of a first identification to the first die and to transfer the control information from the first die to the second die during an assignment of a second identification to the second die.

公开(公告)号：EP2312924A1

公开(公告)日：2011-04-20

申请号：EP11001004.8

申请日：2006-07-07

申请人： Ibiden Co., Ltd.

发明人： Takahashi, Michimasa ,  Mikado, Yukinobu ,  Nakamura, Takenobu ,  Aoyama, Masakazu

IPC分类号： H05K3/46 ,  H05K1/11

CPC分类号： H01L23/48 ,  H01L2924/0002 ,  H05K1/115 ,  H05K3/00 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0352 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09709 ,  H05K2201/09827 ,  Y10T29/49124 ,  H01L2924/00

摘要： There is provided a multilayer printed wiring board in which each of insulating layers is 100 µm or less in thickness. Each of a plurality of viaholes electrically connecting conductor circuits on the insulating layers to each other is formed tapered inwardly from the surface of the insulating layer and the viaholes are disposed opposite to each other to form a multistage stacked via. This structure enables controlling such external stress as drop shock generated when the board is dropped and preventing the insulating substrate from warping, which leads to preventing cracking and disconnection of conductor circuit and minimizes the decrease of reliability and resistance to drop shock of the board.

公开(公告)号：EP2312923A1

公开(公告)日：2011-04-20

申请号：EP11001003.0

申请日：2006-07-07

申请人： Ibiden Co., Ltd.

发明人： Takahashi, Michimasa ,  Mikado, Yukinobu ,  Nakamura, Takenobu ,  Aoyama, Masakazu

IPC分类号： H05K3/46 ,  H05K1/11

CPC分类号： H01L23/48 ,  H01L2924/0002 ,  H05K1/115 ,  H05K3/00 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0352 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09709 ,  H05K2201/09827 ,  Y10T29/49124 ,  H01L2924/00

摘要： There is provided a multilayer printed wiring board in which each of insulating layers is 100 µm or less in thickness. Each of a plurality of viaholes electrically connecting conductor circuits on the insulating layers to each other is formed tapered inwardly from the surface of the insulating layer and the viaholes are disposed opposite to each other to form a multistage stacked via. This structure enables controlling such external stress as drop shock generated when the board is dropped and preventing the insulating substrate from warping, which leads to preventing cracking and disconnection of conductor circuit and minimizes the decrease of reliability and resistance to drop shock of the board.

公开(公告)号：EP2311089A1

公开(公告)日：2011-04-20

申请号：EP08874870.2

申请日：2008-12-31

申请人： Sony Ericsson Mobile Communications AB

发明人： LUNDBERG, Nils Magnus

IPC分类号： H01L25/10 ,  G02B6/43 ,  H01L25/18

CPC分类号： H01L25/105 ,  G02B6/43 ,  H01L23/3128 ,  H01L23/48 ,  H01L24/48 ,  H01L25/18 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2225/06527 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package-on-package (pop) stack (310) includes an upper package (402), an optical interface (502,602-1,602-2,704), and a lower package (404). The upper package sends an optical signal from a first component in the upper package. The optical interface receives the optical signal from the upper package, and transmits the optical signal. The lower package receives the optical signal from the optical interface, and may relay the optical signal to a second component in the lower package or at the motherboard.

公开(公告)号：EP2070016B1

公开(公告)日：2011-01-19

申请号：EP07820048.2

申请日：2007-09-06

申请人： Féinics AmaTech Teoranta

发明人： FINN, David

IPC分类号： G06K19/07 ,  G06K19/077 ,  H01L23/48 ,  H01F41/04

CPC分类号： G06K19/07749 ,  G06K19/0775 ,  G06K19/07779 ,  G06K19/07781 ,  H01F5/04 ,  H01F27/40 ,  H01F41/10 ,  H01L23/48 ,  H01L23/49855 ,  H01L24/06 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45025 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/4809 ,  H01L2224/4813 ,  H01L2224/4847 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/49111 ,  H01L2224/78301 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/85214 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01Q1/2225 ,  H01Q7/00 ,  H01Q23/00 ,  H01L2224/45639 ,  H01L2224/4569 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/85399 ,  H01L2224/05599

摘要： End portions (210a/b, 310a/b, 410a/b) of an antenna wire (210, 310, 410) mounted to an inlay substrate are left un-mounted, and are pre-positioned adjacent (rather than within or above) a site (designated area) on the substrate for receiving a transponder chip (208, 308, 408). After the transponder chip is installed on the substrate, the end portions of the antenna wire are re- posit ioned (FIG. 2B, FIG. 3C) to be over corresponding terminals (208a/b, 308a/b, 408a/b) of the transponder chip, for subsequent connection (bonding) thereto. Insulation from the wire may be removed (FIG. 6A) prior to bonding.

公开(公告)号：EP2259312A1

公开(公告)日：2010-12-08

申请号：EP09164685.1

申请日：2009-07-06

申请人： Walton Advanced Engineering Inc.

发明人： Yu, Hong-Chi

IPC分类号： H01L25/065 ,  H01L25/10 ,  H01L23/31 ,  H05K1/14 ,  H05K3/36

CPC分类号： H05K1/144 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/34 ,  H01L23/48 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01R13/2442 ,  H05K3/325 ,  H05K2201/0311 ,  H05K2201/097 ,  H05K2201/10189 ,  H05K2201/10424 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An inversely alternate stacked structure of integrated circuit (IC) modules includes at least one IC module (10), and at least a spring strip set (20). The IC module contains a substrate (11), at least an IC chip and a molding body, in which the substrate has an inner surface (111) and an outer surface (112), at least an external contact pad (113) is provided on one end of the outer surface, and at least a switch contact pad (114) is provided on the other end of the outer surface, the external contact pad and the switch contact pad are disposed in an inversely symmetrical manner. The spring strip set (20) has at least a non-flat structure (21). The external contact pad (113) of an IC module is electrically connected with the switch contact pad (114) of another IC module via the electrical contact of the non-flat structure (21) so that the IC modules are integrated to form an inversely alternate stacked structure.

摘要翻译： 集成电路（IC）模块的反交替层叠结构包括至少一个IC模块（10）和至少一个弹簧条组（20）。 IC模块包含至少一个IC芯片和成型体的基片（11），其中基片具有内表面（111）和外表面（112），至少提供一个外部接触垫（113） 在外表面的一端上，并且在外表面的另一端上设置至少一个开关接触垫（114），外部接触垫和开关接触垫以相反对称的方式设置。 弹簧带组20至少具有非平面结构21。 IC模块的外部接触焊盘（113）经由非平面结构（21）的电接触与另一个IC模块的开关接触焊盘（114）电连接，使得IC模块被集成以形成反向 交替堆叠结构。