公开(公告)号：EP0908559B1

公开(公告)日：2009-09-16

申请号：EP98118922.8

申请日：1998-10-07

Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.

Inventor： Gaku, Morio c/o Mitsubishi Gas Chemical Co., Inc. ,  Nozaki, Mitsuru c/o Mitsubishi Gas Chem. Co., Inc. ,  Saimen, Kenji c/o Kuraray Co., Ltd. ,  Esaki, Tamemaru c/o Kuraray Co., Ltd.

IPC: D21H13/24 ,  D21H17/53 ,  D21H25/06 ,  H05K1/00

CPC classification number: D21H13/24 ,  D21H17/53 ,  D21H25/06 ,  H05K1/0366 ,  H05K2201/0141 ,  H05K2201/0145 ,  H05K2201/0166 ,  H05K2201/0278 ,  H05K2201/0293 ,  Y10T428/24322 ,  Y10T442/2475

公开(公告)号：EP1894451A1

公开(公告)日：2008-03-05

申请号：EP06773555.5

申请日：2006-06-20

Applicant: 3M Innovative Properties Company

Inventor： LEE, Vincent Yong Chin ,  FU, Yi Liang ,  OHKURA, Yoshiyuki ,  ITO, Masahiko ,  KOYANAGI, Tatsunori,

IPC: H05K1/00 ,  H05K3/00

CPC classification number: H05K3/002 ,  H05K1/028 ,  H05K2201/0166 ,  H05K2201/0191 ,  H05K2201/09036 ,  H05K2203/1184

Abstract: An aspect of the present invention comprises a method of forming holes in a dielectric substrate comprising the steps of applying a layer of photoresist to a dielectric substrate, exposing portions of the photoresist to actinic radiation through a photomask to form a pattern in the photoresist for an array of holes to be etched in the substrate, developing the photoresist, etching the dielectric substrate to form an array of holes, each hole extending at least partially through the dielectric substrate, and removing the excess photoresist. Another aspect of the present invention is a method of simultaneously forming holes in a dielectric substrate some of which extend partially through the substrate and some of which extend completely through the substrate. Other aspects of the present invention are dielectric substrates formed using the methods of the invention.

公开(公告)号：EP1817947A1

公开(公告)日：2007-08-15

申请号：EP05851537.0

申请日：2005-11-10

Applicant: PPG Industries Ohio, Inc.

Inventor： OLSON, Kevin, C. ,  WANG, Alan, E. ,  ELENIUS, Peter ,  GOODMAN, Thomas, W.

IPC: H05K3/46 ,  H05K3/44

CPC classification number: H05K3/002 ,  H05K1/056 ,  H05K3/0052 ,  H05K3/403 ,  H05K3/44 ,  H05K3/445 ,  H05K3/4623 ,  H05K3/4641 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0397 ,  H05K2201/0909 ,  H05K2201/09181 ,  H05K2201/0919 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/09545 ,  H05K2201/09554 ,  H05K2201/09645 ,  H05K2201/09827 ,  H05K2203/1105 ,  H05K2203/135

Abstract: A circuit board or each circuit board of a multi-layer circuit board includes an electrically conductive sheet coated with an insulating top layer covering one surface of the conductive sheet, an insulating bottom layer covering another surface of the conductive sheet and an insulating edge layer covering an edge of the conductive sheet. An insulating interlayer can be sandwiched between a pair of adjacent circuit boards of a multi-layer circuit board assembly. A landless through-hole or via can extend through one or more of the circuit boards for connecting electrical conductors on opposing surfaces thereof.

公开(公告)号：EP0915125B1

公开(公告)日：2004-07-14

申请号：EP98120989.3

申请日：1998-11-05

Applicant: OJI PAPER CO., LTD.

Inventor： Kato, Yoshihisa ,  Adachi, Takekazu ,  Murata, Mamoru

IPC: C08J5/24 ,  C08J5/04 ,  B32B27/02 ,  D21H13/22 ,  D21H13/26

CPC classification number: B32B5/26 ,  B32B5/022 ,  B32B5/28 ,  B32B2260/021 ,  B32B2260/046 ,  B32B2262/0269 ,  B32B2457/08 ,  C08J5/048 ,  C08J5/24 ,  C08J2361/06 ,  H05K1/0366 ,  H05K2201/0145 ,  H05K2201/0166 ,  H05K2201/0278 ,  H05K2201/0293 ,  H05K2203/1105 ,  Y10T428/12569 ,  Y10T428/31594 ,  Y10T428/31725

公开(公告)号：EP1174766A3

公开(公告)日：2004-01-28

申请号：EP01306006.6

申请日：2001-07-12

Applicant: E.I. DU PONT DE NEMOURS AND COMPANY

Inventor： Choi, John Haetak

IPC: G03F7/00 ,  G03F7/033 ,  C04B41/45 ,  H01J9/24 ,  G03F7/11

CPC classification number: C04B41/009 ,  C04B41/4572 ,  C04B41/81 ,  G03F7/033 ,  G03F7/40 ,  H05K1/0306 ,  H05K3/002 ,  H05K2201/0166 ,  H05K2203/0786 ,  C04B41/4562 ,  C04B41/5031 ,  C04B35/581

Abstract: The invention is directed to a process for patterning ceramic tape wherein a photoresist is applied to a ceramic tape, which enables the photoresist, after being exposed patternwise, and developed, to act as a development mask for the tape. The tape then undergoes a development stage, which ultimately removes undesired sections of tape. The tape contains polymeric binder(s) with acidic or alkaline functional pendant groups but not photosensitive ingredients. Therefore, the tape is aqueous processable but itself cannot be photoimaged. However, when this tape is used with conventional photoresists that have the development chemistry opposite from that of the tape, it allows the photoresist to be used as a development barrier layer for the tape.

公开(公告)号：EP1174007A1

公开(公告)日：2002-01-23

申请号：EP99942249.6

申请日：1999-08-17

Applicant: 3M Innovative Properties Company

Inventor： LU, David, D.

IPC: H05K3/00

CPC classification number: H01L21/31133 ,  H05K3/002 ,  H05K2201/0145 ,  H05K2201/0154 ,  H05K2201/0166 ,  H05K2203/0793

Abstract: A process for making flexible circuits wherein the etching of a polymeric film is accomplished by dissolving portions thereof with concentrated aqueous base using a UV-curable 100 % active liquid photoresist as a mask, comprising the steps of laminating the resist on a polymeric film, exposing a pattern into the resist, developing the resist with a dilute aqueous solution until desired image is obtained, etching portions of the polymeric film not covered by the crosslinked resist with a concentrated base at a temperature of from 50 °C to 120 °C, and then stripping the resist off the polymeric film.

公开(公告)号：EP0908559A3

公开(公告)日：2000-03-29

申请号：EP98118922.8

申请日：1998-10-07

Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC. ,  Kuraray Co., Ltd.

Inventor： Gaku, Morio c/o Mitsubishi Gas Chemical Co., Inc. ,  Nozaki, Mitsuru c/o Mitsubishi Gas Chem. Co., Inc. ,  Saimen, Kenji c/o Kuraray Co., Ltd. ,  Esaki, Tamemaru c/o Kuraray Co., Ltd.

IPC: D21H13/24 ,  D21H17/53 ,  D21H25/06 ,  H05K1/00

CPC classification number: D21H13/24 ,  D21H17/53 ,  D21H25/06 ,  H05K1/0366 ,  H05K2201/0141 ,  H05K2201/0145 ,  H05K2201/0166 ,  H05K2201/0278 ,  H05K2201/0293 ,  Y10T428/24322 ,  Y10T442/2475

Abstract: There are disclosed a nonwoven reinforcement for a printed wiring base board which nonwoven reinforcement comprises a wet-system nonwoven fabric constituted of thermotropic cystalline polyester fiber having a melting point of 290°C or higher( component A ) and a thermotropic cystalline polyester binder which has a melting point of 290°C or higher and is in the form of a film having holes including at least 5 holes /mm 2 each with an area of opening of 400 to 10000 µm 2 ( component B ), the component A being fixed by the component B; a process for producing the above nonwoven reinforcement; a printed wiring base board produced from the above nonwoven reinforcement; and a printed wiring board produced from the above printed wiring base board. The nonwoven reinforcement and the printed wiring ( base) board are excellent in various performances such as uniformity, dimensional stability, heat resistance and electrical characteristics such as dielectric constasnt and dielectric loss tangent.

公开(公告)号：EP0605567B1

公开(公告)日：1999-05-26

申请号：EP92920447.7

申请日：1992-09-15

Applicant: DYMAX CORPORATION

Inventor： GROSCLAUDE, Gary V. ,  BACHMANN, Andrew G.

IPC: G03F7/027 ,  H05K3/34 ,  B05D1/32 ,  C08K3/26 ,  C09D4/00

CPC classification number: H05K3/305 ,  B05D1/327 ,  B23K35/224 ,  C09D4/00 ,  G03F7/027 ,  H05K3/0076 ,  H05K3/3452 ,  H05K2201/0166 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2203/0769 ,  H05K2203/0773 ,  H05K2203/0786 ,  Y02P70/613 ,  C08F220/00

Abstract: A water-soluble coating or other deposit is produced from a formulation that is comprised of a curable liquid substance and a dispersed, particulate effervescing agent. The formulation is particularly useful as a solder resist in the manufacture of PCBs, and the preferred composition contains n-vinyl-2-pyrrolidone, N,N-dimethylacrylamide, and polyvinylpyrrolidone.

公开(公告)号：EP0793406A1

公开(公告)日：1997-09-03

申请号：EP97103255.2

申请日：1997-02-27

Applicant: TOKYO OHKA KOGYO CO., LTD.

Inventor： Takiguchi, Yoshikazu ,  Obiya, Hiroyuki ,  Takahashi, Toru ,  Shiroyama, Taisuke ,  Tazawa, Kenji

IPC: H05K3/00 ,  H05K3/46

CPC classification number: H05K3/0044 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2203/025 ,  Y10S428/901 ,  Y10T428/24917

Abstract: An improved process for producing a multilayer wiring board that has a plurality of conductor patterns (2) and an interlevel dielectric layer (3) on at least one surface of a substrate (1), with via holes (5) or trench-like channels (8) being provided at specified sites of said interlevel dielectric layer (3) to establish an electrical interconnection between said conductor patterns (2), characterized in that prior to the provision of said via holes (5) or trench-like channels (8), a coating (4) having resistance to sandblasting is formed in a pattern over the interlevel dielectric layer (3) and then sandblasting is performed to remove the interlevel dielectric layer (3) in selected areas to form the via holes (5) or trench-like channels (8) and, thereafter, the coating (4) having resistance to sandblasting is removed, followed by the provision of a conductive layer (7).

Abstract translation: 一种用于制造多层布线板的改进方法，所述多层布线板在基板（1）的至少一个表面上具有多个导体图案（2）和层间电介质层（3），具有通孔（5）或沟槽状沟道 （8）设置在所述层间电介质层（3）的特定位置处，以在所述导体图案（2）之间建立电互连，其特征在于，在提供所述通孔（5）或沟槽状沟道 ），在层间电介质层（3）上以图案形成具有耐喷砂性的涂层（4），然后进行喷砂以在选定区域中除去层间电介质层（3）以形成通孔（5）或 沟槽状通道（8），然后除去具有喷砂性能的涂层（4），随后提供导电层（7）。

公开(公告)号：EP0527980B1

公开(公告)日：1997-06-11

申请号：EP92904744.7

申请日：1992-02-21

Applicant: DYCONEX PATENTE AG

Inventor： SCHMIDT, Walter ,  MARTINELLI, Marco ,  FREI, Alexandra

IPC: B07B1/46 ,  B01D67/00 ,  H05K3/00 ,  G02B6/12

CPC classification number: B07B1/4618 ,  B01D39/1692 ,  B01D67/0034 ,  B01D69/12 ,  B01D2323/345 ,  B07B1/4663 ,  G02B6/122 ,  G02B6/4228 ,  G02B6/423 ,  H05K1/0272 ,  H05K1/0393 ,  H05K3/0041 ,  H05K3/42 ,  H05K2201/0166 ,  H05K2201/0394 ,  H05K2201/064 ,  H05K2201/09509 ,  H05K2203/0554

Abstract: In order to produce a specific microsieve having a large number of precisely arranged passages of whatever form, a plastic foil (1) is coated with a layer of etch-resistant material (2, 2'). Recesses (4, 4') are etched in this layer (2, 2') at the locations where passages are to be formed. In a further process step, the passages (5) are produced by a plasma etching process. In addition, ducts (K, L) are inserted into the coating layer (2, 2') either as channels (K) or as solid paths. Several microsieves (S1, S2) are superimposed to form a specific composite body, oriented in such a way that the ducts (5, K, L) are cross-linked in the x, y and z directions. Examples of applications are fluid-conducting diaphragms, electroconductive multilayers and cross-linked light-guide microsystems.