公开(公告)号：EP1160856A3

公开(公告)日：2003-02-12

申请号：EP01113016.8

申请日：2001-05-28

申请人： NEC CORPORATION

发明人： Miyazaki, Takashi, c/o NEC Corporation

IPC分类号： H01L23/31 ,  H01L21/68

CPC分类号： H01L21/568 ,  H01L23/3107 ,  H01L23/3171 ,  H01L24/11 ,  H01L24/13 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/023 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/11003 ,  H01L2224/1111 ,  H01L2224/12105 ,  H01L2224/13 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13027 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/73204 ,  H01L2224/75252 ,  H01L2224/75743 ,  H01L2224/81801 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/351 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2224/11

摘要： A flip chip type semiconductor device is provided with a semiconductor chip (10) with a plurality of pad electrodes on one surface. A solder electrode (9) is connected to each pad electrode, and a metallic post (16b) is connected to each solder electrode (9). The surface of the semiconductor chip (10) on a side on which the pad electrodes are provided is coated with an insulating resin layer (11) and whole the pad electrode and solder electrode (9) and part of the metallic post (16b) are buried in the insulating resin layer (11). The remaining portion of the metallic post (16b) is projected from the insulating resin layer (11) to form a protrusion. Then, an outer solder electrode (13) is formed so as to cover this protrusion (16b). The outer solder electrodes (13) are arranged in a matrix on the insulating resin layer (11). The height of the protrusion is made 7 to 50% of the distance between an end of the outer solder electrode (13) and the surface of the insulating resin layer (11).

摘要翻译： 倒装芯片型半导体器件在一个表面上设置有多个焊盘电极的半导体芯片（10）。 焊接电极（9）连接到每个焊盘电极，并且金属柱（16b）连接到每个焊料电极（9）。 在其上设置焊盘电极的一侧上的半导体芯片（10）的表面涂覆有绝缘树脂层（11），整个焊盘电极和焊料电极（9）和金属柱（16b）的一部分是 埋在绝缘树脂层（11）中。 金属柱（16b）的剩余部分从绝缘树脂层（11）突出以形成突起。 然后，形成外部焊料电极（13）以覆盖该突起（16b）。 外部焊料电极（13）以矩阵形式布置在绝缘树脂层（11）上。 突起的高度为外部焊料电极（13）的端部与绝缘树脂层（11）的表面之间的距离的7〜50％。

公开(公告)号：EP1160856A2

公开(公告)日：2001-12-05

申请号：EP01113016.8

申请日：2001-05-28

申请人： NEC CORPORATION

发明人： Miyazaki, Takashi, c/o NEC Corporation

IPC分类号： H01L23/31 ,  H01L21/68

CPC分类号： H01L21/568 ,  H01L23/3107 ,  H01L23/3171 ,  H01L24/11 ,  H01L24/13 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/023 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/11003 ,  H01L2224/1111 ,  H01L2224/12105 ,  H01L2224/13 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13027 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/73204 ,  H01L2224/75252 ,  H01L2224/75743 ,  H01L2224/81801 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/351 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2224/11

摘要： A flip chip type semiconductor device is provided with a semiconductor chip (10) with a plurality of pad electrodes on one surface. A solder electrode (9) is connected to each pad electrode, and a metallic post (16b) is connected to each solder electrode (9). The surface of the semiconductor chip (10) on a side on which the pad electrodes are provided is coated with an insulating resin layer (11) and whole the pad electrode and solder electrode (9) and part of the metallic post (16b) are buried in the insulating resin layer (11). The remaining portion of the metallic post (16b) is projected from the insulating resin layer (11) to form a protrusion. Then, an outer solder electrode (13) is formed so as to cover this protrusion (16b). The outer solder electrodes (13) are arranged in a matrix on the insulating resin layer (11). The height of the protrusion is made 7 to 50% of the distance between an end of the outer solder electrode (13) and the surface of the insulating resin layer (11).

公开(公告)号：EP1949426A2

公开(公告)日：2008-07-30

申请号：EP06816841.8

申请日：2006-10-11

申请人： Freescale Semiconductor, Inc.

发明人： WENZEL, Robert J. ,  LEAL, George R.

IPC分类号： H01L21/44

CPC分类号： H01L23/485 ,  H01L23/53238 ,  H01L24/02 ,  H01L2224/023 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/00

摘要： Fine pitch contacts (42, 44, 46, 48) are achieved by using traces (70, 72, 74, 76) that extend to the contacts without requiring capture pads at the contact pads. Capture pads are desirably avoided because they have a diameter greater than the line to which they are attached. Preferably, adjacent contact pads are present in the same opening in the dielectric. The traces (70, 72, 74, 76) to the contact pads (42, 44, 46, 48) are in a line so that no widening is required where the lines make contact to the contact pads. The lines (70, 72, 74, 76) can be widened before they get to the contact pads but at the contact pads, they are substantially at the minimum width for the line. Thus, the contact pads can be at a pitch much lower than if capture pads were used.

公开(公告)号：EP3350831A1

公开(公告)日：2018-07-25

申请号：EP16774603.1

申请日：2016-09-20

申请人： Qualcomm Incorporated

发明人： VELEZ, Mario Francisco ,  BERDY, David Francis ,  YUN, Changhan Hobie ,  KIM, Jonghae ,  ZUO, Chengjie ,  KIM, Daeik Daniel ,  LAN, Je-Hsiung Jeffrey ,  MUDAKATTE, Niranjan Sunil ,  MIKULKA, Robert Paul

IPC分类号： H01L23/498

CPC分类号： H01L24/17 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/09 ,  H01L24/11 ,  H01L2224/023 ,  H01L2224/0905

摘要： An integrated circuit device in a wafer level package (WLP) includes ball grid array (BGA) balls fabricated with cavities filled with adhesives for improved solder joint reliability.

公开(公告)号：EP3140860A1

公开(公告)日：2017-03-15

申请号：EP15719392.1

申请日：2015-04-17

申请人： Qualcomm Incorporated

发明人： GU, Shiqun ,  RADOJCIC, Ratibor ,  KIM, Dong Wook ,  LEE, Jae Sik

IPC分类号： H01L23/498 ,  H01L21/48 ,  H05K3/46 ,  H01L21/56 ,  H01L23/14 ,  H01L25/065 ,  H01L25/10 ,  H01L21/60

CPC分类号： H01L21/568 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/145 ,  H01L23/15 ,  H01L23/3107 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/023 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16055 ,  H01L2224/16057 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/171 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81895 ,  H01L2224/81896 ,  H01L2224/83005 ,  H01L2224/92125 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01029 ,  H01L2924/1434 ,  H01L2924/1517 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/18161 ,  H05K3/4688 ,  H01L2924/014

摘要： An integrated device (e.g., integrated package) that includes a base portion for the integrated device, a first die (206) (e.g., first wafer level die), and a second die (208) (e.g., second wafer level die). The base portion includes a first inorganic dielectric layer (203), a first set of interconnects (280) located in the first inorganic dielectric layer, a second dielectric layer (202) different from the first inorganic dielectric layer, and a set of redistribution metal layers (230,240,250,260) in the second dielectric layer. The first die is coupled to a first surface of the base portion. The second die is coupled to the first surface of the base portion, the second die is electrically coupled to the first die through the first set of interconnects (280).

摘要翻译： 一些新颖的特征涉及在集成的装置（例如，集成的封装）那样包括用于集成装置，第一对（例如，第一晶片级模）的基部，和一个第二即（E. G.，第二晶片级模）。 基座部分包括第一无机介电层，第一组位于所述第一无机介电层中的互连，第二介电层从所述第一无机介电层不同，并且所述第二介电层中的一组再分布金属层。 第一个是连接到所述底座部分的第一表面上。 第二，其耦合到所述底座部分的第一表面，第二个是电通过所述第一组互连耦合到所述第一。

公开(公告)号：EP1949426A4

公开(公告)日：2012-07-25

申请号：EP06816841

申请日：2006-10-11

申请人： FREESCALE SEMICONDUCTOR INC

发明人： WENZEL ROBERT J ,  LEAL GEORGE R

IPC分类号： H01L21/44 ,  H01L23/485

CPC分类号： H01L23/485 ,  H01L23/53238 ,  H01L24/02 ,  H01L2224/023 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/00