公开(公告)号：EP2631255A4

公开(公告)日：2017-07-05

申请号：EP11834363

申请日：2011-10-18

申请人： MITSUBISHI CHEM CORP

发明人： IKEMOTO MAKOTO ,  KAWASE YASUHIRO ,  MURASE TOMOHIDE ,  TAKAHASHI MAKOTO ,  HIRAI TAKAYOSHI ,  KAMIMURA IHO

IPC分类号： C08G59/14 ,  C08G59/20

CPC分类号： H01L23/18 ,  C08L63/00 ,  C09D163/00 ,  H01L24/13 ,  H01L24/83 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/00

摘要： To provide an interlayer filler composition which, in 3D lamination of semiconductor device chips, forms a highly thermally conductive filling interlayer simultaneously with the bonding of solder bumps or the like and lands between semiconductor device chips, a coating fluid and a process for producing a three-dimensional integrated circuit. An interlayer filler composition for a three-dimensional integrated circuit, which comprises a resin (A) having a melt viscosity at 120°C of at most 100 Pa·s and a flux (B), the content of the flux (B) being at least 0.1 part by weight and at most 10 parts by weight per 100 parts by weight of the resin (A), or comprises a resin (A) having a melt viscosity at 120°C of at most 100 Pa·s and a coefficient of thermal conductivity of at least 0.2 W/mK, an inorganic filler (C) having a coefficient of thermal conductivity of at least 2 W/mK, a volume average particle size of at least 0.1 µm and at most 5 µm and a maximum volume particle size of at most 10 µm, and a curing agent (D) and/or a flux (B).

摘要翻译： 本发明提供一种层间填充剂组合物，其在半导体器件芯片的3D层叠中，与半导体器件芯片之间的焊料凸块等的接合以及焊盘的接合同时形成高导热填充中间层，涂布液和制造三 三维集成电路。 一种用于三维集成电路的层间填料组合物，其包含在120℃下的熔体粘度为至多100Pa·s的树脂（A）和助熔剂（B），所述助熔剂（B）的含量为 （A）100重量份中为0.1重量份以上且10重量份以下，或者包含120℃下的熔融粘度为100Pa·s以下的树脂（A） 至少0.2W / mK的导热系数，至少2W / mK的导热系数的无机填料（C），至少0.1μm并且至多5μm的体积平均粒径和最大体积 至多10μm的粒径，和固化剂（D）和/或助熔剂（B）。

公开(公告)号：EP2700098A1

公开(公告)日：2014-02-26

申请号：EP12717551.1

申请日：2012-04-19

申请人： Tessera, Inc.

发明人： HABA, Belgacem ,  ZOHNI, Wael ,  CRISP, Richard, Dewitt ,  MOHAMMED, Ilyas

IPC分类号： H01L25/065 ,  H01L23/31 ,  H01L25/10 ,  H01L21/98

CPC分类号： H01L25/0657 ,  H01L23/13 ,  H01L23/18 ,  H01L23/3128 ,  H01L23/4334 ,  H01L23/49816 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/4824 ,  H01L2224/50 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/00

摘要： A microelectronic assembly 100 can include a substrate 102 having first and second surfaces 104, 106 and first and second openings 116, 126 extending between the first and second surfaces, the first and second openings each having a long dimension extending in respective first and second transverse directions. The microelectronic assembly 100 can also have first and second microelectronic elements 136, 153 each having bond pads 142, 159 in a central region 924, 932 of a front surface 140, 157 thereof aligned with the respective first and second openings 116, 126. The front surface 140 of the first microelectronic element 136 can confront the first surface 104, and the front surface 157 of the second microelectronic element 153 can face a rear surface 138 of the first microelectronic element and can project beyond an edge 146 of the first microelectronic element. The bond pads 142, 159 of the first and second microelectronic elements 136, 153 can be electrically connected to conductive elements 109, 111 of the substrate 102.

公开(公告)号：EP2544228A2

公开(公告)日：2013-01-09

申请号：EP12168171.2

申请日：2012-05-16

申请人： SEMIKRON Elektronik GmbH & Co. KG

发明人： Besendörfer, Kurt-Georg ,  Erdner, Nadja ,  Steger, Jürgen

IPC分类号： H01L23/18 ,  H01L25/07 ,  H01L23/498

CPC分类号： H01L23/34 ,  H01L23/18 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/49833 ,  H01L23/4985 ,  H01L24/32 ,  H01L24/83 ,  H01L25/072 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/83101 ,  H01L2224/8384 ,  H01L2924/01068 ,  H05K7/2039

摘要： Die Anmeldung betrifft ein Leistungselektronisches System und ein zugehöriges Herstellungsverfahren mit einer Kühleinrichtung, mit einer Mehrzahl von Submodulen, jedes mit einem ersten flächigen Isolierstoffkörper, genau einer hiermit stoffschlüssigen verbundenen ersten Leiterbahnen, genau einem auf dieser Leiterbahn angeordneten Leistungsschalter, mindestens einer internen Verbindungseinrichtung aus einer alternierenden Schichtfolge mindestens einer elektrisch leitenden und mindestens einer elektrisch isolierenden Folien, wobei mindestens eine elektrisch leitende Schicht mindestens eine zweite Leiterbahn ausbildet und mit externen Anschlusselementen. Die Submodule sind hierbei stoff- oder kraftschlüssig und voneinander beabstandet mit ihrer ersten Hauptfläche auf der Kühleinrichtung angeordnet. Mindestens eine zweite Leiterbahn bedeckt erste Leiterbahnen zweier Submodule zumindest teilweise, verbindet diese elektrisch miteinander und überdeckt einen Zwischenraum zwischen den Submodulen.

摘要翻译： 系统具有一组子模块（16），平坦绝缘材料体（160）和布置在导体路径（162）上的电源开关。 内部连接装置具有导电箔和电绝缘箔。 导电层具有另一导体路径和连接元件。 子模块以牢固结合或强制配合的方式布置在冷却装置（14）中。 后一导体路径部分地覆盖前一个导体路径并且覆盖子模块之间的中间区域，其中路径彼此电连接。 电力电子系统的制造方法也包含独立权利要求。

公开(公告)号：EP1808954A3

公开(公告)日：2008-10-22

申请号：EP07007832.4

申请日：1992-09-17

申请人： Hitachi, Ltd.

发明人： Mori, Mutsuhiro ,  Saito, Ryuichi ,  Kimura, Shin, c/o Hitachi, Ltd. Intellectual Property Group ,  Nakata, Kiyoshi ,  Saitoo, Syuuji ,  Horie, Akira ,  Koike, Yoshihiko ,  Sekine, Shigeki

IPC分类号： H02M7/48 ,  H01L23/538 ,  H01L25/07 ,  H01L25/16

CPC分类号： H03K17/08148 ,  H01L23/04 ,  H01L23/18 ,  H01L23/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L25/16 ,  H01L25/18 ,  H01L29/66333 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01055 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/351 ,  H02M7/003 ,  H02M7/487 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： An IGBT module including a plurality of IGBT single modules each having a plurality of IGBT chips (31a, 31b), a diode chip (32a, 32b), an emitter terminal (E1; E2) and a collector terminal (C1; C2), these being disposed on one surface of an insulation plate (11a; 11b) through electrode plates (12a, 12b), a metal substrate (20) mounting the isolation plates (11a, 11b) of the plurality of IGBT single modules on one surface and a resin case (50) bonded on the surface of said metal substrate (20) and incorporating said IGBT single module. According to the invention the emitter terminals (E1, E2) and the collector terminals (C1, C2) of said plurality of IGBT single modules are exposed on an upper surface of said resin case (50), the emitter terminals (E1, E2) are disposed side by side on a straight line parallel with and near the front edge of said metal substrate (20), the collector terminals (C1) are disposed side by side on a straight line parallel with the straight line on which said emitter terminals (E1; E2) are disposed, and at least one protruding part (21a) is formed on the upper surface of said resin case (50) for delimiting said emitter terminals (E1, E2) from said collector terminals (C1, C2).

摘要翻译： 一种IGBT模块，包括多个IGBT单个模块，每个具有多个IGBT芯片（31a，31b），二极管芯片（32a，32b），发射极端子（E1; E2）和集电极端子（C1; C2） 它们通过电极板（12a，12b）设置在绝缘板（11a; 11b）的一个表面上，金属基板（20）将多个IGBT单模块的隔离板（11a，11b）安装在一个表面上， 结合在所述金属基板（20）的表面上并结合有所述IGBT单模块的树脂壳体（50）。 根据本发明，所述多个IGBT单模块的发射极端子（E1，E2）和集电极端子（C1，C2）暴露在所述树脂壳体（50）的上表面上，发射极端子（E1，E2） 并排设置在与所述金属基板（20）的前边缘平行并且靠近所述金属基板（20）的直线上的直线上，所述集电极端子（C1）并排设置在与所述发射极端子 E1; E2），并且至少一个突出部分（21a）形成在所述树脂箱（50）的上表面上，用于限定所述发射极端子（E1，E2）与所述集电端子（C1，C2）的距离。

公开(公告)号：EP3419050A1

公开(公告)日：2018-12-26

申请号：EP17177707.1

申请日：2017-06-23

申请人： ams International AG

发明人： Hofrichter, Jens ,  Meynants, Guy ,  Pertl, Josef ,  Troxler, Thomas

IPC分类号： H01L23/04 ,  H01L23/08 ,  H01L23/552 ,  H01L23/29 ,  H01L23/31 ,  H01L25/16 ,  H01L23/18

CPC分类号： H01L23/3121 ,  H01L23/18 ,  H01L23/29 ,  H01L23/552 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/167 ,  H01L27/14618 ,  H01L2224/04042 ,  H01L2224/16227 ,  H01L2224/2929 ,  H01L2224/29316 ,  H01L2224/29318 ,  H01L2224/29393 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48477 ,  H01L2224/73265 ,  H01L2924/01016 ,  H01L2924/01034 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/16251 ,  H01L2924/00014 ,  H01L2924/00012

摘要： The package includes a carrier (1) and an electronic device (2) on the carrier. A nanomaterial is provided for improved X-ray radiation hardness. A cover (3) or part of a cover (3), which is applied over the electronic device, is at least partially made from nanomaterial. The cover may be a glob top or an injection-molded cover.

公开(公告)号：EP2631255A1

公开(公告)日：2013-08-28

申请号：EP11834363.1

申请日：2011-10-18

申请人： Mitsubishi Chemical Corporation

发明人： IKEMOTO, Makoto ,  KAWASE, Yasuhiro ,  MURASE, Tomohide ,  TAKAHASHI, Makoto ,  HIRAI, Takayoshi ,  KAMIMURA, Iho

IPC分类号： C08G59/14 ,  C08G59/20

CPC分类号： H01L23/18 ,  C08L63/00 ,  C09D163/00 ,  H01L24/13 ,  H01L24/83 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/00

摘要： To provide an interlayer filler composition which, in 3D lamination of semiconductor device chips, forms a highly thermally conductive filling interlayer simultaneously with the bonding of solder bumps or the like and lands between semiconductor device chips, a coating fluid and a process for producing a three-dimensional integrated circuit.
An interlayer filler composition for a three-dimensional integrated circuit, which comprises a resin (A) having a melt viscosity at 120°C of at most 100 Pa·s and a flux (B), the content of the flux (B) being at least 0.1 part by weight and at most 10 parts by weight per 100 parts by weight of the resin (A), or comprises a resin (A) having a melt viscosity at 120°C of at most 100 Pa·s and a coefficient of thermal conductivity of at least 0.2 W/mK, an inorganic filler (C) having a coefficient of thermal conductivity of at least 2 W/mK, a volume average particle size of at least 0.1 µm and at most 5 µm and a maximum volume particle size of at most 10 µm, and a curing agent (D) and/or a flux (B).

摘要翻译： 以提供在层间填充物组合物，其在半导体器件芯片的三维层压，同时形成高导热填充层间有焊料凸点的接合或半导体器件芯片之间等和土地，涂布液和用于产生三个过程 维集成电路。 对于一个三维芯片，其包含树脂（A），其具有至多100帕·秒，在120℃的熔融粘度和焊剂（B），通量（B）的含量的层间填料组合物，其 至少0.1重量份和至多10重量份每100重量份所述树脂（A）的，或包含树脂（A），其具有在120℃的熔融粘度为100Pa·s以下，系数 至少0.2W / mK的，具有至少2个W / mK的，至少0.1微米，至多5微米的体积平均粒径和最大体积的热导率的系数的无机填料（C）的热导率的 至多10微米的颗粒大小，和固化剂（D）和/或通量（B）。

公开(公告)号：EP2095417A1

公开(公告)日：2009-09-02

申请号：EP07822743.6

申请日：2007-11-20

申请人： SIEMENS AKTIENGESELLSCHAFT

发明人： SCHWARZBAUER, Herbert

IPC分类号： H01L23/18

CPC分类号： H01L23/18 ,  H01L23/043 ,  H01L23/48 ,  H01L23/62 ,  H01L24/72 ,  H01L25/072 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1301 ,  H01L2924/13033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/19043 ,  H01L2924/00

摘要： The invention relates to power modules, particularly power modules comprising at least one electric power component, especially a power electronic semiconductor component (1). An electrical contact for a load current is created on a lower surface and an upper surface of said power semiconductor component (1). In order to reduce an explosion pressure and accept power when the power electronic semiconductor component (1) is overloaded, a hollow space (7) that is filled with at least one electrically conducting particle (5) is formed on an electrical contact surface (9) of the electrical contact. In case of a short circuit, an arc is initially generated above the semiconductor element thickness of the power semiconductor component (1), whereupon the filling in the hollow space (7) takes over current conduction. Preferably, the filling in the hollow space (7) is embodied as a plurality of spherical electrically conducting particles (5). The explosion pressure can escape into the interstices in the filling in case of a short circuit. Furthermore, metal vapors are cooled and are condensed. A duct extending from the hollow space (7) out of the hollow space (7) can additionally be created in order to reduce the explosion pressure, thus preventing power components from demolishing the surroundings thereof during an electrical overload. The invention makes it possible to improve a thyristor, for example.

公开(公告)号：EP1492220A3

公开(公告)日：2005-03-09

申请号：EP04021377.9

申请日：1992-09-17

申请人： Hitachi, Ltd.

发明人： Mori, Mutsuhiro ,  Saito, Ryuichi ,  Kimura, Shin ,  Nakata, Kiyoshi ,  Saitoo, Syuuji ,  Horie, Akira ,  Koike, Yoshihiko ,  Sekine, Shigeki

IPC分类号： H02M7/48 ,  H01L23/538 ,  H01L25/07

CPC分类号： H03K17/08148 ,  H01L23/04 ,  H01L23/18 ,  H01L23/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L25/16 ,  H01L25/18 ,  H01L29/66333 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01055 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/351 ,  H02M7/003 ,  H02M7/487 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： An IGBT module including a plurality of IGBT single modules each having a plurality of IGBT chips (31a, 31b), a diode chip (32a, 32b), an emitter terminal (E1; E2) and a collector terminal (C1; C2), these being disposed on one surface of an insulation plate (11a; 11b) through electrode plates (12a, 12b), a metal substrate (20) mounting the isolation plates (11a, 11b) of the plurality of IGBT single modules on one surface and a resin case (50) bonded on the surface of said metal substrate (20) and incorporating said IGBT single module. According to the invention the emitter terminals (E1, E2) and the collector terminals (C1, C2) of said plurality of IGBT single modules are exposed on an upper surface of said resin case (50), the emitter terminals (E1, E2) are disposed side by side on a straight line parallel with and near the front edge of said metal substrate (20), the collector terminals (C1) are disposed side by side on a straight line parallel with the straight line on which said emitter terminals (E1; E2) are disposed, and at least one protruding part (21a) is formed on the upper surface of said resin case (50) for delimiting said emitter terminals (E1, E2) from said collector terminals (C1, C2).

公开(公告)号：EP0803174A2

公开(公告)日：1997-10-29

申请号：EP96911182.0

申请日：1996-01-16

申请人： SPACE ELECTRONICS, INC.

发明人： STROBEL, David, J. ,  CZAJKOWSKI, David, R.

IPC分类号： H01L25 ,  H01L23

CPC分类号： H01L23/055 ,  H01L23/057 ,  H01L23/18 ,  H01L23/552 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L2224/05553 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/4823 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10161 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15312 ,  H01L2924/16152 ,  H01L2924/1616 ,  H01L2924/1617 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： The radiation shielded and packaged integrated circuit semiconductor device (400) includes a lid (470) secured to a base (410) to enclose the integrated circuit die (480) within, wherein the lid (470) and the base (410) are each constructed from a high-Z material to prevent radiation from penetrating therethrough. Another embodiment (700) includes a die attach slug (790) constructed from a high-Z material disposed between the integrated circuit die (780) and a base (710), in combination with a high-Z material lid (770) to substantially block incident radiation.

公开(公告)号：EP3336890A1

公开(公告)日：2018-06-20

申请号：EP17206860.3

申请日：2017-12-13

申请人： Infineon Technologies AG

发明人： Bayerer, Reinhold

IPC分类号： H01L23/31 ,  H01L23/29

CPC分类号： H01L23/293 ,  C09K21/06 ,  H01L23/18 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/3142 ,  H01L23/3157 ,  H01L23/3192 ,  H01L2223/58

摘要： A semiconductor package is described which meets a plurality of predetermined electrical, mechanical, chemical and/or environmental requirements. The semiconductor package includes a semiconductor die embedded in or covered by a molded plastic body, the molded plastic body satisfying only a subset of the plurality of predetermined electrical, mechanical, chemical and/or environmental requirements. The semiconductor package further includes a plurality of terminals protruding from the molded plastic body and electrically connected to the semiconductor die, and a coating applied to at least part of the molded plastic body and/or part of the plurality of terminals. The coating satisfies each predetermined electrical, mechanical, chemical and/or environmental requirement not satisfied by the molded plastic body.