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公开(公告)号：JP2009164582A
公开(公告)日：2009-07-23
申请号：JP2008297101
申请日：2008-11-20
IPC分类号： C08J5/24 , H05K3/46 , B32B5/26 , B32B7/02 , B32B27/04 , B32B27/18 , C08K3/38 , C08K9/08 , H05K1/02 , H05K1/03 , H05K3/42 , H05K3/44
CPC分类号： B32B27/12 , B32B5/26 , B32B27/04 , B32B2260/021 , B32B2262/101 , B32B2262/106 , B32B2307/202 , B32B2307/302 , B32B2457/00 , C08K3/38 , C08K9/08 , C08K2003/385 , H05K1/0206 , H05K1/0207 , H05K1/0366 , H05K1/0373 , H05K3/429 , H05K3/445 , H05K3/4623 , H05K3/4641 , H05K2201/0209 , H05K2201/0278 , H05K2201/0287 , H05K2201/0323 , Y10S428/901 , Y10T29/49124 , Y10T29/49165 , Y10T428/24917 , Y10T428/24994 , Y10T428/249942 , Y10T428/249945 , Y10T428/249946 , Y10T428/249947 , Y10T428/249951 , Y10T428/249952 , Y10T428/25 , Y10T428/292 , Y10T428/31504 , Y10T442/117 , Y10T442/2418
摘要： PROBLEM TO BE SOLVED: To provide prepregs, laminates, printed wiring board structures and materials and printed wiring boards that make it possible to construct printed wiring boards with improved thermal properties. SOLUTION: In one embodiment, prepregs 124 include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs 124 have substrate materials that include carbon. In other embodiments, the prepregs 124 include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates 120 and 122 that can act as ground and/or power planes. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译： 要解决的问题：提供预浸料，层压板，印刷线路板结构和材料以及印刷线路板，使得可以构造具有改善的热性能的印刷线路板。 解决方案：在一个实施例中，预浸料124包括浸渍有导电和导热树脂的基材。 在其它实施例中，预浸料124具有包括碳的基底材料。 在其它实施例中，预浸料124包括浸渍有导热树脂的基材。 在其他实施例中，印刷线路板结构包括可以用作接地和/或电源平面的导电和导热的层压板120和122。 版权所有（C）2009，JPO＆INPIT
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83.发明专利Method of manufacturing aluminum base heat dissipation board for electrical circuit 审中-公开制造电路用铝基热处理板的方法
公开(公告)号：JP2009108386A
公开(公告)日：2009-05-21
申请号：JP2007283640
申请日：2007-10-31
发明人： SUGAMOTO NORIAKI
CPC分类号： H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a heat dissipation board for an electrical circuit having excellent heat dissipation property by reliably carrying out sealing treatment on an aluminum board having an insulating layer formed by anodizing for a short time. SOLUTION: In the method of manufacturing the heat dissipation board for the electrical circuit by which a metallic coating film is formed by electroplating after forming a metal seed layer by a vapor phase growth method on the surface of the aluminum board having the insulating film formed by anodizing, the aluminum board after anodized is sealing-treated with a weak alkaline aqueous solution having pH buffering action and showing pH 7.0-9.0. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译： 解决的问题：提供一种通过在具有通过阳极氧化在短时间内形成的绝缘层的铝板上可靠地进行密封处理来制造具有优异散热特性的电路散热板的方法。 解决方案：在具有绝缘性的铝板的表面上通过气相生长法在形成金属种子层之后通过电镀形成金属涂膜的电路用散热板的制造方法中， 通过阳极氧化形成的膜，阳极氧化后的铝板用具有pH缓冲作用的弱碱性水溶液密封处理，显示pH为7.0-9.0。 版权所有（C）2009，JPO＆INPIT
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公开(公告)号：JP2009099621A
公开(公告)日：2009-05-07
申请号：JP2007267171
申请日：2007-10-12
申请人： Fujitsu Ltd , 富士通株式会社
发明人： IIDA KENJI , ABE TOMOYUKI , MAEHARA YASUTOMO , HIRANO SHIN , NAKAGAWA TAKASHI , YOSHIMURA HIDEAKI , YAMAWAKI SEIGO , OZAKI TOKUICHI
CPC分类号： H05K3/427 , H05K3/064 , H05K3/429 , H05K3/4608 , H05K2201/0281 , H05K2201/0323 , H05K2201/0347 , H05K2201/0959 , H05K2201/0969 , H05K2201/09809 , H05K2203/1178 , Y10T29/49126 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a substrate, that correctly etches a conductor formed on the surface of the substrate in the production steps for substrates including a step of forming a through-hole in the substrate and fill it with an insulating material. SOLUTION: The method includes the steps of: forming a through-hole 18 in a substrate 16; filling the through-hole 18 with an insulating material 20 and performing electroless plating to coat the surface of the substrate 16; applying photoresist on the electroless-plated layer 80 formed on the surface of the substrate 16; optically exposing and developing the photoresist so as to form a resist pattern 72 coating an end face of the through-hole 18 filled with the insulating material 20; etching conductor layers 14 and 19 formed on the surface of the substrate 16 while using the resist pattern 72 as a mask; and removing the resist pattern 72 coating the end face of the through-hole 18 from the substrate 16 while using the electroless-plated layer 80 as a release layer. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译： 要解决的问题：为了提供一种制造基板的方法，在基板的制造步骤中正确地蚀刻形成在基板的表面上的导体，包括在基板中形成通孔的步骤并将其填充 用绝缘材料。 解决方案：该方法包括以下步骤：在衬底16中形成通孔18; 用绝缘材料20填充通孔18并进行化学镀以涂覆基板16的表面; 在形成在基板16的表面上的化学镀层80上施加光致抗蚀剂; 光致曝光和显影光致抗蚀剂，以形成涂覆绝缘材料20的通孔18的端面的抗蚀图案72; 在使用抗蚀剂图案72作为掩模的同时，在基板16的表面上形成蚀刻导体层14和19; 并且在使用化学镀层80作为剥离层的同时，从基板16去除涂覆通孔18的端面的抗蚀剂图案72。 版权所有（C）2009，JPO＆INPIT
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公开(公告)号：JP2009038338A
公开(公告)日：2009-02-19
申请号：JP2008111653
申请日：2008-04-22
申请人： Nitto Denko Corp , 日東電工株式会社
发明人： YOKAI TAKAHIKO , OYABU KYOYA , NAITO TOSHIKI
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a suspension substrate with circuit capable of precisely mounting an electronic component and connecting a terminal of the electronic component with a terminal part of a conductor pattern with high precision. SOLUTION: A conductor pattern 4 formed on a base insulation layer 3 created on a metal support substrate 2 and having terminal parts 5 for connecting with a magnetic head, and a mark 9 formed on the metal support substrate 2 or on the base insulation layer 3 and having an opening hole 16 for creating a reference hole 10 for mounting the magnetic head are simultaneously formed. The reference hole 10 is formed by etching the metal support substrate 2 or the metal support substrate 2 and base insulation layer 3 arranged within the opening hole 16 of the mark 9. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译： 解决的问题：提供一种具有能够精确地安装电子部件的电路的制造悬架基板的方法，并且以高精度将电子部件的端子与导体图案的端子部分连接。 解决方案：形成在基体绝缘层3上的导体图案4，其形成在金属支撑基板2上并具有用于与磁头连接的端子部分5和形成在金属支撑基板2上或基底上的标记9 同时形成具有用于形成用于安装磁头的基准孔10的开孔16的绝缘层3。 通过蚀刻金属支撑基板2或配置在标记9的开口孔16内的金属支撑基板2和基底绝缘层3来形成基准孔10.（C）2009，JPO＆INPIT
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86.发明专利
公开(公告)号：JP2009021274A
公开(公告)日：2009-01-29
申请号：JP2007180657
申请日：2007-07-10
发明人： SO ISAMU , TANAKA TOMOHITO
摘要： PROBLEM TO BE SOLVED: To improve quality etc., by charging resin in a core hole of a metal core without leaving any air bubble when a metal core printed wiring board is manufactured.
SOLUTION: Before a resin-impregnated sheet 21 is put over the metal core 11 having the core hole 13, a conductive metal coating portion 22 made of copper foil 22a is provided on one side 21b of the resin-impregnated sheet 21 on the opposite side from a surface facing the metal core 11 and an end surface 21c connecting with the one side 21b and at an outer peripheral edge part 21d of a base material opposition surface connecting with the lower end surface, thereby preventing resin from projecting during heating and pressing.
COPYRIGHT: (C)2009,JPO&INPIT摘要翻译： 要解决的问题：为了提高质量等，通过在制造金属芯印刷线路板时将树脂填充到金属芯的芯孔中而不留下任何气泡。 解决方案：在将树脂浸渍片材21放在具有芯孔13的金属芯11之前，将由铜箔22a制成的导电金属涂覆部分22设置在树脂浸渍片材21的一侧21b上 与面对金属芯11的表面相对的一侧，以及与下端面连接的基材对置面的一侧21b和外周缘部21d的端面21c，防止树脂在加热时突出 并按压。 版权所有（C）2009，JPO＆INPIT
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公开(公告)号：JP4201436B2
公开(公告)日：2008-12-24
申请号：JP19969099
申请日：1999-07-14
申请人： 日東電工株式会社
CPC分类号： H05K3/462 , H05K3/4038 , H05K3/445 , H05K2201/0305 , H05K2201/09536 , Y10S428/901 , Y10T156/10 , Y10T428/24273 , Y10T428/24917 , Y10T428/266 , Y10T428/31681
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公开(公告)号：JP2008283210A
公开(公告)日：2008-11-20
申请号：JP2008182447
申请日：2008-07-14
发明人： OSANAI HIDEYO , FURO MASAHIRO
摘要： PROBLEM TO BE SOLVED: To solve the problem that a crack is formed in a bonding surface due to difference in a thermal expansion in each of materials, because a ceramics base member is fitted to a metallic base board through a metallic layer and a solder in a conventional ceramic electronic circuit board. SOLUTION: A melt is obtained by melting aluminum or aluminum alloy in a vacuum or an inert gas. Thereafter, the melt is brought into contact with the ceramics base member inside a mold under the vacuum or the inert-gas atmosphere. At that time, the melt is rigidly bonded to the ceramics base member by retaining to cool in a direct contact without interposing the oxidized layer of a metal surface, to each interface, and the melt is bonded to the ceramics base member by means of a brazing material. Otherwise, the melt is bonded to the ceramics base member in the order opposite to the above-described procedure. The metallic base board is specified to have a resistive strength of 320 MPa or less and a thickness of 1 mm or more. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译： 解决问题：为了解决由于每种材料中的热膨胀差异而在接合面上形成裂纹的问题，因为陶瓷基底部件通过金属层装配到金属基板上，并且 常规陶瓷电子电路板中的焊料。 解决方案：通过在真空或惰性气体中熔化铝或铝合金来获得熔体。 此后，在真空或惰性气体气氛下使熔体与模具内的陶瓷基体接触。 此时，熔融物通过保持直接接触而冷却而不将金属表面的氧化层插入到各界面中而与陶瓷基体部件刚性接合，熔融体通过以下方式结合到陶瓷基体部件 钎焊材料。 否则，熔体以与上述步骤相反的顺序结合到陶瓷基底部件上。 金属基板的电阻强度规定为320MPa以下，厚度为1mm以上。 版权所有（C）2009，JPO＆INPIT
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公开(公告)号：JP2008244199A
公开(公告)日：2008-10-09
申请号：JP2007083511
申请日：2007-03-28
发明人： NAKAZATO HIDEKI , IMAI TAKAHIRO , KOMIYAMA TORU
摘要： PROBLEM TO BE SOLVED: To eliminate generation of a defective product by disabling generation of short-circuit even if burrs are generated in the process of external shape of a double-sided wiring circuit board on which circuit patterns are formed on both surfaces.
SOLUTION: In the method for manufacturing a metal core circuit board, after a material to be processed 41 on which insulating layers 21a, 21a are laminated on both surfaces of a metal core 11 and a circuit pattern 31b is formed on these insulating layers is obtained, the external shape process is conducted to a base material 43 forming a product from the material to be processed 41 by shearing due to relative movement between a die and a punch. Moreover, the external shape process is conducted to the surface, as the die or punch contact surface, where the circuit pattern 31b is not provided at the area near the internal circumference of a virtual shearing line 44 showing a shearing position, among the front and rear surfaces of the part corresponding to the base material 43 in the material to be processed 41.
COPYRIGHT: (C)2009,JPO&INPIT摘要翻译： 要解决的问题：即使在两面布线电路板的外部形状的过程中产生毛刺，也通过禁止短路的产生来消除缺陷产物的产生，其中在其两面上形成电路图案 。 解决方案：在金属芯电路板的制造方法中，在金属芯11和电路图案31b的两面层叠有绝缘层21a，21a的被处理材料41之后，在这些绝缘层 通过模具和冲头之间的相对移动，通过剪切将外部形状处理传导到由待处理材料41形成产品的基材43。 此外，将外部形状处理作为模具或冲头接触面进行表面，其中电路图案31b没有设置在示出剪切位置的虚拟剪切线44的内圆周附近的区域中， 对应于待处理材料41中的基材43的部分的后表面。版权所有（C）2009，JPO＆INPIT
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