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公开(公告)号：JP4020097B2
公开(公告)日：2007-12-12
申请号：JP2004141215
申请日：2004-05-11
Applicant: セイコーエプソン株式会社
Inventor： 一巳 原
CPC classification number: H01L23/562 , H01L23/3171 , H01L29/0657 , H01L2924/0002 , H01L2924/3511 , H05K1/0271 , H05K2201/0166 , H05K2201/0352 , H05K2201/068 , H05K2201/09136 , H05K2201/09736 , H05K2201/09909 , H05K2201/10674 , H01L2924/00
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公开(公告)号：JP4613709B2
公开(公告)日：2011-01-19
申请号：JP2005184652
申请日：2005-06-24
Applicant: セイコーエプソン株式会社
Inventor： 一巳 原
IPC: H01L21/02
CPC classification number: H01L21/78 , H01L21/30604 , H01L21/6835 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381
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公开(公告)号：JP4165467B2
公开(公告)日：2008-10-15
申请号：JP2004204499
申请日：2004-07-12
Applicant: セイコーエプソン株式会社
Inventor： 一巳 原
IPC: H01L21/301 , C09J7/02 , C09J201/00
CPC classification number: H01L21/6836 , H01L21/67092 , H01L21/76898 , H01L23/3128 , H01L23/481 , H01L24/11 , H01L25/0657 , H01L2221/68327 , H01L2224/05001 , H01L2224/05009 , H01L2224/05025 , H01L2224/05166 , H01L2224/05184 , H01L2224/05644 , H01L2224/05647 , H01L2224/13025 , H01L2224/13099 , H01L2224/16 , H01L2225/06513 , H01L2924/01005 , H01L2924/01006 , H01L2924/01009 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/19043 , H01L2924/3025 , H01L2924/00 , H01L2924/00014
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Patent Agency Ranking
公开(公告)号：JP5151569B2
公开(公告)日：2013-02-27
申请号：JP2008059479
申请日：2008-03-10
Applicant: セイコーエプソン株式会社
Inventor： 一巳 原
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公开(公告)号：JP4072677B2
公开(公告)日：2008-04-09
申请号：JP2003007281
申请日：2003-01-15
Applicant: セイコーエプソン株式会社
Inventor： 一巳 原
IPC: H01L23/12 , H01L29/41 , H01L21/3205 , H01L21/52 , H01L23/48 , H01L23/485 , H01L23/52 , H01L25/065 , H01L25/07 , H01L25/18 , H05K3/30
CPC classification number: H01L24/02 , H01L23/481 , H01L25/0657 , H01L2224/02372 , H01L2224/0401 , H01L2224/05548 , H01L2224/13009 , H01L2224/16146 , H01L2225/06513 , H01L2225/06541 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/014 , H01L2924/07802 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/19043 , H01L2924/00
Abstract: A semiconductor chip includes: a semiconductor substrate; a penetrating electrode which is formed through the semiconductor substrate from a first surface to a second surface of the semiconductor substrate and has a projection which projects from the second surface; an insulating layer formed over an entire surface of the second surface. The insulating layer includes a first insulating section formed in a region around the projection and a second insulating section other than the first insulating section. The second insulating section is formed to be thinner than a thickest area of the first insulating section.
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公开(公告)号：JP5266650B2
公开(公告)日：2013-08-21
申请号：JP2007053784
申请日：2007-03-05
Applicant: セイコーエプソン株式会社
Inventor： 一巳 原
IPC: H01L23/522 , H01L21/3205 , H01L21/768
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device that includes a through-hole electrode having high reliability for joint, without causing production efficiency to decrease, to provide a method of fabricating the device, and to provide an electronic apparatus. SOLUTION: Electrode pads 5, 6 and through-hole electrodes 8, 9 are electrically connected via plugs 15, 16 having a ring-shape in plan view, respectively, wherein the electrode pads 5, 6 are formed on an active side 3 of a substrate 2; the through-hole electrodes 8, 9 are formed from the backside 7 of the substrate 2 toward the electrode pads 5, 6; and the plugs 15, 16 are installed in a standing manner from the electrode pads 5, 6 toward the through-hole electrodes 8, 9, respectively. Furthermore, insulating films 4a and 14 are formed continuously, from the outer periphery of the through-hole electrodes 8, 9 to the surfaces of the plugs 15, 16, while sandwiching the substrate 2. COPYRIGHT: (C)2008,JPO&INPIT
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公开(公告)号：JP4379102B2
公开(公告)日：2009-12-09
申请号：JP2003414757
申请日：2003-12-12
Applicant: セイコーエプソン株式会社
Inventor： 一巳 原
IPC: H01L23/52 , H01L25/065 , H01L21/3205 , H01L21/60 , H01L25/07 , H01L25/18
CPC classification number: H01L2224/16145
Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device, capable of accurately positioning a semiconductor chip to be laminated to a substrate, when packaging a semiconductor three-dimensionally. SOLUTION: An alignment mark 20a, that is formed by the same process as that for a through electrode 10a and is made of the same structure, is formed on a substrate 1. Semiconductor chips 30, 31, 32, 33, laminated using the alignment mark 20a, are aligned to the substrate 1. COPYRIGHT: (C)2005,JPO&NCIPI
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公开(公告)号：JP4155154B2
公开(公告)日：2008-09-24
申请号：JP2003355243
申请日：2003-10-15
Applicant: セイコーエプソン株式会社
Inventor： 一巳 原
IPC: H01L21/60 , H01L23/52 , H01L21/3205 , H01L23/12 , H01L25/065 , H01L25/07 , H01L25/18
CPC classification number: H01L2224/16
Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device which can prevent lowering of manufacturing yield by reducing the occurrence of fault when the semiconductor chip is laminated and can also improve connection property and connection strength, and also to provide a circuit board and an electronic apparatus provided with the semiconductor device. SOLUTION: The semiconductor device 1 is provided with a circuit board 10 which is as thin as about 50μm and a connection electrode 28 for connecting the active surface of the circuit board 10 on which an electronic circuit is formed and the rear surface of the circuit board. At the end of the part projected to the active surface side of a connecting electrode 28, a concave area 30 is formed, and a solder 32 is formed to fill the concave area 30. COPYRIGHT: (C)2005,JPO&NCIPI
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