公开(公告)号：US20160351453A1

公开(公告)日：2016-12-01

申请号：US14721402

申请日：2015-05-26

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Takashi Ando ,  Aritra Dasgupta ,  Balaji Kannan ,  Unoh Kwon

IPC: H01L21/8238 ,  H01L29/49 ,  H01L29/423 ,  H01L21/324 ,  H01L27/092

CPC classification number: H01L21/823857 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/324 ,  H01L21/823842 ,  H01L27/0922 ,  H01L29/105 ,  H01L29/42372 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

Abstract: Embodiments of the present invention provide a process that maintains a “keep cap” metal nitride layer on PFET devices within a CMOS structure. The keep cap metal nitride layer is in place while an N-type work function metal is formed on the NFET devices within the CMOS structure. A sacrificial rare earth oxide layer, such as a lanthanum oxide layer is used to facilitate removal of the n-type work function metal selective to the keep cap metal nitride layer.

Abstract translation: 本发明的实施例提供了在CMOS结构内在PFET器件上保持“保持帽”金属氮化物层的工艺。 在CMOS结构内的NFET器件上形成N型功函数金属时，保持帽金属氮化物层就位。 使用诸如氧化镧层的牺牲稀土氧化物层来去除对保持帽金属氮化物层有选择性的n型功函数金属。

公开(公告)号：US10263065B2

公开(公告)日：2019-04-16

申请号：US14932441

申请日：2015-11-04

Applicant: GLOBALFOUNDRIES INC.

Inventor： Domingo A. Ferrer Luppi ,  Aritra Dasgupta ,  Benjamin G. Moser

IPC: H01L49/02

Abstract: Methods of forming a metal resistor are provided. The methods may include: depositing a metal layer, e.g., tungsten, on a substrate; and forming the metal resistor by implanting a semiconductor species, e.g., silicon and/or germanium, into the metal layer to form a semiconductor-metal alloy layer from at least a portion of the metal layer. In certain embodiments, an adhesion layer may be deposited by ALD prior to metal layer depositing. The metal resistor has a sheet resistance that remains substantially constant prior to and after subsequent annealing.

公开(公告)号：US10361132B2

公开(公告)日：2019-07-23

申请号：US15476158

申请日：2017-03-31

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ruqiang Bao ,  Takashi Ando ,  Aritra Dasgupta ,  Kai Zhao ,  Unoh Kwon ,  Siddarth A. Krishnan

IPC: H01L21/02 ,  H01L21/28 ,  H01L29/49 ,  H01L29/51 ,  H01L21/285 ,  H01L21/311 ,  H01L27/092 ,  H01L21/8238

Abstract: The disclosure relates to semiconductor structures and, more particularly, to structures with thinned dielectric material and methods of manufacture. The method includes depositing a high-k dielectric on a substrate. The method further includes depositing a titanium nitride film directly on the high-k while simultaneously etching the high-k dielectric.

公开(公告)号：US10062618B2

公开(公告)日：2018-08-28

申请号：US14721402

申请日：2015-05-26

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Takashi Ando ,  Aritra Dasgupta ,  Balaji Kannan ,  Unoh Kwon

IPC: H01L27/11 ,  H01L21/8238 ,  H01L21/324 ,  H01L27/092 ,  H01L29/423 ,  H01L29/49

CPC classification number: H01L21/823857 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/324 ,  H01L21/823842 ,  H01L27/0922 ,  H01L29/105 ,  H01L29/42372 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

Abstract: Embodiments of the present invention provide a process that maintains a “keep cap” metal nitride layer on PFET devices within a CMOS structure. The keep cap metal nitride layer is in place while an N-type work function metal is formed on the NFET devices within the CMOS structure. A sacrificial rare earth oxide layer, such as a lanthanum oxide layer is used to facilitate removal of the n-type work function metal selective to the keep cap metal nitride layer.

公开(公告)号：US09748235B2

公开(公告)日：2017-08-29

申请号：US15013169

申请日：2016-02-02

Applicant: GLOBALFOUNDRIES INC.

Inventor： Aritra Dasgupta ,  Benjamin G. Moser ,  Mohammad Hasanuzzaman ,  Murshed M. Chowdhury ,  Shahrukh A. Khan ,  Shafaat Ahmed ,  Joyeeta Nag

IPC: H01L27/088 ,  H01L29/49 ,  H01L29/51 ,  H01L21/8234

CPC classification number: H01L27/0886 ,  H01L21/823431 ,  H01L21/82345 ,  H01L21/823821 ,  H01L21/823842 ,  H01L27/0924 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/511 ,  H01L29/518

Abstract: One aspect of the disclosure relates to a method of forming an integrated circuit structure. The method may include: forming a first work function metal over a set of fins having at least a first fin and a second fin; implanting the first work function metal with a first species; removing the implanted first work function metal from over the first fin such that a remaining portion of the implanted first work function metal remains over the second fin; forming a second work function metal over the set of fins including over the remaining portion of the implanted first work function metal; implanting the second work function metal with a second species; and forming a metal over the implanted second work function metal over the set of fins thereby forming the gate stack.

公开(公告)号：US20170221889A1

公开(公告)日：2017-08-03

申请号：US15013169

申请日：2016-02-02

Applicant: GLOBALFOUNDRIES INC.

Inventor： Aritra Dasgupta ,  Benjamin G. Moser ,  Mohammad Hasanuzzaman ,  Murshed M. Chowdhury ,  Shahrukh A. Khan ,  Shafaat Ahmed ,  Joyeeta Nag

IPC: H01L27/088 ,  H01L29/51 ,  H01L21/8234 ,  H01L29/49

CPC classification number: H01L27/0886 ,  H01L21/823431 ,  H01L21/82345 ,  H01L21/823821 ,  H01L21/823842 ,  H01L27/0924 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/511 ,  H01L29/518

Abstract: One aspect of the disclosure relates to a method of forming an integrated circuit structure. The method may include: forming a first work function metal over a set of fins having at least a first fin and a second fin; implanting the first work function metal with a first species; removing the implanted first work function metal from over the first fin such that a remaining portion of the implanted first work function metal remains over the second fin; forming a second work function metal over the set of fins including over the remaining portion of the implanted first work function metal; implanting the second work function metal with a second species; and forming a metal over the implanted second work function metal over the set of fins thereby forming the gate stack.

公开(公告)号：US20170125509A1

公开(公告)日：2017-05-04

申请号：US14932441

申请日：2015-11-04

Applicant: GLOBALFOUNDRIES INC.

Inventor： Domingo A. Ferrer Luppi ,  Aritra Dasgupta ,  Benjamin G. Moser

IPC: H01L49/02

CPC classification number: H01L28/24

Abstract: Methods of forming a metal resistor are provided. The methods may include: depositing a metal layer, e.g., tungsten, on a substrate; and forming the metal resistor by implanting a semiconductor species, e.g., silicon and/or germanium, into the metal layer to form a semiconductor-metal alloy layer from at least a portion of the metal layer. In certain embodiments, an adhesion layer may be deposited by ALD prior to metal layer depositing. The metal resistor has a sheet resistance that remains substantially constant prior to and after subsequent annealing.

公开(公告)号：US09431485B2

公开(公告)日：2016-08-30

申请号：US14580274

申请日：2014-12-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Shafaat Ahmed ,  Murshed M. Chowdhury ,  Aritra Dasgupta ,  Mohammad Hasanuzzaman ,  Shahrukh Akbar Khan ,  Joyeeta Nag

IPC: H01L21/265 ,  H01L29/10 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/1045 ,  H01L21/265 ,  H01L21/26513 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66795 ,  H01L29/7851

Abstract: A method of forming a finFET structure having an ion implanted intermediate region next to the channel region of a finFET gate. The intermediate region is formed in a manner to reduce or eliminate migration of the dopant to undoped regions of the finFET thus forming abrupt finFET junction.

Abstract translation: 一种在finFET栅极的沟道区域旁边形成离子注入中间区域的finFET结构的方法。 中间区域以减少或消除掺杂剂向finFET的未掺杂区域迁移的方式形成，从而形成突变的finFET结。