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公开(公告)号:US20220366962A1
公开(公告)日:2022-11-17
申请号:US17322724
申请日:2021-05-17
Applicant: Intel Corporation
Inventor: Rifat FERDOUS , Sung-Taeg KANG , Rohit S. SHENOY , Ali KHAKIFIROOZ , Dipanjan BASU
IPC: G11C11/408 , G11C11/4074 , G11C11/409 , G11C7/04
Abstract: After reading a 3D (three dimensional) NAND array, the wordlines of the 3D NAND array can be transitioned to ground in a staggered manner. The 3D NAND array includes a 3D stack with multiple wordlines vertically stacked, including a bottom-most wordline, a top-most wordline, and middle wordlines between the bottom-most wordline and the top-most wordline. A controller that controls the reading can set the multiple wordlines to a read voltage for reading operations and then transition a selected wordline of the multiple wordlines from the read voltage to ground prior to transitioning the other wordlines to ground. Thus, the controller will transition the other wordlines from the read voltage to ground after a delay.
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公开(公告)号:US20210117270A1
公开(公告)日:2021-04-22
申请号:US17133995
申请日:2020-12-24
Applicant: Intel Corporation
Inventor: Krishna K. PARAT , Ravi H. MOTWANI , Rohit S. SHENOY , Ali KHAKIFIROOZ
Abstract: Error correction coding (ECC) mis-corrected reads, if undetected, result in silent data corruption of a non-volatile memory device. Overcoming ECC mis-corrected reads is based on a read signature of a result of reading a page in the non-volatile memory device. An ECC mis-correct logic counts the number of bits in the end-most buckets into which the bits of the result is divided. End-most buckets that are overpopulated or starved reveal a tell-tale read signature of an ECC mis-correct. The ECC mis-correct is likely to occur when the read reference voltage level used to read the page is shifted in one direction or another to an extreme amount that risks reading data from a different page. Detecting ECC mis-corrected reads can be used to overcome the ECC mis-corrects and mitigate silent data corruption.
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公开(公告)号:US20210135048A1
公开(公告)日:2021-05-06
申请号:US17146453
申请日:2021-01-11
Applicant: Intel Corporation
Inventor: Khaled AHMED , Anup PANCHOLI , Ali KHAKIFIROOZ
Abstract: Micro light-emitting diode (LED) displays and assembly apparatuses are described. In an example, a pixel element for a micro-light emitting diode (LED) display panel includes a first color nanowire LED, a second color nanowire LED, the second color different than the first color, and a pair of third color nanowire LEDs, the third color different than the first and second colors. A continuous insulating material layer ius laterally surrounding the first color nanowire LED, the second color nanowire LED, and the pair of third color nanowire LEDs.
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公开(公告)号:US20190227751A1
公开(公告)日:2019-07-25
申请号:US16370743
申请日:2019-03-29
Applicant: Intel Corporation
Inventor: Ali KHAKIFIROOZ , Pranav KALAVADE , Xin GUO , Aliasgar S. MADRASWALA , Bharat M. PATHAK
Abstract: A memory device is designed to store data in multilevel storage cells (MLC storage cells). The memory device includes a controller that dynamically writes data to the storage cells according to a first MLC density or a second MLC density. The second density is less dense than the first density. For example, the controller can determine to use the first density when there is sufficient write bandwidth to program the storage cells at the first density. When the write throughput increases, the controller can program the same MLC storage cells at the second density instead of the first density, using the same program process and voltage.
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公开(公告)号:US20190157598A1
公开(公告)日:2019-05-23
申请号:US16239193
申请日:2019-01-03
Applicant: Intel Corporation
Inventor: Khaled AHMED , Ali KHAKIFIROOZ , Richmond HICKS
IPC: H01L51/50 , H01L33/20 , H01L27/32 , H01L51/56 , H01L33/24 , H01S5/183 , G02B27/01 , G06F3/01 , G02B27/10 , G02B6/35 , G02B6/27
Abstract: Embodiments related to emissive devices for displays are discussed. Some embodiments include light emitting diodes including an electron transport layer core having a tube shape with an inner and an outer sidewall, an emission layer on the inner and outer sidewalls, and a hole transport layer on the emission layer, displays and systems including such light emitting diodes, and methods for fabricating them. Other embodiments include emissive laser devices having an emission layer between a hole transport layer and an electron transport layer and first and second metasurface mirrors adjacent to the hole transport layer and the electron transport layer, respectively, displays and systems including such emissive laser devices, and methods for fabricating them.
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公开(公告)号:US20210193200A1
公开(公告)日:2021-06-24
申请号:US17195579
申请日:2021-03-08
Applicant: Intel Corporation
Inventor: Ali KHAKIFIROOZ , Pranav KALAVADE , Ravi H. MOTWANI , Chang Wan HA
Abstract: Examples herein relate to determining a number of defective bit lines in a memory region prior to applying a program or erase voltages. If a threshold number of bit lines that pass during a program or erase verify operation is used to determine if the program or erase operation passes or fails, the determined number of defective bit lines can be used to adjust the determined number of passes or fails. In some cases, examples described herein can avoid use of extra bit lines and look-up table circuitry to use in place of defective bit lines and save silicon space and cost associated with the use of extra bit-lines. In some examples, a starting magnitude of a program voltage signal can be determined by considering a number of defective bit lines. In some examples, identification of open or shorted bit lines can be used to identify read operations involving those open or shorted bit lines as weak in connection with performing soft bit read correction.
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公开(公告)号:US20190393377A1
公开(公告)日:2019-12-26
申请号:US16563558
申请日:2019-09-06
Applicant: Intel Corporation
Inventor: Khaled AHMED , Anup PANCHOLI , Ali KHAKIFIROOZ
Abstract: Micro light-emitting diode (LED) displays and assembly apparatuses are described. In an example, a pixel element for a micro-light emitting diode (LED) display panel includes a first color nanowire LED, a second color nanowire LED, the second color different than the first color, and a pair of third color nanowire LEDs, the third color different than the first and second colors. A continuous insulating material layer ius laterally surrounding the first color nanowire LED, the second color nanowire LED, and the pair of third color nanowire LEDs.
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公开(公告)号:US20180261785A1
公开(公告)日:2018-09-13
申请号:US15918893
申请日:2018-03-12
Applicant: Intel Corporation
Inventor: Khaled AHMED , Ali KHAKIFIROOZ , Richmond HICKS
IPC: H01L51/50 , H01L51/56 , H01L27/32 , G02B6/27 , G02B6/35 , G02B27/10 , G06F3/01 , G02B27/01 , H01S5/183
CPC classification number: H01L51/508 , G02B6/2706 , G02B6/3516 , G02B27/0172 , G02B27/0176 , G02B27/10 , G02B2027/0174 , G02B2027/0178 , G06F3/011 , H01L27/3211 , H01L27/323 , H01L27/326 , H01L33/20 , H01L33/24 , H01L51/5012 , H01L51/5064 , H01L51/56 , H01S5/183
Abstract: Embodiments related to emissive devices for displays are discussed. Some embodiments include light emitting diodes including an electron transport layer core having a tube shape with an inner and an outer sidewall, an emission layer on the inner and outer sidewalls, and a hole transport layer on the emission layer, displays and systems including such light emitting diodes, and methods for fabricating them. Other embodiments include emissive laser devices having an emission layer between a hole transport layer and an electron transport layer and first and second metasurface mirrors adjacent to the hole transport layer and the electron transport layer, respectively, displays and systems including such emissive laser devices, and methods for fabricating them.
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公开(公告)号:US20220084606A1
公开(公告)日:2022-03-17
申请号:US17023094
申请日:2020-09-16
Applicant: Intel Corporation
Inventor: Xiang YANG , Guangyu HUANG , Narayanan RAMANAN , Pranav KALAVADE , Ali KHAKIFIROOZ
Abstract: A method is described. The method includes programming a column of flash storage cells in a direction along the column in which a parasitic transistor that resides between a cell being programmed and an immediately next cell to be programmed has lower resistivity as compared to a corresponding parasitic transistor that exists if the programming were to be performed in an opposite direction along the column.
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公开(公告)号:US20210104285A1
公开(公告)日:2021-04-08
申请号:US16591978
申请日:2019-10-03
Applicant: Intel Corporation
Inventor: Xiang YANG , Shantanu R. RAJWADE , Ali KHAKIFIROOZ , Tarek Ahmed AMEEN BESHARI
Abstract: An apparatus is described. The apparatus includes a storage device controller having logic circuitry to apply a program voltage verification process for a first threshold level to a group of non volatile memory cells and correlate first program voltages for the group of non volatile memory cells determined from the process to a second threshold level to determine second program voltages for the second threshold level for the group of non volatile memory cells. The second threshold level is higher than the first threshold level.
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