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    Method of creating ultra-small nibble structures during mosfet fabrication
    1.
    发明授权
    Method of creating ultra-small nibble structures during mosfet fabrication 失效
    在mosfet制造期间创建超小型半字节结构的方法

    公开(公告)号：US5846873A

    公开(公告)日：1998-12-08

    申请号：US597586

    申请日：1996-02-02

    申请人： Michael P. Violette ,  Fernando Gonzalez

    发明人： Michael P. Violette ,  Fernando Gonzalez

    IPC分类号： H01L21/02 ,  H01L21/033 ,  H01L21/311 ,  H01L21/3205 ,  H01L21/3213 ,  H01L21/768

    CPC分类号： H01L21/76831 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/32053 ,  H01L21/32139 ,  H01L21/76895 ,  H01L28/20

    摘要： A method of creating ultra-small nibble structures using a modification of an already existing mask includes the steps of depositing a layer of nitride on a circuit being fabricated according to standard MOSFET process steps. A layer of photoresist is patterned using a modification of an existing mask, such as a contact mask modified to include a nibble pattern. The nitride layer and an underlying oxide layer are removed according to the patterned photoresist to create a contact opening and an opening over the field oxide. Spacers may be created in the opening over the field oxide. A conductive layer and a polysilicon layer exposed in the opening over the field oxide are removed extending the opening down to the field oxide to create a nibble structure in the polysilicon layer.

    摘要翻译： 使用已经存在的掩模的修改来创建超小型半字节结构的方法包括在根据标准MOSFET工艺步骤制造的电路上沉积氮化物层的步骤。 使用现有掩模的修改，例如修改为包括半字节图案的接触掩模，对光致抗蚀剂层进行图案化。 根据图案化的光致抗蚀剂去除氮化物层和下面的氧化物层，以在场氧化物上形成接触开口和开口。 可以在场氧化物的开口中产生间隔。 去除暴露在场氧化物上的开口中的导电层和多晶硅层，将开口向下延伸到场氧化物，以在多晶硅层中产生半字节结构。

    Local ground and V.sub.CC connection in an SRAM cell
    2.
    发明授权
    Local ground and V.sub.CC connection in an SRAM cell 失效
    SRAM单元中的本地接地和VCC连接

    公开(公告)号：US5741735A

    公开(公告)日：1998-04-21

    申请号：US650286

    申请日：1996-05-20

    申请人： Michael P. Violette ,  Fernando Gonzalez

    发明人： Michael P. Violette ,  Fernando Gonzalez

    IPC分类号： H01L21/74 ,  H01L21/768 ,  H01L21/8244 ,  H01L27/11 ,  H01L21/336

    CPC分类号： H01L21/743 ,  H01L27/11 ,  H01L27/1104 ,  H01L21/76895 ,  Y10S257/903

    摘要： A retrograde well region, having a buried layer of high conductivity, is formed in a semiconductor substrate. A trench structure is selectively etched in the semiconductor substrate down to a region proximate to or within the buried layer. A conducting local interconnect material is formed within and proximate to the trench structure to electrically connect surface portions of the substrate to the buried layer. The buried layer is used to provide a voltage source to an integrated circuit. In one application, a P-type buried layer provides ground potential or V.sub.SS to a source region of an N-channel FET transistor. In a second application, an N-type buried layer provides supply potential or V.sub.CC to a source of a P-channel FET transistor.

    摘要翻译： 在半导体衬底中形成具有高导电性掩埋层的逆行阱区。 沟槽结构在半导体衬底中被选择性地蚀刻到靠近或在掩埋层内的区域。 导电性局部互连材料形成在沟槽结构内部和附近，以将衬底的表面部分电连接到掩埋层。 掩埋层用于向集成电路提供电压源。 在一个应用中，P型埋层向N沟道FET晶体管的源极区提供接地电位或VSS。 在第二个应用中，N型掩埋层向P沟道FET晶体管的源极提供电源电位或VCC。

    Method of creating ultra-small nibble structures during MOSFET fabrication
    3.
    发明授权
    Method of creating ultra-small nibble structures during MOSFET fabrication 失效
    在MOSFET制造期间创建超小型半字节结构的方法

    公开(公告)号：US06180500B2

    公开(公告)日：2001-01-30

    申请号：US09181461

    申请日：1998-10-28

    申请人： Michael P. Violette ,  Fernando Gonzalez

    发明人： Michael P. Violette ,  Fernando Gonzalez

    IPC分类号： H01L213205

    CPC分类号： H01L21/76831 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/32053 ,  H01L21/32139 ,  H01L21/76895 ,  H01L28/20

    摘要： A method of creating ultra-small nibble structures using a modification of an already existing mask is comprised of the steps of depositing a layer of nitride on a circuit being fabricated according to standard MOSFET process steps. A layer of photoresist is patterned using a modification of an existing mask, such as a contact mask modified to include a nibble pattern. The nitride layer and an underlying oxide layer are removed according to the patterned photoresist to create a contact opening and an opening over the field oxide. Spacers may be created in the opening over the field oxide. A conductive layer and a polysilicon layer exposed in the opening over the field oxide are removed extending the opening down to the field oxide to create a nibble structure in the polysilicon layer.

    摘要翻译： 使用已经存在的掩模的修改来创建超小型半字节结构的方法包括在根据标准MOSFET工艺步骤制造的电路上沉积氮化物层的步骤。 使用现有掩模的修改，例如修改为包括半字节图案的接触掩模，对光致抗蚀剂层进行图案化。 根据图案化的光致抗蚀剂去除氮化物层和下面的氧化物层，以在场氧化物上形成接触开口和开口。 可以在场氧化物的开口中产生间隔。 去除暴露在场氧化物上的开口中的导电层和多晶硅层，将开口向下延伸到场氧化物，以在多晶硅层中产生半字节结构。

    Method of forming guard ringed schottky diode
    4.
    发明授权
    Method of forming guard ringed schottky diode 失效
    形成保护环肖特基二极管的方法

    公开(公告)号：US5696025A

    公开(公告)日：1997-12-09

    申请号：US597479

    申请日：1996-02-02

    申请人： Michael P. Violette ,  Fernando Gonzalez

    发明人： Michael P. Violette ,  Fernando Gonzalez

    IPC分类号： H01L21/329 ,  H01L21/28

    CPC分类号： H01L29/66143

    摘要： A method of forming a guard ring for a Schottky diode is comprised of the steps of forming anode and cathode contact openings. A layer of doped material is deposited and etched to create spacers in the anode and cathode openings. The outdiffusion of dopant from the spacers is controlled to form a guard ring in the well without affecting the active area. The method can be used to create a p-type guard ring in an n-well or an n-type guard ring in a p-well. A Schottky diode constructed according to the method is also disclosed.

    摘要翻译： 形成用于肖特基二极管的保护环的方法包括形成阳极和阴极接触开口的步骤。 沉积和蚀刻掺杂材料层，以在阳极和阴极开口中产生间隔物。 控制来自间隔物的掺杂剂的向外扩散，以在阱中形成保护环而不影响有效面积。 该方法可用于在p阱中的n阱或n型保护环中产生p型保护环。 还公开了根据该方法构造的肖特基二极管。

    Local ground and VCC connection in an SRAM cell
    5.
    发明授权
    Local ground and VCC connection in an SRAM cell 失效
    SRAM单元中的本地接地和VCC连接

    公开(公告)号：US06917083B1

    公开(公告)日：2005-07-12

    申请号：US08508117

    申请日：1995-07-27

    申请人： Michael P. Violette ,  Fernando Gonzalez

    发明人： Michael P. Violette ,  Fernando Gonzalez

    IPC分类号： H01L21/74 ,  H01L21/768 ,  H01L21/8244 ,  H01L27/11 ,  H01L29/76 ,  H01L29/94

    CPC分类号： H01L21/743 ,  H01L21/76895 ,  H01L27/11 ,  H01L27/1104 ,  Y10S257/903

    摘要： A retrograde well region, having a buried layer of high conductivity, is formed in a semiconductor substrate. A trench structure is selectively etched in the semiconductor substrate down to a region proximate to or within the buried layer. A conducting local interconnect material is formed within and proximate to the trench structure to electrically connect surface portions of the substrate to the buried layer. The buried layer is used to provide a voltage source to an integrated circuit. In one application, a P-type buried layer provides ground potential or VSS to a source region of an N-channel FET transistor. In a second application, an N-type buried layer provides supply potential or VCC to a source of a P-channel FET transistor.

    摘要翻译： 在半导体衬底中形成具有高导电性掩埋层的逆行阱区。 沟槽结构在半导体衬底中被选择性地蚀刻到靠近或在掩埋层内的区域。 导电性局部互连材料形成在沟槽结构内部和附近，以将衬底的表面部分电连接到掩埋层。 掩埋层用于向集成电路提供电压源。 在一个应用中，P型掩埋层向N沟道FET晶体管的源极区提供接地电位或V SS。 在第二个应用中，N型掩埋层向P沟道FET晶体管的源极提供电源电位或V CC CC。

    Semiconductor processing methods, semiconductor processing methods of forming diodes, and semiconductor processing methods of forming schottky diodes
    6.
    发明授权
    Semiconductor processing methods, semiconductor processing methods of forming diodes, and semiconductor processing methods of forming schottky diodes 有权
    半导体加工方法，形成二极管的半导体加工方法以及形成肖特基二极管的半导体加工方法

    公开(公告)号：US6140214A

    公开(公告)日：2000-10-31

    申请号：US141541

    申请日：1998-08-28

    申请人： Michael P. Violette ,  Fernando Gonzalez

    发明人： Michael P. Violette ,  Fernando Gonzalez

    IPC分类号： H01L21/265 ,  H01L21/285 ,  H01L21/329 ,  H01L21/425

    CPC分类号： H01L29/66143 ,  H01L21/28518 ,  H01L21/28537 ,  H01L21/26586

    摘要： Semiconductor processing methods, semiconductor processing methods of forming diodes, and semiconductor processing methods of forming Schottky diodes are described. In one embodiment, a first layer of material is formed over a substrate. A second layer of material is formed over the first layer of material. An opening is formed to extend through the first and second layers sufficient to expose a portion of the substrate. An angled ion implant is conducted through the opening and into the substrate. After the conducting of the angled ion implant, the second layer of material is removed. In another embodiment, a diode opening is formed in a layer of material over a semiconductive substrate. In another embodiment, a Schottky diode is formed by forming an opening in a layer of material which is formed over a semiconductive substrate, wherein the opening exposes a substrate portion. An angled ion implant is conducted through the opening and into the semiconductive substrate. A conductive layer of material, e.g. a silicide, is formed within the opening. In another embodiment, a Schottky diode is formed by conducting an angled ion implant of impurity into a semiconductive substrate sufficient to form an impurity ring which is received within the substrate. A conductive Schottky material layer is formed proximate the impurity ring.

    摘要翻译： 描述了半导体处理方法，形成二极管的半导体处理方法和形成肖特基二极管的半导体处理方法。 在一个实施例中，在衬底上形成第一层材料。 在第一层材料上形成第二层材料。 形成开口以延伸穿过第一和第二层足以露出基底的一部分。 成角度的离子植入物穿过开口并进入衬底。 在进行成角度的离子注入之后，去除第二层材料。 在另一个实施例中，二极管开口形成在半导体衬底上的材料层中。 在另一个实施例中，肖特基二极管是通过在半导体衬底上形成的材料层中形成开口形成的，其中开口露出衬底部分。 成角度的离子植入物穿过开口并进入半导体衬底。 材料的导电层，例如。 在开口内形成硅化物。 在另一个实施例中，肖特基二极管通过将杂质的成角度离子注入导入足以形成接收在衬底内的杂质环的半导体衬底中而形成。 在杂质环附近形成导电肖特基材料层。