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    Device and method for producing a device
    2.
    发明授权
    Device and method for producing a device 有权

    公开(公告)号：US10431715B2

    公开(公告)日：2019-10-01

    申请号：US15754959

    申请日：2016-08-23

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Barbara Behr ,  Andreas Weimar ,  Mathias Wendt ,  Marcus Zenger

    IPC: H01L33/00 ,  H01L23/00 ,  H01L33/62 ,  H01L33/32

    Abstract: A device and a method for producing a device are disclosed. In an embodiment the device includes a first component; a second component; and a connecting element arranged between the first component and the second component, wherein the connecting element comprises at least a first phase and a second phase, wherein the first phase comprises a first metal having a first concentration, a second metal having a second concentration and a third metal having a third concentration, wherein the second phase comprises the first metal having a fourth concentration, the second metal and the third metal, wherein the first metal, the second metal and the third metal are different from one another and are suitable for reacting at a processing temperature of less than 200° C., and wherein the following applies: c11≥c25 and c11≥c13≥c12.

    Semiconductor Chip, Optoelectronic Device with a Semiconductor Chip, and Method for Producing a Semiconductor Chip
    4.
    发明申请
    Semiconductor Chip, Optoelectronic Device with a Semiconductor Chip, and Method for Producing a Semiconductor Chip 有权
    具有半导体芯片的半导体芯片，光电子器件以及用于制造半导体芯片的方法

    公开(公告)号：US20170033092A1

    公开(公告)日：2017-02-02

    申请号：US15303436

    申请日：2015-03-18

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Andreas Weimar ,  Frank Singer ,  Anna Kasprzak-Zablocka ,  Sabine vom Dorp

    IPC: H01L25/16 ,  H01L23/48 ,  H01L23/60

    Abstract: A semiconductor chip, an optoelectronic device including a semiconductor chip, and a method for producing a semiconductor chip are disclosed. In an embodiment the chip includes a semiconductor body with a first main surface and a second main surface arranged opposite to the first main surface, wherein the semiconductor body includes a p-doped sub-region, which forms part of the first main surface, and an n-doped sub-region, which forms part of the second main surface and a metallic contact element that extends from the first main surface to the second main surface and that is electrically isolated from one of the sub-regions.

    Abstract translation: 公开了半导体芯片，包括半导体芯片的光电子器件和半导体芯片的制造方法。 在一个实施例中，芯片包括具有第一主表面和与第一主表面相对布置的第二主表面的半导体本体，其中半导体主体包括形成第一主表面的一部分的p掺杂子区域，以及 形成第二主表面的一部分的n掺杂子区域和从第一主表面延伸到第二主表面并且与一个子区域电隔离的金属接触元件。

    Adhesive Stamp and Method for Transferring Missing Semiconductor Chips
    5.
    发明申请
    Adhesive Stamp and Method for Transferring Missing Semiconductor Chips 有权

    公开(公告)号：US20210384051A1

    公开(公告)日：2021-12-09

    申请号：US17284280

    申请日：2019-10-04

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Simeon Katz ,  Andreas Weimar

    IPC: H01L21/67 ,  H01L21/683 ,  B65G47/90

    Abstract: In an embodiment, an adhesive stamp includes a plurality of variable-length stamp bodies arranged in an array, wherein each stamp body has an adhesive surface on a head portion of the stamp body, the adhesive surface configured to hold a semiconductor chip, wherein a first electrode is arranged in the head portion, wherein the first electrode is chargeable and whose polarity is changeable, wherein a second electrode is arranged in a foot portion of the stamp body, wherein the second electrode is chargeable and whose polarity is changeable, wherein a length of the stamp body is variable depending on charges applied to the first electrode and the second electrode, and wherein the adhesive stamp is configured to transfer semiconductor chips.

    METHOD OF FASTENING A SEMICONDUCTOR CHIP ON A LEAD FRAME, AND ELECTRONIC COMPONENT
    6.
    发明申请
    METHOD OF FASTENING A SEMICONDUCTOR CHIP ON A LEAD FRAME, AND ELECTRONIC COMPONENT 审中-公开

    公开(公告)号：US20200152480A1

    公开(公告)日：2020-05-14

    申请号：US16604252

    申请日：2018-04-18

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Mathias Wendt ,  Andreas Weimar

    IPC: H01L21/48 ,  H01L21/768 ,  H01L23/498

    Abstract: A method of attaching a semiconductor chip on a lead frame includes A) providing a semiconductor chip, B) applying a solder metal layer sequence to the semiconductor chip, wherein the solder metal layer sequence includes a first metallic layer including indium or an indium-tin alloy, C) providing a lead frame, D) applying a metallization layer sequence to the lead frame, wherein the metallization layer sequence includes a fourth layer including indium and/or tin arranged above the lead frame and a third layer including gold arranged above the fourth layer, E) forming an intermetallic intermediate layer including gold and indium, gold and tin or gold, tin and indium, G) applying the semiconductor chip to the lead frame via the solder metal layer sequence and the intermetallic intermediate layer, and H) heating the arrangement produced in G) to attach the semiconductor chip to the lead frame.

    OPTOELECTRONIC SEMICONDUCTOR CHIP
    8.
    发明申请
    OPTOELECTRONIC SEMICONDUCTOR CHIP 有权
    光电子半导体芯片

    公开(公告)号：US20160225952A1

    公开(公告)日：2016-08-04

    申请号：US15098779

    申请日：2016-04-14

    Applicant: OSRAM Opto Semiconductors GmbH

    Inventor： Joachim Hertkorn ,  Karl Engl ,  Berthold Hahn ,  Andreas Weimar

    IPC: H01L33/14 ,  H01L33/22 ,  H01L33/32 ,  H01L33/06

    CPC classification number: H01L33/145 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/0254 ,  H01L21/02631 ,  H01L21/02664 ,  H01L33/0066 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/0079 ,  H01L33/025 ,  H01L33/06 ,  H01L33/12 ,  H01L33/22 ,  H01L33/24 ,  H01L33/32 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An optoelectronic semiconductor chip includes a semiconductor layer sequence having an active layer that generates radiation and at least one n-doped layer adjoining the active layer, the semiconductor layer sequence is based on AlInGaN or on InGaN, one or a plurality of central layers composed of AlGaN each having thicknesses of 25 nm to 200 nm are grown at a side of the n-doped layer facing away from a carrier substrate, a coalescence layer of doped or undoped GaN having a thickness of 300 nm to 1.2 μm is formed at a side of the central layer or one of the central layers facing away from the carrier substrate, a roughening extends from the coalescence layer as far as or into the n-doped layer, a radiation exit area of the semiconductor layer stack is formed partly by the coalescence layer, and the central layer is exposed in places.

    Abstract translation: 光电子半导体芯片包括具有生成辐射的有源层和邻近有源层的至少一个n掺杂层的半导体层序列，半导体层序列基于AlInGaN或InGaN，一个或多个中心层由 在n型掺杂层背离载体衬底的一侧生长厚度为25nm至200nm的AlGaN，在侧面形成厚度为300nm至1.2μm的掺杂或未掺杂GaN的聚结层 的中心层或中心层中的一个背离载体衬底，粗糙化从聚结层延伸到n掺杂层的深度或深度，半导体层堆叠的辐射出射区域部分地通过聚结形成 层，中央层暴露在地方。

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