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公开(公告)号：US10283686B2
公开(公告)日：2019-05-07
申请号：US15544288
申请日：2016-01-11
Applicant: OSRAM Opto Semiconductors GmbH
IPC: H01L31/02 , H01L33/48 , H01L33/62 , H01L31/0203 , H01L33/40
Abstract: An optoelectronic semiconductor component includes an optoelectronic semiconductor chip; and an electrical connection point that contacts the optoelectronic semiconductor chip, wherein the electrical connection point covers the optoelectronic semiconductor chip on the bottom thereof at least in some areas, the electrical connection point includes a contact layer facing toward the optoelectronic semiconductor chip, the electrical connection point includes at least one barrier layer arranged on a side of the contact layer facing away from the optoelectronic semiconductor chip, the electrical connection point includes a protective layer arranged on the side of the at least one barrier layer facing away from the contact layer, the layers of the electrical connection point are arranged one on top of another along a stack direction, and the stack direction runs perpendicular to a main extension plane of the optoelectronic semiconductor chip.
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公开(公告)号：US10263155B2
公开(公告)日：2019-04-16
申请号：US15756935
申请日：2016-08-31
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Korbinian Perzlmaier , Anna Kasprzak-Zablocka , Christian Leirer
IPC: H01L21/00 , H01L33/38 , H01L33/00 , H01L33/44 , H01L33/50 , H01L33/54 , H01L33/62 , H01L33/22 , H01L33/30 , H01L33/32 , H01L33/40
Abstract: A method for producing an optoelectronic component is disclosed. In an embodiment the method includes a metallization with first mask structures is deposited directionally, and then a first passivation material is deposited non-directionally onto the metallization. Further, cutouts are introduced into the semiconductor body, such that the cutouts extend right into an n-type semiconductor region, and a second passivation material is applied on side faces of the cutouts. Furthermore, an n-type contact material is applied, structured and passivated. Moreover, contact structures are arranged on the semiconductor body and electrically connected to the n-type contact material and the metallization, wherein the contact structures and the semiconductor body are covered with a potting.
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3.发明授权公开(公告)号：US10164143B2
公开(公告)日：2018-12-25
申请号：US15661614
申请日：2017-07-27
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Karl Engl , Markus Maute , Stefanie Rammelsberger , Anna Kasprzak-Zablocka
Abstract: An optoelectronic semiconductor chip has a semiconductor body and a substrate on which the semiconductor body is disposed. The semiconductor body has an active region disposed between a first semiconductor layer of a first conductor type and a second semiconductor layer of a second conductor type. The first semiconductor layer is disposed on the side of the active region facing the substrate. The first semiconductor layer is electrically conductively connected to a first termination layer that is disposed between the substrate and the semiconductor body. An encapsulation layer is disposed between the first termination layer and the substrate and, in plan view of the semiconductor chip, projects at least in some regions over a side face which delimits the semiconductor body.
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公开(公告)号：US20180254386A1
公开(公告)日：2018-09-06
申请号：US15756676
申请日：2016-08-22
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Korbinian Perzlmaier , Anna Kasprzak-Zablocka , Lutz Höppel , Christian Leirer
CPC classification number: H01L33/486 , H01L33/58 , H01L33/60 , H01L33/62 , H01L33/642
Abstract: An optoelectronic semiconductor component includes an active layer arranged between a p-type semiconductor region and an n-type semiconductor region, a carrier including a plastic and a first via and a second via, a p-contact layer and an n-contact layer arranged between the carrier and a semiconductor body at least in some regions, wherein the p-contact layer electrically joins the first via and the p-type semiconductor region, and the n-contact layer electrically joins the second via and the n-type semiconductor region, a metallic reinforcing layer arranged at least in some regions between the n-contact layer and the carrier, wherein the metallic reinforcing layer is at least 5 μm thick, and at least one p-contact feed-through arranged between the first via and the p-contact layer, wherein the p-contact feed-through is at least 5 μm thick and surrounded in a lateral direction by the reinforcing layer at least in some regions.
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5.发明申请公开(公告)号：US20170324000A1
公开(公告)日：2017-11-09
申请号：US15661614
申请日：2017-07-27
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Karl Engl , Markus Maute , Stefanie Rammelsberger , Anna Kasprzak-Zablocka
CPC classification number: H01L33/0075 , H01L33/382 , H01L33/385 , H01L33/405 , H01L33/52 , H01L2933/005
Abstract: An optoelectronic semiconductor chip has a semiconductor body and a substrate on which the semiconductor body is disposed. The semiconductor body has an active region disposed between a first semiconductor layer of a first conductor type and a second semiconductor layer of a second conductor type. The first semiconductor layer is disposed on the side of the active region facing the substrate. The first semiconductor layer is electrically conductively connected to a first termination layer that is disposed between the substrate and the semiconductor body. An encapsulation layer is disposed between the first termination layer and the substrate and, in plan view of the semiconductor chip, projects at least in some regions over a side face which delimits the semiconductor body.
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Patent Agency Ranking
公开(公告)号：US11430917B2
公开(公告)日：2022-08-30
申请号：US16615835
申请日：2018-05-17
Applicant: Osram Opto Semiconductors GmbH
Inventor： Isabel Otto , Anna Kasprzak-Zablocka , Christian Leirer , Berthold Hahn
IPC: H01L33/40 , H01L33/38 , H01L33/00 , H01L31/0216 , H01L31/0224 , H01L33/32
Abstract: A semiconductor component may include a semiconductor body having a first semiconductor layer and a second semiconductor layer, a first main face and a second main face, opposite from the first main face, the first main face being formed by a surface of the first semiconductor layer and the second main face being formed by a surface of the second semiconductor layer. At least one side face may join the first main face to the second main face, an electrically conducting carrier layer, which covers the second main face at least in certain regions and extends from the second main face to at least one side face of the semiconductor body. An electrically conducting continuous deformation layer may cover the second main face at least in certain regions. The electrically conducting deformation layer may have an elasticity that is identical to or higher than the electrically conducting carrier layer.
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公开(公告)号：US10290784B2
公开(公告)日：2019-05-14
申请号：US15574809
申请日：2016-05-12
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Korbinian Perzlmaier , Stefanie Rammelsberger , Anna Kasprzak-Zablocka , Julian Ikonomov , Christian Leirer
IPC: H01L33/00 , H01L33/62 , H01L23/00 , H01L33/48 , H01L33/60 , H01L27/15 , H01L31/02 , H01L31/0203 , H01L31/0232 , H01L31/18 , H01L33/40
Abstract: An optoelectronic semiconductor component comprises an optoelectronic semiconductor chip (C1) having an electrically conductive substrate (T), an active part (AT) containing epitaxially grown layers, and an intermediate layer (ZS) which is arranged between the substrate (T) and the active part (AT) and contains a solder material. The optoelectronic semiconductor component further comprises an electrical connection point, which at least partially covers an underside of the substrate (T), wherein the electrical connection point comprises a first contact layer (KS1) on a side facing the substrate (T), and the first contact layer (KS1) contains aluminium or consists of aluminium.
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公开(公告)号：US20180254383A1
公开(公告)日：2018-09-06
申请号：US15756935
申请日：2016-08-31
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Korbinian Perzlmaier , Anna Kasprzak-Zablocka , Christian Leirer
CPC classification number: H01L33/382 , H01L33/0079 , H01L33/22 , H01L33/30 , H01L33/32 , H01L33/387 , H01L33/40 , H01L33/44 , H01L33/505 , H01L33/54 , H01L33/62 , H01L2933/0016 , H01L2933/0025 , H01L2933/0033 , H01L2933/0041 , H01L2933/005 , H01L2933/0066
Abstract: A method for producing an optoelectronic component is disclosed. In an embodiment the method includes a metallization with first mask structures is deposited directionally, and then a first passivation material is deposited non-directionally onto the metallization. Further, cutouts are introduced into the semiconductor body, such that the cutouts extend right into an n-type semiconductor region, and a second passivation material is applied on side faces of the cutouts. Furthermore, an n-type contact material is applied, structured and passivated. Moreover, contact structures are arranged on the semiconductor body and electrically connected to the n-type contact material and the metallization, wherein the contact structures and the semiconductor body are covered with a potting.
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公开(公告)号：US20180212121A1
公开(公告)日：2018-07-26
申请号：US15742106
申请日：2016-07-11
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Christian Leirer , Korbinian Perzlmaier , Anna Kasprzak-Zablocka , Berthold Hahn , Thomas Schwarz
CPC classification number: H01L33/62 , H01L33/0079 , H01L33/0095 , H01L33/22 , H01L33/382 , H01L33/44 , H01L33/486 , H01L33/505 , H01L33/52 , H01L33/647 , H01L2933/0016 , H01L2933/0025 , H01L2933/0033 , H01L2933/0041
Abstract: A component includes a carrier having a front side facing towards a semiconductor body and a rear side facing away from the semiconductor body, each of which is formed at least in places by a surface of a shaped body, a metal layer contains a first sub-region and a second sub-region, wherein the first sub-region and the second sub-region adjoin the shaped body in a lateral direction, are electrically connectable in a vertical direction on the front side of the carrier, are assigned to different electrical polarities of the component and are thus configured to electrically contact the semiconductor body, and the carrier has a side face running perpendicularly or obliquely to the rear side of the carrier and is configured as a mounting surface of the component, wherein at least one of the sub-regions is electrically connectable via the side face and exhibits singulation traces.
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公开(公告)号：US10535806B2
公开(公告)日：2020-01-14
申请号：US15742106
申请日：2016-07-11
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Christian Leirer , Korbinian Perzlmaier , Anna Kasprzak-Zablocka , Berthold Hahn , Thomas Schwarz
IPC: H01L33/62 , H01L33/48 , H01L33/52 , H01L33/00 , H01L33/22 , H01L33/38 , H01L33/44 , H01L33/50 , H01L33/64
Abstract: A component includes a carrier having a front side facing towards a semiconductor body and a rear side facing away from the semiconductor body, each of which is formed at least in places by a surface of a shaped body, a metal layer contains a first sub-region and a second sub-region, wherein the first sub-region and the second sub-region adjoin the shaped body in a lateral direction, are electrically connectable in a vertical direction on the front side of the carrier, are assigned to different electrical polarities of the component and are thus configured to electrically contact the semiconductor body, and the carrier has a side face running perpendicularly or obliquely to the rear side of the carrier and is configured as a mounting surface of the component, wherein at least one of the sub-regions is electrically connectable via the side face and exhibits singulation traces.
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