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公开(公告)号:US20210066046A1
公开(公告)日:2021-03-04
申请号:US16883392
申请日:2020-05-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junyoung Oh , Jaeho Kwak , Boeun Jang , Seokyeon Hwang , Yongseok Seo , Sangsoo Kim , Seunghwan Kim , Jongho Park , Yongkwan Lee , Jongho Lee , Daewook Kim , Wonpil Lee , Changkyu Choi
Abstract: A surface treatment apparatus and a surface treatment system having the same are disclosed. The surface treatment apparatus includes a process chamber in which the surface treatment process is conducted, a plasma generator for generating process radicals as a plasma state for the surface treatment process, the plasma generator being positioned outside of the process chamber and connected to the process chamber by a supply duct, a heat exchanger arranged on the supply duct and cooling down temperature of the process radicals passing through the supply duct and a flow controller controlling the process radicals to flow out of the process chamber. The flow controller is connected to a discharge duct through which the process radicals are discharged outside the process chamber. The plasma surface treatment process is conducted to the package structure having minute mounting gap without the damages to the IC chip and the board.
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公开(公告)号:US20230343560A1
公开(公告)日:2023-10-26
申请号:US18217043
申请日:2023-06-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junyoung Oh , Jaeho Kwak , Boeun Jang , Seokyeon Hwang , Yongseok Seo , Sangsoo Kim , Seunghwan Kim , Jongho Park , Yongkwan Lee , Jongho Lee , Daewook Kim , Wonpil Lee , Changkyu Choi
IPC: H01J37/32 , C23C16/455
CPC classification number: H01J37/32449 , C23C16/45504 , C23C16/45589 , H01J37/32633 , H01J37/32357 , C23C16/45591 , C23C16/45502 , C23C16/4583
Abstract: A surface treatment apparatus and a surface treatment system having the same are disclosed. The surface treatment apparatus includes a process chamber in which the surface treatment process is conducted, a plasma generator for generating process radicals as a plasma state for the surface treatment process, the plasma generator being positioned outside of the process chamber and connected to the process chamber by a supply duct, a heat exchanger arranged on the supply duct and cooling down temperature of the process radicals passing through the supply duct and a flow controller controlling the process radicals to flow out of the process chamber. The flow controller is connected to a discharge duct through which the process radicals are discharged outside the process chamber. The plasma surface treatment process is conducted to the package structure having minute mounting gap without the damages to the IC chip and the board.
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公开(公告)号:US20250036520A1
公开(公告)日:2025-01-30
申请号:US18420877
申请日:2024-01-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinsoo Lim , Changkyu Seol , Myoungbo Kwak , Daewook Kim , Dongjin Park , Hyoungbae Ahn , Youngdon Choi , Junghwan Choi
IPC: G06F11/10
Abstract: An electronic device may include a reception circuit configured to generate a plurality of reception data bits based on a voltage level of an analog signal received through a link, and to generate a plurality of bit reliability values indicating probabilities of error occurrence of the plurality of reception data bits based on the voltage level of the analog signal, an alignment circuit configured to group the plurality of reception data bits into a plurality of error correction code (ECC) symbols, and to generate a plurality of symbol reliability values indicating probabilities of error occurrence of the plurality of ECC symbols based on the plurality of bit reliability values, and a decoding circuit configured to correct errors of the plurality of ECC symbols based on the plurality of symbol reliability values.
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公开(公告)号:US20240178863A1
公开(公告)日:2024-05-30
申请号:US18511740
申请日:2023-11-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinsoo Lim , Changkyu Seol , Myoungbo Kwak , Daewook Kim , Dongjin Park , Youngdon Choi
CPC classification number: H03M13/1595 , H03M13/2778 , H03M13/2927
Abstract: A device includes a receiver configured to receive a plurality of Error Correction Code (ECC) codewords transmitted from an external device through a channel including one or more lanes; an ECC decoder configured to generate a plurality of post ECC codewords by performing error correction with respect to the plurality of ECC codewords and generating a first cyclic redundancy check (CRC) codeword based on the plurality of post ECC codewords; a CRC checker configured to determine whether an error exists in the first CRC codeword; and a post ECC decoder configured to, when it is determined that the error exists in the first CRC codeword, generate a second CRC codeword by estimating a remaining error position based on error correction result information received from the ECC decoder and performing remaining error correction with respect to the plurality of post ECC codewords based on the remaining error position.
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5.
公开(公告)号:US11728142B2
公开(公告)日:2023-08-15
申请号:US16883392
申请日:2020-05-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junyoung Oh , Jaeho Kwak , Boeun Jang , Seokyeon Hwang , Yongseok Seo , Sangsoo Kim , Seunghwan Kim , Jongho Park , Yongkwan Lee , Jongho Lee , Daewook Kim , Wonpil Lee , Changkyu Choi
IPC: H01J37/32 , C23C16/455 , C23C16/458 , H01L21/673
CPC classification number: H01J37/32449 , C23C16/45504 , C23C16/45589 , H01J37/32633 , C23C16/4583 , C23C16/45502 , C23C16/45591 , H01J37/32357 , H01L21/67326
Abstract: A surface treatment apparatus and a surface treatment system having the same are disclosed. The surface treatment apparatus includes a process chamber in which the surface treatment process is conducted, a plasma generator for generating process radicals as a plasma state for the surface treatment process, the plasma generator being positioned outside of the process chamber and connected to the process chamber by a supply duct, a heat exchanger arranged on the supply duct and cooling down temperature of the process radicals passing through the supply duct and a flow controller controlling the process radicals to flow out of the process chamber. The flow controller is connected to a discharge duct through which the process radicals are discharged outside the process chamber. The plasma surface treatment process is conducted to the package structure having minute mounting gap without the damages to the IC chip and the board.
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公开(公告)号:US20250130891A1
公开(公告)日:2025-04-24
申请号:US18657360
申请日:2024-05-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seonghyeog Choi , Jiho Kim , Changkyu Seol , Yuseok Song , Daewook Kim
IPC: G06F11/10
Abstract: A memory system includes a semiconductor memory device and a memory controller to control the semiconductor memory device. The semiconductor memory device includes a memory cell array that is divided into a plurality of sub array blocks arranged in a first direction and a second direction. The memory controller includes an error correction code (ECC) engine. The ECC engine, in a write operation, generates a parity data by performing an ECC encoding on a user data including a plurality of sub data units, generates a main data by interleaving the sub data units based on mapping information such that two sub data units to be stored in one row of a target sub array block are included in one symbol. The mapping information indicates a mapping relationship between the plurality of sub data units and rows of the target sub array block storing the plurality of sub data units.
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7.
公开(公告)号:US10061641B2
公开(公告)日:2018-08-28
申请号:US14580815
申请日:2014-12-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Namshik Kim , Tae-Hwan Kim , Daewook Kim , Biwoong Chung , Junjin Kong
IPC: G06F11/10 , G11C29/52 , G11C11/419
CPC classification number: G06F11/1012 , G11C11/419
Abstract: A storage device is provided which includes an ECC circuit. At a write operation, the ECC circuit generates a CRC (cyclic redundancy check) parity corresponding to data and generates an ECC (error correction code) parity corresponding to the data using an error correction code. At a read operation about the data stored in the at least one nonvolatile memory device, the ECC circuit corrects an error of the data using the CRC parity and the ECC parity.
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